panfrost: Fix BI_BLEND packing
[mesa.git] / src / panfrost / bifrost / bi_schedule.c
1 /*
2 * Copyright (C) 2020 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27 #include "compiler.h"
28
29 /* Finds the clause type required or return none */
30
31 static enum bifrost_clause_type
32 bi_clause_type_for_ins(bi_instruction *ins)
33 {
34 unsigned T = ins->type;
35
36 /* Only high latency ops impose clause types */
37 if (!(bi_class_props[T] & BI_SCHED_HI_LATENCY))
38 return BIFROST_CLAUSE_NONE;
39
40 switch (T) {
41 case BI_BRANCH:
42 case BI_DISCARD:
43 return BIFROST_CLAUSE_NONE;
44
45 case BI_LOAD_VAR:
46 return BIFROST_CLAUSE_LOAD_VARY;
47
48 case BI_LOAD_UNIFORM:
49 case BI_LOAD_ATTR:
50 case BI_LOAD_VAR_ADDRESS:
51 return BIFROST_CLAUSE_UBO;
52
53 case BI_TEX:
54 return BIFROST_CLAUSE_TEX;
55
56 case BI_LOAD:
57 return BIFROST_CLAUSE_SSBO_LOAD;
58
59 case BI_STORE:
60 case BI_STORE_VAR:
61 return BIFROST_CLAUSE_SSBO_STORE;
62
63 case BI_BLEND:
64 return BIFROST_CLAUSE_BLEND;
65
66 case BI_ATEST:
67 return BIFROST_CLAUSE_ATEST;
68
69 default:
70 unreachable("Invalid high-latency class");
71 }
72 }
73
74 /* There is an encoding restriction against FMA fp16 add/min/max
75 * having both sources with abs(..) with a duplicated source. This is
76 * due to the packing being order-sensitive, so the ports must end up distinct
77 * to handle both having abs(..). The swizzle doesn't matter here. Note
78 * BIR_INDEX_REGISTER generally should not be used pre-schedule (TODO: enforce
79 * this).
80 */
81
82 static bool
83 bi_ambiguous_abs(bi_instruction *ins)
84 {
85 bool classy = bi_class_props[ins->type] & BI_NO_ABS_ABS_FP16_FMA;
86 bool typey = ins->dest_type == nir_type_float16;
87 bool absy = ins->src_abs[0] && ins->src_abs[1];
88
89 return classy && typey && absy;
90 }
91
92 /* Lowers FMOV to ADD #0, since FMOV doesn't exist on the h/w and this is the
93 * latest time it's sane to lower (it's useful to distinguish before, but we'll
94 * need this handle during scheduling to ensure the ports get modeled
95 * correctly with respect to the new zero source) */
96
97 static void
98 bi_lower_fmov(bi_instruction *ins)
99 {
100 if (ins->type != BI_FMOV)
101 return;
102
103 ins->type = BI_ADD;
104 ins->src[1] = BIR_INDEX_ZERO;
105 ins->src_types[1] = ins->src_types[0];
106 }
107
108 /* Eventually, we'll need a proper scheduling, grouping instructions
109 * into clauses and ordering/assigning grouped instructions to the
110 * appropriate FMA/ADD slots. Right now we do the dumbest possible
111 * thing just to have the scheduler stubbed out so we can focus on
112 * codegen */
113
114 void
115 bi_schedule(bi_context *ctx)
116 {
117 unsigned ids = 0;
118 unsigned last_id = 0;
119 bool is_first = true;
120
121 bi_foreach_block(ctx, block) {
122 bi_block *bblock = (bi_block *) block;
123
124 list_inithead(&bblock->clauses);
125
126 bi_foreach_instr_in_block(bblock, ins) {
127 /* Convenient time to lower */
128 bi_lower_fmov(ins);
129
130 unsigned props = bi_class_props[ins->type];
131
132 bi_clause *u = rzalloc(ctx, bi_clause);
133 u->bundle_count = 1;
134
135 /* Check for scheduling restrictions */
136
137 bool can_fma = props & BI_SCHED_FMA;
138 bool can_add = props & BI_SCHED_ADD;
139
140 can_fma &= !bi_ambiguous_abs(ins);
141
142 assert(can_fma || can_add);
143
144 if (can_fma)
145 u->bundles[0].fma = ins;
146 else
147 u->bundles[0].add = ins;
148
149 u->scoreboard_id = ids++;
150
151 if (is_first)
152 is_first = false;
153 else {
154 /* Rule: first instructions cannot have write barriers */
155 u->dependencies |= (1 << last_id);
156 u->data_register_write_barrier = true;
157 }
158
159 if (ins->type == BI_ATEST)
160 u->dependencies |= (1 << 6);
161
162 if (ins->type == BI_BLEND)
163 u->dependencies |= (1 << 6) | (1 << 7);
164
165 ids = ids & 1;
166 last_id = u->scoreboard_id;
167 u->back_to_back = false;
168
169 u->constant_count = 1;
170 u->constants[0] = ins->constant.u64;
171
172 u->clause_type = bi_clause_type_for_ins(ins);
173
174 list_addtail(&u->link, &bblock->clauses);
175 }
176
177 bblock->scheduled = true;
178 }
179 }