src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "main/imports.h"
  31 #include "compiler/nir/nir_builder.h"
  32
  33 #include "disassemble.h"
  34 #include "bifrost_compile.h"
  35 #include "bifrost_nir.h"
  36 #include "compiler.h"
  37 #include "bi_quirks.h"
  38 #include "bi_print.h"
  39
  40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  41 static bi_instruction *bi_emit_branch(bi_context *ctx);
  42 static void bi_schedule_barrier(bi_context *ctx);
  43
  44 static void
  45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  46 {
  47         bi_instruction *branch = bi_emit_branch(ctx);
  48
  49         switch (instr->type) {
  50         case nir_jump_break:
  51                 branch->branch.target = ctx->break_block;
  52                 break;
  53         case nir_jump_continue:
  54                 branch->branch.target = ctx->continue_block;
  55                 break;
  56         default:
  57                 unreachable("Unhandled jump type");
  58         }
  59
  60         pan_block_add_successor(&ctx->current_block->base, &branch->branch.target->base);
  61 }
  62
  63 /* Gets a bytemask for a complete vecN write */
  64 static unsigned
  65 bi_mask_for_channels_32(unsigned i)
  66 {
  67         return (1 << (4 * i)) - 1;
  68 }
  69
  70 static bi_instruction
  71 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  72 {
  73         bi_instruction load = {
  74                 .type = T,
  75                 .writemask = bi_mask_for_channels_32(instr->num_components),
  76                 .src = { BIR_INDEX_CONSTANT },
  77                 .constant = { .u64 = nir_intrinsic_base(instr) },
  78         };
  79
  80         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  81
  82         if (info->has_dest)
  83                 load.dest = bir_dest_index(&instr->dest);
  84
  85         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  86                 load.dest_type = nir_intrinsic_type(instr);
  87
  88         nir_src *offset = nir_get_io_offset_src(instr);
  89
  90         if (nir_src_is_const(*offset))
  91                 load.constant.u64 += nir_src_as_uint(*offset);
  92         else
  93                 load.src[0] = bir_src_index(offset);
  94
  95         return load;
  96 }
  97
  98 static void
  99 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 100 {
 101         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
 102         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
 103         ins.load_vary.reuse = false; /* TODO */
 104         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
 105         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
 106         bi_emit(ctx, ins);
 107 }
 108
 109 static void
 110 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 111 {
 112         if (!ctx->emitted_atest) {
 113                 bi_instruction ins = {
 114                         .type = BI_ATEST
 115                 };
 116
 117                 bi_emit(ctx, ins);
 118                 bi_schedule_barrier(ctx);
 119                 ctx->emitted_atest = true;
 120         }
 121
 122         bi_instruction blend = {
 123                 .type = BI_BLEND,
 124                 .blend_location = nir_intrinsic_base(instr),
 125                 .src = {
 126                         bir_src_index(&instr->src[0])
 127                 },
 128                 .swizzle = {
 129                         { 0, 1, 2, 3 }
 130                 }
 131         };
 132
 133         bi_emit(ctx, blend);
 134         bi_schedule_barrier(ctx);
 135 }
 136
 137 static void
 138 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 139 {
 140         bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
 141         address.dest = bi_make_temp(ctx);
 142         address.dest_type = nir_type_uint64;
 143         address.writemask = (1 << 8) - 1;
 144
 145         bi_instruction st = {
 146                 .type = BI_STORE_VAR,
 147                 .src = {
 148                         address.dest,
 149                         bir_src_index(&instr->src[0])
 150                 },
 151                 .swizzle = {
 152                         { 0, 1, 2, 3 }
 153                 }
 154         };
 155
 156         bi_emit(ctx, address);
 157         bi_emit(ctx, st);
 158 }
 159
 160 static void
 161 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 162 {
 163         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 164         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 165
 166         /* TODO: Indirect access, since we need to multiply by the element
 167          * size. I believe we can get this lowering automatically via
 168          * nir_lower_io (as mul instructions) with the proper options, but this
 169          * is TODO */
 170         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 171         ld.constant.u64 += ctx->sysvals.sysval_count;
 172         ld.constant.u64 *= 16;
 173
 174         bi_emit(ctx, ld);
 175 }
 176
 177 static void
 178 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 179                 unsigned nr_components, unsigned offset)
 180 {
 181         nir_dest nir_dest;
 182
 183         /* Figure out which uniform this is */
 184         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 185         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 186
 187         /* Sysvals are prefix uniforms */
 188         unsigned uniform = ((uintptr_t) val) - 1;
 189
 190         /* Emit the read itself -- this is never indirect */
 191
 192         bi_instruction load = {
 193                 .type = BI_LOAD_UNIFORM,
 194                 .writemask = (1 << (nr_components * 4)) - 1,
 195                 .src = { BIR_INDEX_CONSTANT},
 196                 .constant = { (uniform * 16) + offset },
 197                 .dest = bir_dest_index(&nir_dest),
 198                 .dest_type = nir_type_uint32, /* TODO */
 199         };
 200
 201         bi_emit(ctx, load);
 202 }
 203
 204 static void
 205 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 206 {
 207
 208         switch (instr->intrinsic) {
 209         case nir_intrinsic_load_barycentric_pixel:
 210                 /* stub */
 211                 break;
 212         case nir_intrinsic_load_interpolated_input:
 213         case nir_intrinsic_load_input:
 214                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 215                         bi_emit_ld_vary(ctx, instr);
 216                 else if (ctx->stage == MESA_SHADER_VERTEX)
 217                         bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
 218                 else {
 219                         unreachable("Unsupported shader stage");
 220                 }
 221                 break;
 222
 223         case nir_intrinsic_store_output:
 224                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 225                         bi_emit_frag_out(ctx, instr);
 226                 else if (ctx->stage == MESA_SHADER_VERTEX)
 227                         bi_emit_st_vary(ctx, instr);
 228                 else
 229                         unreachable("Unsupported shader stage");
 230                 break;
 231
 232         case nir_intrinsic_load_uniform:
 233                 bi_emit_ld_uniform(ctx, instr);
 234                 break;
 235
 236         case nir_intrinsic_load_ssbo_address:
 237                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 238                 break;
 239
 240         case nir_intrinsic_get_buffer_size:
 241                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 242                 break;
 243
 244         case nir_intrinsic_load_viewport_scale:
 245         case nir_intrinsic_load_viewport_offset:
 246         case nir_intrinsic_load_num_work_groups:
 247         case nir_intrinsic_load_sampler_lod_parameters_pan:
 248                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 249                 break;
 250
 251         default:
 252                 /* todo */
 253                 break;
 254         }
 255 }
 256
 257 static void
 258 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 259 {
 260         /* Make sure we've been lowered */
 261         assert(instr->def.num_components == 1);
 262
 263         bi_instruction move = {
 264                 .type = BI_MOV,
 265                 .dest = bir_ssa_index(&instr->def),
 266                 .dest_type = instr->def.bit_size | nir_type_uint,
 267                 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
 268                 .src = {
 269                         BIR_INDEX_CONSTANT
 270                 },
 271                 .constant = {
 272                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 273                 }
 274         };
 275
 276         bi_emit(ctx, move);
 277 }
 278
 279 static enum bi_class
 280 bi_class_for_nir_alu(nir_op op)
 281 {
 282         switch (op) {
 283         case nir_op_iadd:
 284         case nir_op_fadd:
 285         case nir_op_fsub:
 286                 return BI_ADD;
 287         case nir_op_isub:
 288                 return BI_ISUB;
 289
 290         case nir_op_flt:
 291         case nir_op_fge:
 292         case nir_op_feq:
 293         case nir_op_fne:
 294         case nir_op_ilt:
 295         case nir_op_ige:
 296         case nir_op_ieq:
 297         case nir_op_ine:
 298                 return BI_CMP;
 299
 300         case nir_op_bcsel:
 301                 return BI_CSEL;
 302
 303         case nir_op_i2i8:
 304         case nir_op_i2i16:
 305         case nir_op_i2i32:
 306         case nir_op_i2i64:
 307         case nir_op_u2u8:
 308         case nir_op_u2u16:
 309         case nir_op_u2u32:
 310         case nir_op_u2u64:
 311         case nir_op_f2i16:
 312         case nir_op_f2i32:
 313         case nir_op_f2i64:
 314         case nir_op_f2u16:
 315         case nir_op_f2u32:
 316         case nir_op_f2u64:
 317         case nir_op_i2f16:
 318         case nir_op_i2f32:
 319         case nir_op_i2f64:
 320         case nir_op_u2f16:
 321         case nir_op_u2f32:
 322         case nir_op_u2f64:
 323                 return BI_CONVERT;
 324
 325         case nir_op_fmul:
 326                 return BI_FMA;
 327
 328         case nir_op_imin:
 329         case nir_op_imax:
 330         case nir_op_umin:
 331         case nir_op_umax:
 332         case nir_op_fmin:
 333         case nir_op_fmax:
 334                 return BI_MINMAX;
 335
 336         case nir_op_fsat:
 337         case nir_op_fneg:
 338         case nir_op_fabs:
 339         case nir_op_mov:
 340                 return BI_MOV;
 341
 342         case nir_op_frcp:
 343         case nir_op_frsq:
 344         case nir_op_fsin:
 345         case nir_op_fcos:
 346                 return BI_SPECIAL;
 347
 348         default:
 349                 unreachable("Unknown ALU op");
 350         }
 351 }
 352
 353 static enum bi_cond
 354 bi_cond_for_nir(nir_op op)
 355 {
 356         switch (op) {
 357         case nir_op_flt:
 358         case nir_op_ilt:
 359                 return BI_COND_LT;
 360         case nir_op_fge:
 361         case nir_op_ige:
 362                 return BI_COND_GE;
 363         case nir_op_feq:
 364         case nir_op_ieq:
 365                 return BI_COND_EQ;
 366         case nir_op_fne:
 367         case nir_op_ine:
 368                 return BI_COND_NE;
 369         default:
 370                 unreachable("Invalid compare");
 371         }
 372 }
 373
 374 static void
 375 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 376 {
 377         /* Assume it's something we can handle normally */
 378         bi_instruction alu = {
 379                 .type = bi_class_for_nir_alu(instr->op),
 380                 .dest = bir_dest_index(&instr->dest.dest),
 381                 .dest_type = nir_op_infos[instr->op].output_type
 382                         | nir_dest_bit_size(instr->dest.dest),
 383         };
 384
 385         /* TODO: Implement lowering of special functions for older Bifrost */
 386         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 387
 388         if (instr->dest.dest.is_ssa) {
 389                 /* Construct a writemask */
 390                 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
 391                 unsigned comps = instr->dest.dest.ssa.num_components;
 392                 assert(comps == 1);
 393                 unsigned bits = bits_per_comp * comps;
 394                 unsigned bytes = MAX2(bits / 8, 1);
 395                 alu.writemask = (1 << bytes) - 1;
 396         } else {
 397                 unsigned comp_mask = instr->dest.write_mask;
 398
 399                 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
 400                                 comp_mask);
 401         }
 402
 403         /* We inline constants as we go. This tracks how many constants have
 404          * been inlined, since we're limited to 64-bits of constants per
 405          * instruction */
 406
 407         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 408         unsigned constants_left = (64 / dest_bits);
 409         unsigned constant_shift = 0;
 410
 411         /* Copy sources */
 412
 413         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 414         assert(num_inputs <= ARRAY_SIZE(alu.src));
 415
 416         for (unsigned i = 0; i < num_inputs; ++i) {
 417                 unsigned bits = nir_src_bit_size(instr->src[i].src);
 418                 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
 419                         | bits;
 420
 421                 /* Try to inline a constant */
 422                 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
 423                         alu.constant.u64 |=
 424                                 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
 425
 426                         alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
 427                         --constants_left;
 428                         constant_shift += dest_bits;
 429                         continue;
 430                 }
 431
 432                 alu.src[i] = bir_src_index(&instr->src[i].src);
 433
 434                 /* We assert scalarization above */
 435                 alu.swizzle[i][0] = instr->src[i].swizzle[0];
 436         }
 437
 438         /* Op-specific fixup */
 439         switch (instr->op) {
 440         case nir_op_fmul:
 441                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 442                 break;
 443         case nir_op_fsat:
 444                 alu.outmod = BIFROST_SAT; /* MOV */
 445                 break;
 446         case nir_op_fneg:
 447                 alu.src_neg[0] = true; /* MOV */
 448                 break;
 449         case nir_op_fabs:
 450                 alu.src_abs[0] = true; /* MOV */
 451                 break;
 452         case nir_op_fsub:
 453                 alu.src_neg[1] = true; /* ADD */
 454                 break;
 455         case nir_op_fmax:
 456         case nir_op_imax:
 457         case nir_op_umax:
 458                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 459                 break;
 460         case nir_op_frcp:
 461                 alu.op.special = BI_SPECIAL_FRCP;
 462                 break;
 463         case nir_op_frsq:
 464                 alu.op.special = BI_SPECIAL_FRSQ;
 465                 break;
 466         case nir_op_fsin:
 467                 alu.op.special = BI_SPECIAL_FSIN;
 468                 break;
 469         case nir_op_fcos:
 470                 alu.op.special = BI_SPECIAL_FCOS;
 471                 break;
 472         case nir_op_flt:
 473         case nir_op_ilt:
 474         case nir_op_fge:
 475         case nir_op_ige:
 476         case nir_op_feq:
 477         case nir_op_ieq:
 478         case nir_op_fne:
 479         case nir_op_ine:
 480                 alu.op.compare = bi_cond_for_nir(instr->op);
 481                 break;
 482         default:
 483                 break;
 484         }
 485
 486         bi_emit(ctx, alu);
 487 }
 488
 489 static void
 490 emit_instr(bi_context *ctx, struct nir_instr *instr)
 491 {
 492         switch (instr->type) {
 493         case nir_instr_type_load_const:
 494                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 495                 break;
 496
 497         case nir_instr_type_intrinsic:
 498                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 499                 break;
 500
 501         case nir_instr_type_alu:
 502                 emit_alu(ctx, nir_instr_as_alu(instr));
 503                 break;
 504
 505 #if 0
 506         case nir_instr_type_tex:
 507                 emit_tex(ctx, nir_instr_as_tex(instr));
 508                 break;
 509 #endif
 510
 511         case nir_instr_type_jump:
 512                 emit_jump(ctx, nir_instr_as_jump(instr));
 513                 break;
 514
 515         case nir_instr_type_ssa_undef:
 516                 /* Spurious */
 517                 break;
 518
 519         default:
 520                 //unreachable("Unhandled instruction type");
 521                 break;
 522         }
 523 }
 524
 525
 526
 527 static bi_block *
 528 create_empty_block(bi_context *ctx)
 529 {
 530         bi_block *blk = rzalloc(ctx, bi_block);
 531
 532         blk->base.predecessors = _mesa_set_create(blk,
 533                         _mesa_hash_pointer,
 534                         _mesa_key_pointer_equal);
 535
 536         blk->base.name = ctx->block_name_count++;
 537
 538         return blk;
 539 }
 540
 541 static void
 542 bi_schedule_barrier(bi_context *ctx)
 543 {
 544         bi_block *temp = ctx->after_block;
 545         ctx->after_block = create_empty_block(ctx);
 546         list_addtail(&ctx->after_block->base.link, &ctx->blocks);
 547         list_inithead(&ctx->after_block->base.instructions);
 548         pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base);
 549         ctx->current_block = ctx->after_block;
 550         ctx->after_block = temp;
 551 }
 552
 553 static bi_block *
 554 emit_block(bi_context *ctx, nir_block *block)
 555 {
 556         if (ctx->after_block) {
 557                 ctx->current_block = ctx->after_block;
 558                 ctx->after_block = NULL;
 559         } else {
 560                 ctx->current_block = create_empty_block(ctx);
 561         }
 562
 563         list_addtail(&ctx->current_block->base.link, &ctx->blocks);
 564         list_inithead(&ctx->current_block->base.instructions);
 565
 566         nir_foreach_instr(instr, block) {
 567                 emit_instr(ctx, instr);
 568                 ++ctx->instruction_count;
 569         }
 570
 571         return ctx->current_block;
 572 }
 573
 574 /* Emits an unconditional branch to the end of the current block, returning a
 575  * pointer so the user can fill in details */
 576
 577 static bi_instruction *
 578 bi_emit_branch(bi_context *ctx)
 579 {
 580         bi_instruction branch = {
 581                 .type = BI_BRANCH,
 582                 .branch = {
 583                         .cond = BI_COND_ALWAYS
 584                 }
 585         };
 586
 587         return bi_emit(ctx, branch);
 588 }
 589
 590 /* Sets a condition for a branch by examing the NIR condition. If we're
 591  * familiar with the condition, we unwrap it to fold it into the branch
 592  * instruction. Otherwise, we consume the condition directly. We
 593  * generally use 1-bit booleans which allows us to use small types for
 594  * the conditions.
 595  */
 596
 597 static void
 598 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 599 {
 600         /* TODO: Try to unwrap instead of always bailing */
 601         branch->src[0] = bir_src_index(cond);
 602         branch->src[1] = BIR_INDEX_ZERO;
 603         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 604         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 605 }
 606
 607 static void
 608 emit_if(bi_context *ctx, nir_if *nif)
 609 {
 610         bi_block *before_block = ctx->current_block;
 611
 612         /* Speculatively emit the branch, but we can't fill it in until later */
 613         bi_instruction *then_branch = bi_emit_branch(ctx);
 614         bi_set_branch_cond(then_branch, &nif->condition, true);
 615
 616         /* Emit the two subblocks. */
 617         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 618         bi_block *end_then_block = ctx->current_block;
 619
 620         /* Emit a jump from the end of the then block to the end of the else */
 621         bi_instruction *then_exit = bi_emit_branch(ctx);
 622
 623         /* Emit second block, and check if it's empty */
 624
 625         int count_in = ctx->instruction_count;
 626         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 627         bi_block *end_else_block = ctx->current_block;
 628         ctx->after_block = create_empty_block(ctx);
 629
 630         /* Now that we have the subblocks emitted, fix up the branches */
 631
 632         assert(then_block);
 633         assert(else_block);
 634
 635         if (ctx->instruction_count == count_in) {
 636                 /* The else block is empty, so don't emit an exit jump */
 637                 bi_remove_instruction(then_exit);
 638                 then_branch->branch.target = ctx->after_block;
 639         } else {
 640                 then_branch->branch.target = else_block;
 641                 then_exit->branch.target = ctx->after_block;
 642                 pan_block_add_successor(&end_then_block->base, &then_exit->branch.target->base);
 643         }
 644
 645         /* Wire up the successors */
 646
 647         pan_block_add_successor(&before_block->base, &then_branch->branch.target->base); /* then_branch */
 648
 649         pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */
 650         pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */
 651 }
 652
 653 static void
 654 emit_loop(bi_context *ctx, nir_loop *nloop)
 655 {
 656         /* Remember where we are */
 657         bi_block *start_block = ctx->current_block;
 658
 659         bi_block *saved_break = ctx->break_block;
 660         bi_block *saved_continue = ctx->continue_block;
 661
 662         ctx->continue_block = create_empty_block(ctx);
 663         ctx->break_block = create_empty_block(ctx);
 664         ctx->after_block = ctx->continue_block;
 665
 666         /* Emit the body itself */
 667         emit_cf_list(ctx, &nloop->body);
 668
 669         /* Branch back to loop back */
 670         bi_instruction *br_back = bi_emit_branch(ctx);
 671         br_back->branch.target = ctx->continue_block;
 672         pan_block_add_successor(&start_block->base, &ctx->continue_block->base);
 673         pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base);
 674
 675         ctx->after_block = ctx->break_block;
 676
 677         /* Pop off */
 678         ctx->break_block = saved_break;
 679         ctx->continue_block = saved_continue;
 680         ++ctx->loop_count;
 681 }
 682
 683 static bi_block *
 684 emit_cf_list(bi_context *ctx, struct exec_list *list)
 685 {
 686         bi_block *start_block = NULL;
 687
 688         foreach_list_typed(nir_cf_node, node, node, list) {
 689                 switch (node->type) {
 690                 case nir_cf_node_block: {
 691                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 692
 693                         if (!start_block)
 694                                 start_block = block;
 695
 696                         break;
 697                 }
 698
 699                 case nir_cf_node_if:
 700                         emit_if(ctx, nir_cf_node_as_if(node));
 701                         break;
 702
 703                 case nir_cf_node_loop:
 704                         emit_loop(ctx, nir_cf_node_as_loop(node));
 705                         break;
 706
 707                 default:
 708                         unreachable("Unknown control flow");
 709                 }
 710         }
 711
 712         return start_block;
 713 }
 714
 715 static int
 716 glsl_type_size(const struct glsl_type *type, bool bindless)
 717 {
 718         return glsl_count_attribute_slots(type, false);
 719 }
 720
 721 static void
 722 bi_optimize_nir(nir_shader *nir)
 723 {
 724         bool progress;
 725         unsigned lower_flrp = 16 | 32 | 64;
 726
 727         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 728         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 729
 730         nir_lower_tex_options lower_tex_options = {
 731                 .lower_txs_lod = true,
 732                 .lower_txp = ~0,
 733                 .lower_tex_without_implicit_lod = true,
 734                 .lower_txd = true,
 735         };
 736
 737         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 738         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 739         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 740
 741         do {
 742                 progress = false;
 743
 744                 NIR_PASS(progress, nir, nir_lower_var_copies);
 745                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
 746
 747                 NIR_PASS(progress, nir, nir_copy_prop);
 748                 NIR_PASS(progress, nir, nir_opt_remove_phis);
 749                 NIR_PASS(progress, nir, nir_opt_dce);
 750                 NIR_PASS(progress, nir, nir_opt_dead_cf);
 751                 NIR_PASS(progress, nir, nir_opt_cse);
 752                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
 753                 NIR_PASS(progress, nir, nir_opt_algebraic);
 754                 NIR_PASS(progress, nir, nir_opt_constant_folding);
 755
 756                 if (lower_flrp != 0) {
 757                         bool lower_flrp_progress = false;
 758                         NIR_PASS(lower_flrp_progress,
 759                                  nir,
 760                                  nir_lower_flrp,
 761                                  lower_flrp,
 762                                  false /* always_precise */,
 763                                  nir->options->lower_ffma);
 764                         if (lower_flrp_progress) {
 765                                 NIR_PASS(progress, nir,
 766                                          nir_opt_constant_folding);
 767                                 progress = true;
 768                         }
 769
 770                         /* Nothing should rematerialize any flrps, so we only
 771                          * need to do this lowering once.
 772                          */
 773                         lower_flrp = 0;
 774                 }
 775
 776                 NIR_PASS(progress, nir, nir_opt_undef);
 777                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
 778                          nir_var_shader_in |
 779                          nir_var_shader_out |
 780                          nir_var_function_temp);
 781         } while (progress);
 782
 783         NIR_PASS(progress, nir, nir_opt_algebraic_late);
 784         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
 785         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 786         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 787
 788         /* Take us out of SSA */
 789         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
 790         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
 791
 792         /* We're a primary scalar architecture but there's enough vector that
 793          * we use a vector IR so let's not also deal with scalar hacks on top
 794          * of the vector hacks */
 795
 796         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
 797         NIR_PASS(progress, nir, nir_lower_vec_to_movs);
 798         NIR_PASS(progress, nir, nir_opt_dce);
 799 }
 800
 801 void
 802 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
 803 {
 804         bi_context *ctx = rzalloc(NULL, bi_context);
 805         ctx->nir = nir;
 806         ctx->stage = nir->info.stage;
 807         ctx->quirks = bifrost_get_quirks(product_id);
 808         list_inithead(&ctx->blocks);
 809
 810         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
 811          * (so we don't accidentally duplicate the epilogue since mesa/st has
 812          * messed with our I/O quite a bit already) */
 813
 814         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 815
 816         if (ctx->stage == MESA_SHADER_VERTEX) {
 817                 NIR_PASS_V(nir, nir_lower_viewport_transform);
 818                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
 819         }
 820
 821         NIR_PASS_V(nir, nir_split_var_copies);
 822         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
 823         NIR_PASS_V(nir, nir_lower_var_copies);
 824         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 825         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
 826         NIR_PASS_V(nir, nir_lower_ssbo);
 827
 828         bi_optimize_nir(nir);
 829         nir_print_shader(nir, stdout);
 830
 831         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
 832         program->sysval_count = ctx->sysvals.sysval_count;
 833         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
 834
 835         nir_foreach_function(func, nir) {
 836                 if (!func->impl)
 837                         continue;
 838
 839                 ctx->impl = func->impl;
 840                 emit_cf_list(ctx, &func->impl->body);
 841                 break; /* TODO: Multi-function shaders */
 842         }
 843
 844         bi_print_shader(ctx, stdout);
 845         bi_schedule(ctx);
 846
 847         ralloc_free(ctx);
 848 }