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panfrost: XMLify job_type
[mesa.git] / src / panfrost / lib / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <midgard_pack.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "midgard/disassemble.h"
38 #include "bifrost/disassemble.h"
39
40 #include "pan_encoder.h"
41
42 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
43
44 #define MEMORY_PROP(obj, p) {\
45 if (obj->p) { \
46 char *a = pointer_as_memory_reference(obj->p); \
47 pandecode_prop("%s = %s", #p, a); \
48 free(a); \
49 } \
50 }
51
52 #define MEMORY_PROP_DIR(obj, p) {\
53 if (obj.p) { \
54 char *a = pointer_as_memory_reference(obj.p); \
55 pandecode_prop("%s = %s", #p, a); \
56 free(a); \
57 } \
58 }
59
60 #define DUMP_CL(title, T, cl, indent) {\
61 fprintf(pandecode_dump_stream, "%s\n", title); \
62 struct MALI_ ## T temp; \
63 MALI_ ## T ## _unpack((const uint8_t *) cl, &temp); \
64 MALI_ ## T ## _print(pandecode_dump_stream, &temp, 0); \
65 }
66
67 #define DUMP_ADDR(title, T, addr, indent) {\
68 struct pandecode_mapped_memory *mapped_mem = pandecode_find_mapped_gpu_mem_containing(addr); \
69 const uint8_t *cl = pandecode_fetch_gpu_mem(mapped_mem, addr, MALI_ ## T ## _LENGTH); \
70 DUMP_CL(title, T, cl, indent); \
71 }
72
73 FILE *pandecode_dump_stream;
74
75 /* Semantic logging type.
76 *
77 * Raw: for raw messages to be printed as is.
78 * Message: for helpful information to be commented out in replays.
79 * Property: for properties of a struct
80 *
81 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
82 */
83
84 enum pandecode_log_type {
85 PANDECODE_RAW,
86 PANDECODE_MESSAGE,
87 PANDECODE_PROPERTY
88 };
89
90 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
91 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
92 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
93
94 unsigned pandecode_indent = 0;
95
96 static void
97 pandecode_make_indent(void)
98 {
99 for (unsigned i = 0; i < pandecode_indent; ++i)
100 fprintf(pandecode_dump_stream, " ");
101 }
102
103 static void
104 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
105 {
106 va_list ap;
107
108 pandecode_make_indent();
109
110 if (type == PANDECODE_MESSAGE)
111 fprintf(pandecode_dump_stream, "// ");
112 else if (type == PANDECODE_PROPERTY)
113 fprintf(pandecode_dump_stream, ".");
114
115 va_start(ap, format);
116 vfprintf(pandecode_dump_stream, format, ap);
117 va_end(ap);
118
119 if (type == PANDECODE_PROPERTY)
120 fprintf(pandecode_dump_stream, ",\n");
121 }
122
123 static void
124 pandecode_log_cont(const char *format, ...)
125 {
126 va_list ap;
127
128 va_start(ap, format);
129 vfprintf(pandecode_dump_stream, format, ap);
130 va_end(ap);
131 }
132
133 /* To check for memory safety issues, validates that the given pointer in GPU
134 * memory is valid, containing at least sz bytes. The goal is to eliminate
135 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
136 * overruns) by statically validating pointers.
137 */
138
139 static void
140 pandecode_validate_buffer(mali_ptr addr, size_t sz)
141 {
142 if (!addr) {
143 pandecode_msg("XXX: null pointer deref");
144 return;
145 }
146
147 /* Find a BO */
148
149 struct pandecode_mapped_memory *bo =
150 pandecode_find_mapped_gpu_mem_containing(addr);
151
152 if (!bo) {
153 pandecode_msg("XXX: invalid memory dereference\n");
154 return;
155 }
156
157 /* Bounds check */
158
159 unsigned offset = addr - bo->gpu_va;
160 unsigned total = offset + sz;
161
162 if (total > bo->length) {
163 pandecode_msg("XXX: buffer overrun. "
164 "Chunk of size %zu at offset %d in buffer of size %zu. "
165 "Overrun by %zu bytes. \n",
166 sz, offset, bo->length, total - bo->length);
167 return;
168 }
169 }
170
171 struct pandecode_flag_info {
172 u64 flag;
173 const char *name;
174 };
175
176 static void
177 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
178 u64 flags)
179 {
180 bool decodable_flags_found = false;
181
182 for (int i = 0; flag_info[i].name; i++) {
183 if ((flags & flag_info[i].flag) != flag_info[i].flag)
184 continue;
185
186 if (!decodable_flags_found) {
187 decodable_flags_found = true;
188 } else {
189 pandecode_log_cont(" | ");
190 }
191
192 pandecode_log_cont("%s", flag_info[i].name);
193
194 flags &= ~flag_info[i].flag;
195 }
196
197 if (decodable_flags_found) {
198 if (flags)
199 pandecode_log_cont(" | 0x%" PRIx64, flags);
200 } else {
201 pandecode_log_cont("0x%" PRIx64, flags);
202 }
203 }
204
205 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
206 static const struct pandecode_flag_info gl_enable_flag_info[] = {
207 FLAG_INFO(OCCLUSION_QUERY),
208 FLAG_INFO(OCCLUSION_PRECISE),
209 FLAG_INFO(FRONT_CCW_TOP),
210 FLAG_INFO(CULL_FACE_FRONT),
211 FLAG_INFO(CULL_FACE_BACK),
212 {}
213 };
214 #undef FLAG_INFO
215
216 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
217 static const struct pandecode_flag_info clear_flag_info[] = {
218 FLAG_INFO(FAST),
219 FLAG_INFO(SLOW),
220 FLAG_INFO(SLOW_STENCIL),
221 {}
222 };
223 #undef FLAG_INFO
224
225 #define FLAG_INFO(flag) { MALI_MASK_##flag, "MALI_MASK_" #flag }
226 static const struct pandecode_flag_info mask_flag_info[] = {
227 FLAG_INFO(R),
228 FLAG_INFO(G),
229 FLAG_INFO(B),
230 FLAG_INFO(A),
231 {}
232 };
233 #undef FLAG_INFO
234
235 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
236 static const struct pandecode_flag_info u3_flag_info[] = {
237 FLAG_INFO(HAS_MSAA),
238 FLAG_INFO(PER_SAMPLE),
239 FLAG_INFO(CAN_DISCARD),
240 FLAG_INFO(HAS_BLEND_SHADER),
241 FLAG_INFO(DEPTH_WRITEMASK),
242 FLAG_INFO(DEPTH_CLIP_NEAR),
243 FLAG_INFO(DEPTH_CLIP_FAR),
244 {}
245 };
246
247 static const struct pandecode_flag_info u4_flag_info[] = {
248 FLAG_INFO(NO_MSAA),
249 FLAG_INFO(NO_DITHER),
250 FLAG_INFO(DEPTH_RANGE_A),
251 FLAG_INFO(DEPTH_RANGE_B),
252 FLAG_INFO(STENCIL_TEST),
253 FLAG_INFO(ALPHA_TO_COVERAGE),
254 {}
255 };
256 #undef FLAG_INFO
257
258 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
259 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
260 FLAG_INFO(SRGB),
261 {}
262 };
263 #undef FLAG_INFO
264
265 #define FLAG_INFO(flag) { MALI_AFBC_##flag, "MALI_AFBC_" #flag }
266 static const struct pandecode_flag_info afbc_fmt_flag_info[] = {
267 FLAG_INFO(YTR),
268 {}
269 };
270 #undef FLAG_INFO
271
272 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
273 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
274 FLAG_INFO(PRESENT),
275 {}
276 };
277 #undef FLAG_INFO
278
279 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
280 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
281 FLAG_INFO(ZS),
282 {}
283 };
284 #undef FLAG_INFO
285
286 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
287 static const struct pandecode_flag_info shader_midgard1_flag_lo_info [] = {
288 FLAG_INFO(WRITES_Z),
289 FLAG_INFO(EARLY_Z),
290 FLAG_INFO(READS_TILEBUFFER),
291 FLAG_INFO(WRITES_GLOBAL),
292 FLAG_INFO(READS_ZS),
293 {}
294 };
295
296 static const struct pandecode_flag_info shader_midgard1_flag_hi_info [] = {
297 FLAG_INFO(WRITES_S),
298 FLAG_INFO(SUPPRESS_INF_NAN),
299 {}
300 };
301 #undef FLAG_INFO
302
303 #define FLAG_INFO(flag) { MALI_BIFROST_##flag, "MALI_BIFROST_" #flag }
304 static const struct pandecode_flag_info shader_bifrost_info [] = {
305 FLAG_INFO(FULL_THREAD),
306 FLAG_INFO(EARLY_Z),
307 FLAG_INFO(FIRST_ATEST),
308 {}
309 };
310
311 #undef FLAG_INFO
312
313 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
314 static const struct pandecode_flag_info mfbd_flag_info [] = {
315 FLAG_INFO(DEPTH_WRITE),
316 FLAG_INFO(EXTRA),
317 {}
318 };
319 #undef FLAG_INFO
320
321 #define FLAG_INFO(flag) { MALI_SAMP_##flag, "MALI_SAMP_" #flag }
322 static const struct pandecode_flag_info sampler_flag_info [] = {
323 FLAG_INFO(MAG_NEAREST),
324 FLAG_INFO(MIN_NEAREST),
325 FLAG_INFO(MIP_LINEAR_1),
326 FLAG_INFO(MIP_LINEAR_2),
327 FLAG_INFO(NORM_COORDS),
328 {}
329 };
330 #undef FLAG_INFO
331
332 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
333 static const struct pandecode_flag_info sfbd_unk1_info [] = {
334 FLAG_INFO(MSAA_8),
335 FLAG_INFO(MSAA_A),
336 {}
337 };
338 #undef FLAG_INFO
339
340 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
341 static const struct pandecode_flag_info sfbd_unk2_info [] = {
342 FLAG_INFO(MSAA_B),
343 FLAG_INFO(SRGB),
344 {}
345 };
346 #undef FLAG_INFO
347
348 #define DEFINE_CASE(name) case MALI_## name: return "MALI_" #name
349 static char *pandecode_format(enum mali_format format)
350 {
351 static char unk_format_str[10];
352
353 switch (format) {
354 DEFINE_CASE(ETC2_RGB8);
355 DEFINE_CASE(ETC2_R11_UNORM);
356 DEFINE_CASE(ETC2_RGBA8);
357 DEFINE_CASE(ETC2_RG11_UNORM);
358 DEFINE_CASE(ETC2_R11_SNORM);
359 DEFINE_CASE(ETC2_RG11_SNORM);
360 DEFINE_CASE(ETC2_RGB8A1);
361 DEFINE_CASE(NXR);
362 DEFINE_CASE(BC1_UNORM);
363 DEFINE_CASE(BC2_UNORM);
364 DEFINE_CASE(BC3_UNORM);
365 DEFINE_CASE(BC4_UNORM);
366 DEFINE_CASE(BC4_SNORM);
367 DEFINE_CASE(BC5_UNORM);
368 DEFINE_CASE(BC5_SNORM);
369 DEFINE_CASE(BC6H_UF16);
370 DEFINE_CASE(BC6H_SF16);
371 DEFINE_CASE(BC7_UNORM);
372 DEFINE_CASE(ASTC_3D_LDR);
373 DEFINE_CASE(ASTC_3D_HDR);
374 DEFINE_CASE(ASTC_2D_LDR);
375 DEFINE_CASE(ASTC_2D_HDR);
376 DEFINE_CASE(RGB565);
377 DEFINE_CASE(RGB5_X1_UNORM);
378 DEFINE_CASE(RGB5_A1_UNORM);
379 DEFINE_CASE(RGB10_A2_UNORM);
380 DEFINE_CASE(RGB10_A2_SNORM);
381 DEFINE_CASE(RGB10_A2UI);
382 DEFINE_CASE(RGB10_A2I);
383 DEFINE_CASE(RGB332_UNORM);
384 DEFINE_CASE(RGB233_UNORM);
385 DEFINE_CASE(Z24X8_UNORM);
386 DEFINE_CASE(R32_FIXED);
387 DEFINE_CASE(RG32_FIXED);
388 DEFINE_CASE(RGB32_FIXED);
389 DEFINE_CASE(RGBA32_FIXED);
390 DEFINE_CASE(R11F_G11F_B10F);
391 DEFINE_CASE(R9F_G9F_B9F_E5F);
392 DEFINE_CASE(VARYING_POS);
393 DEFINE_CASE(VARYING_DISCARD);
394
395 DEFINE_CASE(R8_SNORM);
396 DEFINE_CASE(R16_SNORM);
397 DEFINE_CASE(R32_SNORM);
398 DEFINE_CASE(RG8_SNORM);
399 DEFINE_CASE(RG16_SNORM);
400 DEFINE_CASE(RG32_SNORM);
401 DEFINE_CASE(RGB8_SNORM);
402 DEFINE_CASE(RGB16_SNORM);
403 DEFINE_CASE(RGB32_SNORM);
404 DEFINE_CASE(RGBA8_SNORM);
405 DEFINE_CASE(RGBA16_SNORM);
406 DEFINE_CASE(RGBA32_SNORM);
407
408 DEFINE_CASE(R8UI);
409 DEFINE_CASE(R16UI);
410 DEFINE_CASE(R32UI);
411 DEFINE_CASE(RG8UI);
412 DEFINE_CASE(RG16UI);
413 DEFINE_CASE(RG32UI);
414 DEFINE_CASE(RGB8UI);
415 DEFINE_CASE(RGB16UI);
416 DEFINE_CASE(RGB32UI);
417 DEFINE_CASE(RGBA8UI);
418 DEFINE_CASE(RGBA16UI);
419 DEFINE_CASE(RGBA32UI);
420
421 DEFINE_CASE(R8_UNORM);
422 DEFINE_CASE(R16_UNORM);
423 DEFINE_CASE(R32_UNORM);
424 DEFINE_CASE(R32F);
425 DEFINE_CASE(RG8_UNORM);
426 DEFINE_CASE(RG16_UNORM);
427 DEFINE_CASE(RG32_UNORM);
428 DEFINE_CASE(RG32F);
429 DEFINE_CASE(RGB8_UNORM);
430 DEFINE_CASE(RGB16_UNORM);
431 DEFINE_CASE(RGB32_UNORM);
432 DEFINE_CASE(RGB32F);
433 DEFINE_CASE(RGBA4_UNORM);
434 DEFINE_CASE(RGBA8_UNORM);
435 DEFINE_CASE(RGBA16_UNORM);
436 DEFINE_CASE(RGBA32_UNORM);
437 DEFINE_CASE(RGBA32F);
438
439 DEFINE_CASE(R8I);
440 DEFINE_CASE(R16I);
441 DEFINE_CASE(R32I);
442 DEFINE_CASE(RG8I);
443 DEFINE_CASE(R16F);
444 DEFINE_CASE(RG16I);
445 DEFINE_CASE(RG32I);
446 DEFINE_CASE(RG16F);
447 DEFINE_CASE(RGB8I);
448 DEFINE_CASE(RGB16I);
449 DEFINE_CASE(RGB32I);
450 DEFINE_CASE(RGB16F);
451 DEFINE_CASE(RGBA8I);
452 DEFINE_CASE(RGBA16I);
453 DEFINE_CASE(RGBA32I);
454 DEFINE_CASE(RGBA16F);
455
456 DEFINE_CASE(RGBA4);
457 DEFINE_CASE(RGBA8_2);
458 DEFINE_CASE(RGB10_A2_2);
459 default:
460 snprintf(unk_format_str, sizeof(unk_format_str), "MALI_0x%02x", format);
461 return unk_format_str;
462 }
463 }
464
465 #undef DEFINE_CASE
466
467 static char *
468 pandecode_draw_mode(enum mali_draw_mode mode)
469 {
470 #define DEFINE_CASE(name) case MALI_ ## name: return "MALI_" #name
471
472 switch (mode) {
473 DEFINE_CASE(DRAW_NONE);
474 DEFINE_CASE(POINTS);
475 DEFINE_CASE(LINES);
476 DEFINE_CASE(TRIANGLES);
477 DEFINE_CASE(TRIANGLE_STRIP);
478 DEFINE_CASE(TRIANGLE_FAN);
479 DEFINE_CASE(LINE_STRIP);
480 DEFINE_CASE(LINE_LOOP);
481 DEFINE_CASE(POLYGON);
482 DEFINE_CASE(QUADS);
483 DEFINE_CASE(QUAD_STRIP);
484
485 default:
486 pandecode_msg("XXX: invalid draw mode %X\n", mode);
487 return "";
488 }
489
490 #undef DEFINE_CASE
491 }
492
493 #define DEFINE_CASE(name) case MALI_FUNC_ ## name: return "MALI_FUNC_" #name
494 static char *
495 pandecode_func(enum mali_func mode)
496 {
497 switch (mode) {
498 DEFINE_CASE(NEVER);
499 DEFINE_CASE(LESS);
500 DEFINE_CASE(EQUAL);
501 DEFINE_CASE(LEQUAL);
502 DEFINE_CASE(GREATER);
503 DEFINE_CASE(NOTEQUAL);
504 DEFINE_CASE(GEQUAL);
505 DEFINE_CASE(ALWAYS);
506
507 default:
508 pandecode_msg("XXX: invalid func %X\n", mode);
509 return "";
510 }
511 }
512 #undef DEFINE_CASE
513
514 #define DEFINE_CASE(name) case MALI_MSAA_ ## name: return "MALI_MSAA_" #name
515 static char *
516 pandecode_msaa_mode(enum mali_msaa_mode mode)
517 {
518 switch (mode) {
519 DEFINE_CASE(SINGLE);
520 DEFINE_CASE(AVERAGE);
521 DEFINE_CASE(MULTIPLE);
522 DEFINE_CASE(LAYERED);
523 default:
524 unreachable("Impossible");
525 return "";
526 }
527 }
528 #undef DEFINE_CASE
529
530 #define DEFINE_CASE(name) case MALI_STENCIL_ ## name: return "MALI_STENCIL_" #name
531 static char *
532 pandecode_stencil_op(enum mali_stencil_op op)
533 {
534 switch (op) {
535 DEFINE_CASE(KEEP);
536 DEFINE_CASE(REPLACE);
537 DEFINE_CASE(ZERO);
538 DEFINE_CASE(INVERT);
539 DEFINE_CASE(INCR_WRAP);
540 DEFINE_CASE(DECR_WRAP);
541 DEFINE_CASE(INCR);
542 DEFINE_CASE(DECR);
543
544 default:
545 pandecode_msg("XXX: invalid stencil op %X\n", op);
546 return "";
547 }
548 }
549
550 #undef DEFINE_CASE
551
552 static char *pandecode_attr_mode_short(enum mali_attr_mode mode)
553 {
554 switch(mode) {
555 /* TODO: Combine to just "instanced" once this can be done
556 * unambiguously in all known cases */
557 case MALI_ATTR_POT_DIVIDE:
558 return "instanced_pot";
559 case MALI_ATTR_MODULO:
560 return "instanced_mod";
561 case MALI_ATTR_NPOT_DIVIDE:
562 return "instanced_npot";
563 case MALI_ATTR_IMAGE:
564 return "image";
565 default:
566 pandecode_msg("XXX: invalid attribute mode %X\n", mode);
567 return "";
568 }
569 }
570
571 static const char *
572 pandecode_special_record(uint64_t v, bool* attribute)
573 {
574 switch(v) {
575 case MALI_ATTR_VERTEXID:
576 *attribute = true;
577 return "gl_VertexID";
578 case MALI_ATTR_INSTANCEID:
579 *attribute = true;
580 return "gl_InstanceID";
581 case MALI_VARYING_FRAG_COORD:
582 return "gl_FragCoord";
583 case MALI_VARYING_FRONT_FACING:
584 return "gl_FrontFacing";
585 case MALI_VARYING_POINT_COORD:
586 return "gl_PointCoord";
587 default:
588 pandecode_msg("XXX: invalid special record %" PRIx64 "\n", v);
589 return "";
590 }
591 }
592
593 #define DEFINE_CASE(name) case MALI_WRAP_## name: return "MALI_WRAP_" #name
594 static char *
595 pandecode_wrap_mode(enum mali_wrap_mode op)
596 {
597 switch (op) {
598 DEFINE_CASE(REPEAT);
599 DEFINE_CASE(CLAMP_TO_EDGE);
600 DEFINE_CASE(CLAMP);
601 DEFINE_CASE(CLAMP_TO_BORDER);
602 DEFINE_CASE(MIRRORED_REPEAT);
603 DEFINE_CASE(MIRRORED_CLAMP_TO_EDGE);
604 DEFINE_CASE(MIRRORED_CLAMP);
605 DEFINE_CASE(MIRRORED_CLAMP_TO_BORDER);
606
607 default:
608 pandecode_msg("XXX: invalid wrap mode %X\n", op);
609 return "";
610 }
611 }
612 #undef DEFINE_CASE
613
614 #define DEFINE_CASE(name) case MALI_BLOCK_## name: return "MALI_BLOCK_" #name
615 static char *
616 pandecode_block_format(enum mali_block_format fmt)
617 {
618 switch (fmt) {
619 DEFINE_CASE(TILED);
620 DEFINE_CASE(UNKNOWN);
621 DEFINE_CASE(LINEAR);
622 DEFINE_CASE(AFBC);
623
624 default:
625 unreachable("Invalid case");
626 }
627 }
628 #undef DEFINE_CASE
629
630 #define DEFINE_CASE(name) case MALI_EXCEPTION_ACCESS_## name: return ""#name
631 static char *
632 pandecode_exception_access(unsigned access)
633 {
634 switch (access) {
635 DEFINE_CASE(NONE);
636 DEFINE_CASE(EXECUTE);
637 DEFINE_CASE(READ);
638 DEFINE_CASE(WRITE);
639
640 default:
641 unreachable("Invalid case");
642 }
643 }
644 #undef DEFINE_CASE
645
646 /* Midgard's tiler descriptor is embedded within the
647 * larger FBD */
648
649 static void
650 pandecode_midgard_tiler_descriptor(
651 const struct midgard_tiler_descriptor *t,
652 unsigned width,
653 unsigned height,
654 bool is_fragment,
655 bool has_hierarchy)
656 {
657 pandecode_log(".tiler = {\n");
658 pandecode_indent++;
659
660 if (t->hierarchy_mask == MALI_TILER_DISABLED)
661 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
662 else
663 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
664
665 /* We know this name from the kernel, but we never see it nonzero */
666
667 if (t->flags)
668 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
669
670 MEMORY_PROP(t, polygon_list);
671
672 /* The body is offset from the base of the polygon list */
673 //assert(t->polygon_list_body > t->polygon_list);
674 unsigned body_offset = t->polygon_list_body - t->polygon_list;
675
676 /* It needs to fit inside the reported size */
677 //assert(t->polygon_list_size >= body_offset);
678
679 /* Now that we've sanity checked, we'll try to calculate the sizes
680 * ourselves for comparison */
681
682 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
683 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
684
685 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
686 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
687 ref_header, ref_size);
688 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
689 pandecode_msg("body offset %d\n", body_offset);
690 }
691
692 /* The tiler heap has a start and end specified -- it should be
693 * identical to what we have in the BO. The exception is if tiling is
694 * disabled. */
695
696 MEMORY_PROP(t, heap_start);
697 assert(t->heap_end >= t->heap_start);
698
699 struct pandecode_mapped_memory *heap =
700 pandecode_find_mapped_gpu_mem_containing(t->heap_start);
701
702 unsigned heap_size = t->heap_end - t->heap_start;
703
704 /* Tiling is enabled with a special flag */
705 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
706 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
707
708 bool tiling_enabled = hierarchy_mask;
709
710 if (tiling_enabled) {
711 /* When tiling is enabled, the heap should be a tight fit */
712 unsigned heap_offset = t->heap_start - heap->gpu_va;
713 if ((heap_offset + heap_size) != heap->length) {
714 pandecode_msg("XXX: heap size %u (expected %zu)\n",
715 heap_size, heap->length - heap_offset);
716 }
717
718 /* We should also have no other flags */
719 if (tiler_flags)
720 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
721 } else {
722 /* When tiling is disabled, we should have that flag and no others */
723
724 if (tiler_flags != MALI_TILER_DISABLED) {
725 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
726 tiler_flags);
727 }
728
729 /* We should also have an empty heap */
730 if (heap_size) {
731 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
732 heap_size);
733 }
734
735 /* Disabled tiling is used only for clear-only jobs, which are
736 * purely FRAGMENT, so we should never see this for
737 * non-FRAGMENT descriptors. */
738
739 if (!is_fragment)
740 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
741 }
742
743 /* We've never seen weights used in practice, but we know from the
744 * kernel these fields is there */
745
746 bool nonzero_weights = false;
747
748 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
749 nonzero_weights |= t->weights[w] != 0x0;
750 }
751
752 if (nonzero_weights) {
753 pandecode_log(".weights = { ");
754
755 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
756 pandecode_log_cont("%d, ", t->weights[w]);
757 }
758
759 pandecode_log("},");
760 }
761
762 pandecode_indent--;
763 pandecode_log("}\n");
764 }
765
766 /* TODO: The Bifrost tiler is not understood at all yet */
767
768 static void
769 pandecode_bifrost_tiler_descriptor(const struct mali_framebuffer *fb)
770 {
771 pandecode_log(".tiler = {\n");
772 pandecode_indent++;
773
774 MEMORY_PROP(fb, tiler_meta);
775
776 for (int i = 0; i < 16; i++) {
777 if (fb->zeros[i] != 0) {
778 pandecode_msg("XXX: tiler descriptor zero %d tripped, value %x\n",
779 i, fb->zeros[i]);
780 }
781 }
782
783 pandecode_log("},\n");
784
785 pandecode_indent--;
786 pandecode_log("}\n");
787
788 }
789
790 /* Information about the framebuffer passed back for
791 * additional analysis */
792
793 struct pandecode_fbd {
794 unsigned width;
795 unsigned height;
796 unsigned rt_count;
797 bool has_extra;
798 };
799
800 static void
801 pandecode_sfbd_format(struct mali_sfbd_format format)
802 {
803 pandecode_log(".format = {\n");
804 pandecode_indent++;
805
806 pandecode_log(".unk1 = ");
807 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
808 pandecode_log_cont(",\n");
809
810 /* TODO: Map formats so we can check swizzles and print nicely */
811 pandecode_log("swizzle");
812 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
813 pandecode_log_cont(",\n");
814
815 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
816 (format.nr_channels + 1));
817
818 pandecode_log(".unk2 = ");
819 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
820 pandecode_log_cont(",\n");
821
822 pandecode_prop("block = %s", pandecode_block_format(format.block));
823
824 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
825
826 pandecode_indent--;
827 pandecode_log("},\n");
828 }
829
830 static void
831 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
832 {
833 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
834
835 if (desc->unk0)
836 pandecode_prop("unk0 = 0x%x", desc->unk0);
837
838 if (desc->shared_workgroup_count != 0x1F) {
839 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
840 if (!is_compute)
841 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
842 }
843
844 if (desc->shared_unk1 || desc->shared_shift) {
845 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
846 pandecode_prop("shared_shift = %X", desc->shared_shift);
847
848 if (!is_compute)
849 pandecode_msg("XXX: shared memory configured in noncompute shader");
850 }
851
852 if (desc->shared_zero) {
853 pandecode_msg("XXX: shared memory zero tripped\n");
854 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
855 }
856
857 if (desc->shared_memory && !is_compute)
858 pandecode_msg("XXX: shared memory used in noncompute shader\n");
859
860 MEMORY_PROP(desc, scratchpad);
861 MEMORY_PROP(desc, shared_memory);
862 MEMORY_PROP(desc, unknown1);
863
864 if (desc->scratchpad) {
865 struct pandecode_mapped_memory *smem =
866 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
867
868 pandecode_msg("scratchpad size %u\n", smem->length);
869 }
870
871 }
872
873 static struct pandecode_fbd
874 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
875 {
876 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
877 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
878
879 struct pandecode_fbd info = {
880 .has_extra = false,
881 .rt_count = 1
882 };
883
884 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
885 pandecode_indent++;
886
887 pandecode_log(".shared_memory = {\n");
888 pandecode_indent++;
889 pandecode_shared_memory(&s->shared_memory, false);
890 pandecode_indent--;
891 pandecode_log("},\n");
892
893 pandecode_sfbd_format(s->format);
894
895 info.width = s->width + 1;
896 info.height = s->height + 1;
897
898 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
899 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
900
901 MEMORY_PROP(s, checksum);
902
903 if (s->checksum_stride)
904 pandecode_prop("checksum_stride = %d", s->checksum_stride);
905
906 MEMORY_PROP(s, framebuffer);
907 pandecode_prop("stride = %d", s->stride);
908
909 /* Earlier in the actual commandstream -- right before width -- but we
910 * delay to flow nicer */
911
912 pandecode_log(".clear_flags = ");
913 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
914 pandecode_log_cont(",\n");
915
916 if (s->depth_buffer) {
917 MEMORY_PROP(s, depth_buffer);
918 pandecode_prop("depth_stride = %d", s->depth_stride);
919 }
920
921 if (s->stencil_buffer) {
922 MEMORY_PROP(s, stencil_buffer);
923 pandecode_prop("stencil_stride = %d", s->stencil_stride);
924 }
925
926 if (s->depth_stride_zero ||
927 s->stencil_stride_zero ||
928 s->zero7 || s->zero8) {
929 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
930 pandecode_prop("depth_stride_zero = 0x%x",
931 s->depth_stride_zero);
932 pandecode_prop("stencil_stride_zero = 0x%x",
933 s->stencil_stride_zero);
934 pandecode_prop("zero7 = 0x%" PRIx32,
935 s->zero7);
936 pandecode_prop("zero8 = 0x%" PRIx32,
937 s->zero8);
938 }
939
940 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
941 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
942 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
943 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
944 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
945 }
946
947 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
948 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
949 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
950 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
951 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
952 }
953
954 if (s->clear_stencil) {
955 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
956 }
957
958 const struct midgard_tiler_descriptor t = s->tiler;
959
960 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
961 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
962
963 pandecode_indent--;
964 pandecode_log("};\n");
965
966 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
967 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
968 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
969
970 pandecode_log_cont(".zero3 = {");
971
972 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
973 pandecode_log_cont("%X, ", s->zero3[i]);
974
975 pandecode_log_cont("},\n");
976
977 pandecode_log_cont(".zero6 = {");
978
979 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
980 pandecode_log_cont("%X, ", s->zero6[i]);
981
982 pandecode_log_cont("},\n");
983
984 return info;
985 }
986
987 static void
988 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
989 {
990 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
991 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
992
993 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
994 pandecode_indent++;
995 pandecode_shared_memory(s, true);
996 pandecode_indent--;
997 pandecode_log("},\n");
998 }
999
1000 /* Extracts the number of components associated with a Mali format */
1001
1002 static unsigned
1003 pandecode_format_component_count(enum mali_format fmt)
1004 {
1005 /* Mask out the format class */
1006 unsigned top = fmt & 0b11100000;
1007
1008 switch (top) {
1009 case MALI_FORMAT_SNORM:
1010 case MALI_FORMAT_UINT:
1011 case MALI_FORMAT_UNORM:
1012 case MALI_FORMAT_SINT:
1013 return ((fmt >> 3) & 3) + 1;
1014 default:
1015 /* TODO: Validate */
1016 return 4;
1017 }
1018 }
1019
1020 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
1021
1022 static unsigned
1023 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
1024 {
1025 unsigned mask = 0;
1026 assert(MALI_CHANNEL_RED == 0);
1027
1028 for (unsigned c = 0; c < 4; ++c) {
1029 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
1030
1031 if (chan <= MALI_CHANNEL_ALPHA)
1032 mask |= (1 << chan);
1033 }
1034
1035 return mask;
1036 }
1037
1038 /* Validates that a (format, swizzle) pair is valid, in the sense that the
1039 * swizzle doesn't access any components that are undefined in the format.
1040 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
1041 * omitted */
1042
1043 static bool
1044 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
1045 {
1046 unsigned nr_comp = pandecode_format_component_count(fmt);
1047 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
1048 unsigned valid_mask = (1 << nr_comp) - 1;
1049 unsigned invalid_mask = ~valid_mask;
1050
1051 if (access_mask & invalid_mask) {
1052 pandecode_msg("XXX: invalid components accessed\n");
1053 return false;
1054 }
1055
1056 /* Check for the default non-swizzling swizzle so we can suppress
1057 * useless printing for the defaults */
1058
1059 unsigned default_swizzles[4] = {
1060 MALI_CHANNEL_RED | (MALI_CHANNEL_ZERO << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
1061 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
1062 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ONE << 9),
1063 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ALPHA << 9)
1064 };
1065
1066 return (swizzle == default_swizzles[nr_comp - 1]);
1067 }
1068
1069 /* Maps MALI_RGBA32F to rgba32f, etc */
1070
1071 static void
1072 pandecode_format_short(enum mali_format fmt, bool srgb)
1073 {
1074 /* We want a type-like format, so cut off the initial MALI_ */
1075 char *format = pandecode_format(fmt);
1076 format += strlen("MALI_");
1077
1078 unsigned len = strlen(format);
1079 char *lower_format = calloc(1, len + 1);
1080
1081 for (unsigned i = 0; i < len; ++i)
1082 lower_format[i] = tolower(format[i]);
1083
1084 /* Sanity check sRGB flag is applied to RGB, per the name */
1085 if (srgb && lower_format[0] != 'r')
1086 pandecode_msg("XXX: sRGB applied to non-colour format\n");
1087
1088 /* Just prefix with an s, so you get formats like srgba8_unorm */
1089 if (srgb)
1090 pandecode_log_cont("s");
1091
1092 pandecode_log_cont("%s", lower_format);
1093 free(lower_format);
1094 }
1095
1096 static void
1097 pandecode_swizzle(unsigned swizzle, enum mali_format format)
1098 {
1099 /* First, do some validation */
1100 bool trivial_swizzle = pandecode_validate_format_swizzle(
1101 format, swizzle);
1102
1103 if (trivial_swizzle)
1104 return;
1105
1106 /* Next, print the swizzle */
1107 pandecode_log_cont(".");
1108
1109 static const char components[] = "rgba01";
1110
1111 for (unsigned c = 0; c < 4; ++c) {
1112 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
1113
1114 if (chan >= MALI_CHANNEL_RESERVED_0) {
1115 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
1116 continue;
1117 }
1118 pandecode_log_cont("%c", components[chan]);
1119 }
1120 }
1121
1122 static void
1123 pandecode_rt_format(struct mali_rt_format format)
1124 {
1125 pandecode_log(".format = {\n");
1126 pandecode_indent++;
1127
1128 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
1129 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
1130 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
1131 pandecode_prop("unk4 = 0x%" PRIx32, format.unk4);
1132
1133 pandecode_prop("block = %s", pandecode_block_format(format.block));
1134
1135 /* TODO: Map formats so we can check swizzles and print nicely */
1136 pandecode_log("swizzle");
1137 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
1138 pandecode_log_cont(",\n");
1139
1140 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
1141 (format.nr_channels + 1));
1142
1143 pandecode_log(".flags = ");
1144 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
1145 pandecode_log_cont(",\n");
1146
1147 pandecode_prop("msaa = %s", pandecode_msaa_mode(format.msaa));
1148
1149 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
1150 * which is a faster hardware-based alternative to the wallpaper method
1151 * to preserve framebuffer contents across frames. In practice, MFBD
1152 * preload is buggy on Midgard, and so this is a chicken bit. If this
1153 * bit isn't set, most likely something broke unrelated to preload */
1154
1155 if (!format.no_preload) {
1156 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
1157 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
1158 }
1159
1160 if (format.zero)
1161 pandecode_prop("zero = 0x%" PRIx32, format.zero);
1162
1163 pandecode_indent--;
1164 pandecode_log("},\n");
1165 }
1166
1167 static void
1168 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
1169 {
1170 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
1171 pandecode_indent++;
1172
1173 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
1174 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
1175 struct pandecode_mapped_memory *mem =
1176 pandecode_find_mapped_gpu_mem_containing(rt_va);
1177 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
1178
1179 pandecode_log("{\n");
1180 pandecode_indent++;
1181
1182 pandecode_rt_format(rt->format);
1183
1184 if (rt->format.block == MALI_BLOCK_AFBC) {
1185 pandecode_log(".afbc = {\n");
1186 pandecode_indent++;
1187
1188 char *a = pointer_as_memory_reference(rt->afbc.metadata);
1189 pandecode_prop("metadata = %s", a);
1190 free(a);
1191
1192 pandecode_prop("stride = %d", rt->afbc.stride);
1193
1194 pandecode_log(".flags = ");
1195 pandecode_log_decoded_flags(afbc_fmt_flag_info, rt->afbc.flags);
1196 pandecode_log_cont(",\n");
1197
1198 pandecode_indent--;
1199 pandecode_log("},\n");
1200 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.flags) {
1201 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
1202 rt->afbc.metadata,
1203 rt->afbc.stride,
1204 rt->afbc.flags);
1205 }
1206
1207 MEMORY_PROP(rt, framebuffer);
1208 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
1209
1210 if (rt->layer_stride)
1211 pandecode_prop("layer_stride = %d", rt->layer_stride);
1212
1213 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
1214 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
1215 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
1216 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
1217 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
1218 }
1219
1220 if (rt->zero1 || rt->zero2) {
1221 pandecode_msg("XXX: render target zeros tripped\n");
1222 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
1223 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
1224 }
1225
1226 pandecode_indent--;
1227 pandecode_log("},\n");
1228 }
1229
1230 pandecode_indent--;
1231 pandecode_log("};\n");
1232 }
1233
1234 static struct pandecode_fbd
1235 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
1236 {
1237 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1238 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
1239
1240 struct pandecode_fbd info;
1241
1242 if (is_bifrost && fb->msaa.sample_locations) {
1243 /* The blob stores all possible sample locations in a single buffer
1244 * allocated on startup, and just switches the pointer when switching
1245 * MSAA state. For now, we just put the data into the cmdstream, but we
1246 * should do something like what the blob does with a real driver.
1247 *
1248 * There seem to be 32 slots for sample locations, followed by another
1249 * 16. The second 16 is just the center location followed by 15 zeros
1250 * in all the cases I've identified (maybe shader vs. depth/color
1251 * samples?).
1252 */
1253
1254 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
1255
1256 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
1257
1258 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
1259 pandecode_indent++;
1260
1261 for (int i = 0; i < 32 + 16; i++) {
1262 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
1263 }
1264
1265 pandecode_indent--;
1266 pandecode_log("};\n");
1267 }
1268
1269 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
1270 pandecode_indent++;
1271
1272 if (is_bifrost) {
1273 pandecode_log(".msaa = {\n");
1274 pandecode_indent++;
1275
1276 if (fb->msaa.sample_locations)
1277 pandecode_prop("sample_locations = sample_locations_%d", job_no);
1278 else
1279 pandecode_msg("XXX: sample_locations missing\n");
1280
1281 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
1282 pandecode_msg("XXX: multisampling zero tripped\n");
1283 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
1284 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
1285 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
1286 }
1287
1288 pandecode_indent--;
1289 pandecode_log("},\n");
1290 } else {
1291 pandecode_log(".shared_memory = {\n");
1292 pandecode_indent++;
1293 pandecode_shared_memory(&fb->shared_memory, is_compute);
1294 pandecode_indent--;
1295 pandecode_log("},\n");
1296 }
1297
1298 info.width = fb->width1 + 1;
1299 info.height = fb->height1 + 1;
1300 info.rt_count = fb->rt_count_1 + 1;
1301
1302 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
1303 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
1304 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
1305 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
1306
1307 pandecode_prop("unk1 = 0x%x", fb->unk1);
1308 pandecode_prop("unk2 = 0x%x", fb->unk2);
1309 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
1310 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
1311
1312 pandecode_log(".mfbd_flags = ");
1313 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
1314 pandecode_log_cont(",\n");
1315
1316 if (fb->clear_stencil)
1317 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
1318
1319 if (fb->clear_depth)
1320 pandecode_prop("clear_depth = %f", fb->clear_depth);
1321
1322 if (!is_compute)
1323 if (is_bifrost)
1324 pandecode_bifrost_tiler_descriptor(fb);
1325 else {
1326 const struct midgard_tiler_descriptor t = fb->tiler;
1327 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
1328 }
1329 else
1330 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
1331
1332 if (fb->zero3 || fb->zero4) {
1333 pandecode_msg("XXX: framebuffer zeros tripped\n");
1334 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
1335 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
1336 }
1337
1338 pandecode_indent--;
1339 pandecode_log("};\n");
1340
1341 gpu_va += sizeof(struct mali_framebuffer);
1342
1343 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
1344
1345 if (info.has_extra) {
1346 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1347 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
1348
1349 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
1350 pandecode_indent++;
1351
1352 MEMORY_PROP(fbx, checksum);
1353
1354 if (fbx->checksum_stride)
1355 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
1356
1357 pandecode_log(".flags_hi = ");
1358 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_hi);
1359 pandecode_log_cont(",\n");
1360
1361 pandecode_log(".flags_lo = ");
1362 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
1363 pandecode_log_cont(",\n");
1364
1365 pandecode_prop("zs_block = %s", pandecode_block_format(fbx->zs_block));
1366 pandecode_prop("zs_samples = MALI_POSITIVE(%u)", fbx->zs_samples + 1);
1367
1368 if (fbx->zs_block == MALI_BLOCK_AFBC) {
1369 pandecode_log(".ds_afbc = {\n");
1370 pandecode_indent++;
1371
1372 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
1373 pandecode_prop("depth_stencil_afbc_stride = %d",
1374 fbx->ds_afbc.depth_stencil_afbc_stride);
1375 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
1376
1377 pandecode_log(".flags = ");
1378 pandecode_log_decoded_flags(afbc_fmt_flag_info, fbx->ds_afbc.flags);
1379 pandecode_log_cont(",\n");
1380
1381 if (fbx->ds_afbc.padding) {
1382 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1383 pandecode_prop("padding = 0x%" PRIx64, fbx->ds_afbc.padding);
1384 }
1385
1386 pandecode_indent--;
1387 pandecode_log("},\n");
1388 } else {
1389 pandecode_log(".ds_linear = {\n");
1390 pandecode_indent++;
1391
1392 if (fbx->ds_linear.depth) {
1393 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1394 pandecode_prop("depth_stride = %d",
1395 fbx->ds_linear.depth_stride);
1396 pandecode_prop("depth_layer_stride = %d",
1397 fbx->ds_linear.depth_layer_stride);
1398 } else if (fbx->ds_linear.depth_stride || fbx->ds_linear.depth_layer_stride) {
1399 pandecode_msg("XXX: depth stride zero tripped %d %d\n", fbx->ds_linear.depth_stride, fbx->ds_linear.depth_layer_stride);
1400 }
1401
1402 if (fbx->ds_linear.stencil) {
1403 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1404 pandecode_prop("stencil_stride = %d",
1405 fbx->ds_linear.stencil_stride);
1406 pandecode_prop("stencil_layer_stride = %d",
1407 fbx->ds_linear.stencil_layer_stride);
1408 } else if (fbx->ds_linear.stencil_stride || fbx->ds_linear.stencil_layer_stride) {
1409 pandecode_msg("XXX: stencil stride zero tripped %d %d\n", fbx->ds_linear.stencil_stride, fbx->ds_linear.stencil_layer_stride);
1410 }
1411
1412 if (fbx->ds_linear.depth_stride_zero ||
1413 fbx->ds_linear.stencil_stride_zero) {
1414 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1415 pandecode_prop("depth_stride_zero = 0x%x",
1416 fbx->ds_linear.depth_stride_zero);
1417 pandecode_prop("stencil_stride_zero = 0x%x",
1418 fbx->ds_linear.stencil_stride_zero);
1419 }
1420
1421 pandecode_indent--;
1422 pandecode_log("},\n");
1423 }
1424
1425 if (fbx->clear_color_1 | fbx->clear_color_2) {
1426 pandecode_prop("clear_color_1 = 0x%" PRIx32, fbx->clear_color_1);
1427 pandecode_prop("clear_color_2 = 0x%" PRIx32, fbx->clear_color_2);
1428 }
1429
1430 if (fbx->zero3) {
1431 pandecode_msg("XXX: fb_extra zeros tripped\n");
1432 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1433 }
1434
1435 pandecode_indent--;
1436 pandecode_log("};\n");
1437
1438 gpu_va += sizeof(struct mali_framebuffer_extra);
1439 }
1440
1441 if (is_fragment)
1442 pandecode_render_target(gpu_va, job_no, fb);
1443
1444 return info;
1445 }
1446
1447 /* Just add a comment decoding the shift/odd fields forming the padded vertices
1448 * count */
1449
1450 static void
1451 pandecode_padded_vertices(unsigned shift, unsigned k)
1452 {
1453 unsigned odd = 2*k + 1;
1454 unsigned pot = 1 << shift;
1455 pandecode_msg("padded_num_vertices = %d\n", odd * pot);
1456 }
1457
1458 /* Given a magic divisor, recover what we were trying to divide by.
1459 *
1460 * Let m represent the magic divisor. By definition, m is an element on Z, whre
1461 * 0 <= m < 2^N, for N bits in m.
1462 *
1463 * Let q represent the number we would like to divide by.
1464 *
1465 * By definition of a magic divisor for N-bit unsigned integers (a number you
1466 * multiply by to magically get division), m is a number such that:
1467 *
1468 * (m * x) & (2^N - 1) = floor(x/q).
1469 * for all x on Z where 0 <= x < 2^N
1470 *
1471 * Ignore the case where any of the above values equals zero; it is irrelevant
1472 * for our purposes (instanced arrays).
1473 *
1474 * Choose x = q. Then:
1475 *
1476 * (m * x) & (2^N - 1) = floor(x/q).
1477 * (m * q) & (2^N - 1) = floor(q/q).
1478 *
1479 * floor(q/q) = floor(1) = 1, therefore:
1480 *
1481 * (m * q) & (2^N - 1) = 1
1482 *
1483 * Recall the identity that the bitwise AND of one less than a power-of-two
1484 * equals the modulo with that power of two, i.e. for all x:
1485 *
1486 * x & (2^N - 1) = x % N
1487 *
1488 * Therefore:
1489 *
1490 * mq % (2^N) = 1
1491 *
1492 * By definition, a modular multiplicative inverse of a number m is the number
1493 * q such that with respect to a modulos M:
1494 *
1495 * mq % M = 1
1496 *
1497 * Therefore, q is the modular multiplicative inverse of m with modulus 2^N.
1498 *
1499 */
1500
1501 static void
1502 pandecode_magic_divisor(uint32_t magic, unsigned shift, unsigned orig_divisor, unsigned extra)
1503 {
1504 #if 0
1505 /* Compute the modular inverse of `magic` with respect to 2^(32 -
1506 * shift) the most lame way possible... just repeatedly add.
1507 * Asymptoptically slow but nobody cares in practice, unless you have
1508 * massive numbers of vertices or high divisors. */
1509
1510 unsigned inverse = 0;
1511
1512 /* Magic implicitly has the highest bit set */
1513 magic |= (1 << 31);
1514
1515 /* Depending on rounding direction */
1516 if (extra)
1517 magic++;
1518
1519 for (;;) {
1520 uint32_t product = magic * inverse;
1521
1522 if (shift) {
1523 product >>= shift;
1524 }
1525
1526 if (product == 1)
1527 break;
1528
1529 ++inverse;
1530 }
1531
1532 pandecode_msg("dividing by %d (maybe off by two)\n", inverse);
1533
1534 /* Recall we're supposed to divide by (gl_level_divisor *
1535 * padded_num_vertices) */
1536
1537 unsigned padded_num_vertices = inverse / orig_divisor;
1538
1539 pandecode_msg("padded_num_vertices = %d\n", padded_num_vertices);
1540 #endif
1541 }
1542
1543 static void
1544 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1545 mali_ptr addr, int job_no, char *suffix,
1546 int count, bool varying, enum mali_job_type job_type)
1547 {
1548 char *prefix = varying ? "varying" : "attribute";
1549 assert(addr);
1550
1551 if (!count) {
1552 pandecode_msg("warn: No %s records\n", prefix);
1553 return;
1554 }
1555
1556 union mali_attr *attr = pandecode_fetch_gpu_mem(mem, addr, sizeof(union mali_attr) * count);
1557
1558 for (int i = 0; i < count; ++i) {
1559 /* First, check for special records */
1560 if (attr[i].elements < MALI_RECORD_SPECIAL) {
1561 if (attr[i].size)
1562 pandecode_msg("XXX: tripped size=%d\n", attr[i].size);
1563
1564 if (attr[i].stride) {
1565 /* gl_InstanceID passes a magic divisor in the
1566 * stride field to divide by the padded vertex
1567 * count. No other records should do so, so
1568 * stride should otherwise be zero. Note that
1569 * stride in the usual attribute sense doesn't
1570 * apply to special records. */
1571
1572 bool has_divisor = attr[i].elements == MALI_ATTR_INSTANCEID;
1573
1574 pandecode_log_cont("/* %smagic divisor = %X */ ",
1575 has_divisor ? "" : "XXX: ", attr[i].stride);
1576 }
1577
1578 if (attr[i].shift || attr[i].extra_flags) {
1579 /* Attributes use these fields for
1580 * instancing/padding/etc type issues, but
1581 * varyings don't */
1582
1583 pandecode_log_cont("/* %sshift=%d, extra=%d */ ",
1584 varying ? "XXX: " : "",
1585 attr[i].shift, attr[i].extra_flags);
1586 }
1587
1588 /* Print the special record name */
1589 bool attribute = false;
1590 pandecode_log("%s_%d = %s;\n", prefix, i, pandecode_special_record(attr[i].elements, &attribute));
1591
1592 /* Sanity check */
1593 if (attribute == varying)
1594 pandecode_msg("XXX: mismatched special record\n");
1595
1596 continue;
1597 }
1598
1599 enum mali_attr_mode mode = attr[i].elements & 7;
1600
1601 if (mode == MALI_ATTR_UNUSED)
1602 pandecode_msg("XXX: unused attribute record\n");
1603
1604 /* For non-linear records, we need to print the type of record */
1605 if (mode != MALI_ATTR_LINEAR)
1606 pandecode_log_cont("%s ", pandecode_attr_mode_short(mode));
1607
1608 /* Print the name to link with attr_meta */
1609 pandecode_log_cont("%s_%d", prefix, i);
1610
1611 /* Print the stride and size */
1612 pandecode_log_cont("<%u>[%u]", attr[i].stride, attr[i].size);
1613
1614 /* TODO: Sanity check the quotient itself. It must be equal to
1615 * (or be greater than, if the driver added padding) the padded
1616 * vertex count. */
1617
1618 /* Finally, print the pointer */
1619 mali_ptr raw_elements = attr[i].elements & ~7;
1620 char *a = pointer_as_memory_reference(raw_elements);
1621 pandecode_log_cont(" = (%s);\n", a);
1622 free(a);
1623
1624 /* Check the pointer */
1625 pandecode_validate_buffer(raw_elements, attr[i].size);
1626
1627 /* shift/extra_flags exist only for instanced */
1628 if (attr[i].shift | attr[i].extra_flags) {
1629 /* These are set to random values by the blob for
1630 * varyings, most likely a symptom of uninitialized
1631 * memory where the hardware masked the bug. As such we
1632 * put this at a warning, not an error. */
1633
1634 if (mode == MALI_ATTR_LINEAR)
1635 pandecode_msg("warn: instancing fields set for linear\n");
1636
1637 pandecode_prop("shift = %d", attr[i].shift);
1638 pandecode_prop("extra_flags = %d", attr[i].extra_flags);
1639 }
1640
1641 /* Decode further where possible */
1642
1643 if (mode == MALI_ATTR_MODULO) {
1644 pandecode_padded_vertices(
1645 attr[i].shift,
1646 attr[i].extra_flags);
1647 }
1648
1649 if (mode == MALI_ATTR_NPOT_DIVIDE) {
1650 i++;
1651 pandecode_log("{\n");
1652 pandecode_indent++;
1653 pandecode_prop("unk = 0x%x", attr[i].unk);
1654 pandecode_prop("magic_divisor = 0x%08x", attr[i].magic_divisor);
1655 if (attr[i].zero != 0)
1656 pandecode_prop("XXX: zero tripped (0x%x)\n", attr[i].zero);
1657 pandecode_prop("divisor = %d", attr[i].divisor);
1658 pandecode_magic_divisor(attr[i].magic_divisor, attr[i - 1].shift, attr[i].divisor, attr[i - 1].extra_flags);
1659 pandecode_indent--;
1660 pandecode_log("}, \n");
1661 }
1662
1663 }
1664
1665 pandecode_log("\n");
1666 }
1667
1668 static mali_ptr
1669 pandecode_shader_address(const char *name, mali_ptr ptr)
1670 {
1671 /* TODO: Decode flags */
1672 mali_ptr shader_ptr = ptr & ~15;
1673
1674 char *a = pointer_as_memory_reference(shader_ptr);
1675 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1676 free(a);
1677
1678 return shader_ptr;
1679 }
1680
1681 static void
1682 pandecode_stencil(const char *name, const struct mali_stencil_test *stencil)
1683 {
1684 unsigned any_nonzero =
1685 stencil->ref | stencil->mask | stencil->func |
1686 stencil->sfail | stencil->dpfail | stencil->dppass;
1687
1688 if (any_nonzero == 0)
1689 return;
1690
1691 const char *func = pandecode_func(stencil->func);
1692 const char *sfail = pandecode_stencil_op(stencil->sfail);
1693 const char *dpfail = pandecode_stencil_op(stencil->dpfail);
1694 const char *dppass = pandecode_stencil_op(stencil->dppass);
1695
1696 if (stencil->zero)
1697 pandecode_msg("XXX: stencil zero tripped: %X\n", stencil->zero);
1698
1699 pandecode_log(".stencil_%s = {\n", name);
1700 pandecode_indent++;
1701 pandecode_prop("ref = %d", stencil->ref);
1702 pandecode_prop("mask = 0x%02X", stencil->mask);
1703 pandecode_prop("func = %s", func);
1704 pandecode_prop("sfail = %s", sfail);
1705 pandecode_prop("dpfail = %s", dpfail);
1706 pandecode_prop("dppass = %s", dppass);
1707 pandecode_indent--;
1708 pandecode_log("},\n");
1709 }
1710
1711 static void
1712 pandecode_blend_equation(const struct mali_blend_equation *blend)
1713 {
1714 if (blend->zero1)
1715 pandecode_msg("XXX: blend zero tripped: %X\n", blend->zero1);
1716
1717 pandecode_log(".equation = {\n");
1718 pandecode_indent++;
1719
1720 pandecode_prop("rgb_mode = 0x%X", blend->rgb_mode);
1721 pandecode_prop("alpha_mode = 0x%X", blend->alpha_mode);
1722
1723 pandecode_log(".color_mask = ");
1724 pandecode_log_decoded_flags(mask_flag_info, blend->color_mask);
1725 pandecode_log_cont(",\n");
1726
1727 pandecode_indent--;
1728 pandecode_log("},\n");
1729 }
1730
1731 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1732
1733 static unsigned
1734 decode_bifrost_constant(u16 constant)
1735 {
1736 float lo = (float) (constant & 0xFF);
1737 float hi = (float) (constant >> 8);
1738
1739 return (hi / 255.0) + (lo / 65535.0);
1740 }
1741
1742 static mali_ptr
1743 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1744 {
1745 struct bifrost_blend_rt *b =
1746 ((struct bifrost_blend_rt *) descs) + rt_no;
1747
1748 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1749 pandecode_indent++;
1750
1751 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1752 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1753 b->constant, decode_bifrost_constant(b->constant));
1754
1755 /* TODO figure out blend shader enable bit */
1756 pandecode_blend_equation(&b->equation);
1757
1758 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1759 pandecode_prop("index = 0x%" PRIx16, b->index);
1760
1761 pandecode_log(".format = ");
1762 pandecode_format_short(b->format, false);
1763 pandecode_swizzle(b->swizzle, b->format);
1764 pandecode_log_cont(",\n");
1765
1766 pandecode_prop("swizzle = 0x%" PRIx32, b->swizzle);
1767 pandecode_prop("format = 0x%" PRIx32, b->format);
1768
1769 if (b->zero1) {
1770 pandecode_msg("XXX: pandecode_bifrost_blend zero1 tripped\n");
1771 pandecode_prop("zero1 = 0x%" PRIx32, b->zero1);
1772 }
1773
1774 pandecode_log(".shader_type = ");
1775 switch(b->shader_type) {
1776 case BIFROST_BLEND_F16:
1777 pandecode_log_cont("BIFROST_BLEND_F16");
1778 break;
1779 case BIFROST_BLEND_F32:
1780 pandecode_log_cont("BIFROST_BLEND_F32");
1781 break;
1782 case BIFROST_BLEND_I32:
1783 pandecode_log_cont("BIFROST_BLEND_I32");
1784 break;
1785 case BIFROST_BLEND_U32:
1786 pandecode_log_cont("BIFROST_BLEND_U32");
1787 break;
1788 case BIFROST_BLEND_I16:
1789 pandecode_log_cont("BIFROST_BLEND_I16");
1790 break;
1791 case BIFROST_BLEND_U16:
1792 pandecode_log_cont("BIFROST_BLEND_U16");
1793 break;
1794 }
1795 pandecode_log_cont(",\n");
1796
1797 if (b->zero2) {
1798 pandecode_msg("XXX: pandecode_bifrost_blend zero2 tripped\n");
1799 pandecode_prop("zero2 = 0x%" PRIx32, b->zero2);
1800 }
1801
1802 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1803
1804 pandecode_indent--;
1805 pandecode_log("},\n");
1806
1807 return 0;
1808 }
1809
1810 static mali_ptr
1811 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1812 {
1813 /* constant/equation is in a union */
1814 if (!blend->shader)
1815 return 0;
1816
1817 pandecode_log(".blend = {\n");
1818 pandecode_indent++;
1819
1820 if (is_shader) {
1821 pandecode_shader_address("shader", blend->shader);
1822 } else {
1823 pandecode_blend_equation(&blend->equation);
1824 pandecode_prop("constant = %f", blend->constant);
1825 }
1826
1827 pandecode_indent--;
1828 pandecode_log("},\n");
1829
1830 /* Return blend shader to disassemble if present */
1831 return is_shader ? (blend->shader & ~0xF) : 0;
1832 }
1833
1834 static mali_ptr
1835 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1836 {
1837 struct midgard_blend_rt *b =
1838 ((struct midgard_blend_rt *) descs) + rt_no;
1839
1840 /* Flags determine presence of blend shader */
1841 bool is_shader = (b->flags & 0xF) >= 0x2;
1842
1843 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1844 pandecode_indent++;
1845
1846 pandecode_prop("flags = 0x%" PRIx64, b->flags);
1847
1848 union midgard_blend blend = b->blend;
1849 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1850
1851 pandecode_indent--;
1852 pandecode_log("};\n");
1853
1854 return shader;
1855 }
1856
1857 /* Attributes and varyings have descriptor records, which contain information
1858 * about their format and ordering with the attribute/varying buffers. We'll
1859 * want to validate that the combinations specified are self-consistent.
1860 */
1861
1862 static int
1863 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1864 {
1865 char base[128];
1866 char *prefix = varying ? "varying" : "attribute";
1867 unsigned max_index = 0;
1868 snprintf(base, sizeof(base), "%s_meta", prefix);
1869
1870 struct mali_attr_meta *attr_meta;
1871 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1872
1873 struct pandecode_mapped_memory *attr_mem = pandecode_find_mapped_gpu_mem_containing(p);
1874
1875 for (int i = 0; i < count; ++i, p += sizeof(struct mali_attr_meta)) {
1876 attr_meta = pandecode_fetch_gpu_mem(attr_mem, p,
1877 sizeof(*attr_mem));
1878
1879 /* If the record is discard, it should be zero for everything else */
1880
1881 if (attr_meta->format == MALI_VARYING_DISCARD) {
1882 uint64_t zero =
1883 attr_meta->index |
1884 attr_meta->unknown1 |
1885 attr_meta->unknown3 |
1886 attr_meta->src_offset;
1887
1888 if (zero)
1889 pandecode_msg("XXX: expected empty record for varying discard\n");
1890
1891 /* We want to look for a literal 0000 swizzle -- this
1892 * is not encoded with all zeroes, however */
1893
1894 enum mali_channel z = MALI_CHANNEL_ZERO;
1895 unsigned zero_swizzle = z | (z << 3) | (z << 6) | (z << 9);
1896 bool good_swizzle = attr_meta->swizzle == zero_swizzle;
1897
1898 if (!good_swizzle)
1899 pandecode_msg("XXX: expected zero swizzle for discard\n");
1900
1901 if (!varying)
1902 pandecode_msg("XXX: cannot discard attribute\n");
1903
1904 /* If we're all good, omit the record */
1905 if (!zero && varying && good_swizzle) {
1906 pandecode_log("/* discarded varying */\n");
1907 continue;
1908 }
1909 }
1910
1911 if (attr_meta->index > max_index)
1912 max_index = attr_meta->index;
1913
1914 if (attr_meta->unknown1 != 0x2) {
1915 pandecode_msg("XXX: expected unknown1 = 0x2\n");
1916 pandecode_prop("unknown1 = 0x%" PRIx64, (u64) attr_meta->unknown1);
1917 }
1918
1919 if (attr_meta->unknown3) {
1920 pandecode_msg("XXX: unexpected unknown3 set\n");
1921 pandecode_prop("unknown3 = 0x%" PRIx64, (u64) attr_meta->unknown3);
1922 }
1923
1924 pandecode_format_short(attr_meta->format, false);
1925 pandecode_log_cont(" %s_%u", prefix, attr_meta->index);
1926
1927 if (attr_meta->src_offset)
1928 pandecode_log_cont("[%u]", attr_meta->src_offset);
1929
1930 pandecode_swizzle(attr_meta->swizzle, attr_meta->format);
1931
1932 pandecode_log_cont(";\n");
1933 }
1934
1935 pandecode_log("\n");
1936
1937 return count ? (max_index + 1) : 0;
1938 }
1939
1940 /* return bits [lo, hi) of word */
1941 static u32
1942 bits(u32 word, u32 lo, u32 hi)
1943 {
1944 if (hi - lo >= 32)
1945 return word; // avoid undefined behavior with the shift
1946
1947 return (word >> lo) & ((1 << (hi - lo)) - 1);
1948 }
1949
1950 static void
1951 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1952 {
1953 pandecode_log(".prefix = {\n");
1954 pandecode_indent++;
1955
1956 /* Decode invocation_count. See the comment before the definition of
1957 * invocation_count for an explanation.
1958 */
1959
1960 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1961 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1962 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1963 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1964 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1965 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1966
1967 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1968 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1969 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1970
1971 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1972 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1973 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
1974
1975 /* Even though we have this decoded, we want to ensure that the
1976 * representation is "unique" so we don't lose anything by printing only
1977 * the final result. More specifically, we need to check that we were
1978 * passed something in canonical form, since the definition per the
1979 * hardware is inherently not unique. How? Well, take the resulting
1980 * decode and pack it ourselves! If it is bit exact with what we
1981 * decoded, we're good to go. */
1982
1983 struct mali_vertex_tiler_prefix ref;
1984 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
1985
1986 bool canonical =
1987 (p->invocation_count == ref.invocation_count) &&
1988 (p->invocation_shifts == ref.invocation_shifts);
1989
1990 if (!canonical) {
1991 pandecode_msg("XXX: non-canonical workgroups packing\n");
1992 pandecode_msg("expected: %X, %X",
1993 ref.invocation_count,
1994 ref.invocation_shifts);
1995
1996 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
1997 pandecode_prop("size_y_shift = %d", size_y_shift);
1998 pandecode_prop("size_z_shift = %d", size_z_shift);
1999 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
2000 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
2001 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
2002 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
2003 }
2004
2005 /* Regardless, print the decode */
2006 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
2007 size_x, size_y, size_z,
2008 groups_x, groups_y, groups_z);
2009
2010 /* TODO: Decode */
2011 if (p->unknown_draw)
2012 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
2013
2014 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
2015
2016 if (p->draw_mode != MALI_DRAW_NONE)
2017 pandecode_prop("draw_mode = %s", pandecode_draw_mode(p->draw_mode));
2018
2019 /* Index count only exists for tiler jobs anyway */
2020
2021 if (p->index_count)
2022 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
2023
2024
2025 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
2026 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
2027
2028 /* Validate an index buffer is present if we need one. TODO: verify
2029 * relationship between invocation_count and index_count */
2030
2031 if (p->indices) {
2032 unsigned count = p->index_count;
2033
2034 /* Grab the size */
2035 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
2036
2037 /* Ensure we got a size, and if so, validate the index buffer
2038 * is large enough to hold a full set of indices of the given
2039 * size */
2040
2041 if (!index_raw_size)
2042 pandecode_msg("XXX: index size missing\n");
2043 else
2044 pandecode_validate_buffer(p->indices, count * size);
2045 } else if (index_raw_size)
2046 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
2047
2048 if (p->offset_bias_correction)
2049 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
2050
2051 /* TODO: Figure out what this is. It's not zero */
2052 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
2053
2054 pandecode_indent--;
2055 pandecode_log("},\n");
2056 }
2057
2058 static void
2059 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
2060 {
2061 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
2062 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
2063
2064 for (int i = 0; i < ubufs_count; i++) {
2065 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
2066 mali_ptr addr = (ubufs[i] >> 10) << 2;
2067
2068 pandecode_validate_buffer(addr, size);
2069
2070 char *ptr = pointer_as_memory_reference(addr);
2071 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
2072 free(ptr);
2073 }
2074
2075 pandecode_log("\n");
2076 }
2077
2078 static void
2079 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
2080 {
2081 pandecode_validate_buffer(uniforms, uniform_count * 16);
2082
2083 char *ptr = pointer_as_memory_reference(uniforms);
2084 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
2085 free(ptr);
2086 }
2087
2088 static const char *
2089 shader_type_for_job(unsigned type)
2090 {
2091 switch (type) {
2092 case MALI_JOB_TYPE_VERTEX: return "VERTEX";
2093 case MALI_JOB_TYPE_TILER: return "FRAGMENT";
2094 case MALI_JOB_TYPE_COMPUTE: return "COMPUTE";
2095 default:
2096 return "UNKNOWN";
2097 }
2098 }
2099
2100 static unsigned shader_id = 0;
2101
2102 static struct midgard_disasm_stats
2103 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
2104 bool is_bifrost, unsigned gpu_id)
2105 {
2106 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
2107 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
2108
2109 /* Compute maximum possible size */
2110 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
2111
2112 /* Print some boilerplate to clearly denote the assembly (which doesn't
2113 * obey indentation rules), and actually do the disassembly! */
2114
2115 pandecode_log_cont("\n\n");
2116
2117 struct midgard_disasm_stats stats;
2118
2119 if (is_bifrost) {
2120 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
2121
2122 /* TODO: Extend stats to Bifrost */
2123 stats.texture_count = -128;
2124 stats.sampler_count = -128;
2125 stats.attribute_count = -128;
2126 stats.varying_count = -128;
2127 stats.uniform_count = -128;
2128 stats.uniform_buffer_count = -128;
2129 stats.work_count = -128;
2130
2131 stats.instruction_count = 0;
2132 stats.bundle_count = 0;
2133 stats.quadword_count = 0;
2134 stats.helper_invocations = false;
2135 } else {
2136 stats = disassemble_midgard(pandecode_dump_stream,
2137 code, sz, gpu_id,
2138 type == MALI_JOB_TYPE_TILER ?
2139 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
2140 }
2141
2142 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
2143 * driver-internal purposes with the blob and interfere */
2144
2145 bool should_shaderdb = type != MALI_JOB_TYPE_COMPUTE;
2146
2147 if (should_shaderdb) {
2148 unsigned nr_threads =
2149 (stats.work_count <= 4) ? 4 :
2150 (stats.work_count <= 8) ? 2 :
2151 1;
2152
2153 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
2154 "%u inst, %u bundles, %u quadwords, "
2155 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
2156 shader_id++,
2157 shader_type_for_job(type),
2158 stats.instruction_count, stats.bundle_count, stats.quadword_count,
2159 stats.work_count, nr_threads);
2160 }
2161
2162
2163 return stats;
2164 }
2165
2166 static void
2167 pandecode_texture_payload(mali_ptr payload,
2168 enum mali_texture_type type,
2169 enum mali_texture_layout layout,
2170 bool manual_stride,
2171 uint8_t levels,
2172 uint16_t depth,
2173 uint16_t array_size,
2174 struct pandecode_mapped_memory *tmem)
2175 {
2176 pandecode_log(".payload = {\n");
2177 pandecode_indent++;
2178
2179 /* A bunch of bitmap pointers follow.
2180 * We work out the correct number,
2181 * based on the mipmap/cubemap
2182 * properties, but dump extra
2183 * possibilities to futureproof */
2184
2185 int bitmap_count = levels + 1;
2186
2187 /* Miptree for each face */
2188 if (type == MALI_TEX_CUBE)
2189 bitmap_count *= 6;
2190
2191 /* Array of layers */
2192 bitmap_count *= (depth + 1);
2193
2194 /* Array of textures */
2195 bitmap_count *= (array_size + 1);
2196
2197 /* Stride for each element */
2198 if (manual_stride)
2199 bitmap_count *= 2;
2200
2201 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
2202 payload, sizeof(mali_ptr) * bitmap_count);
2203 for (int i = 0; i < bitmap_count; ++i) {
2204 /* How we dump depends if this is a stride or a pointer */
2205
2206 if (manual_stride && (i & 1)) {
2207 /* signed 32-bit snuck in as a 64-bit pointer */
2208 uint64_t stride_set = pointers_and_strides[i];
2209 uint32_t clamped_stride = stride_set;
2210 int32_t stride = clamped_stride;
2211 assert(stride_set == clamped_stride);
2212 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
2213 } else {
2214 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
2215 pandecode_log("%s, \n", a);
2216 free(a);
2217 }
2218 }
2219
2220 pandecode_indent--;
2221 pandecode_log("},\n");
2222 }
2223
2224 static void
2225 pandecode_texture(mali_ptr u,
2226 struct pandecode_mapped_memory *tmem,
2227 unsigned job_no, unsigned tex)
2228 {
2229 struct mali_texture_descriptor *PANDECODE_PTR_VAR(t, tmem, u);
2230
2231 pandecode_log("struct mali_texture_descriptor texture_descriptor_%"PRIx64"_%d_%d = {\n", u, job_no, tex);
2232 pandecode_indent++;
2233
2234 pandecode_prop("width = %" PRId32, t->width);
2235 pandecode_prop("height = %" PRId32, t->height);
2236 pandecode_prop("depth = %" PRId32, t->depth);
2237 pandecode_prop("array_size = %" PRId32, t->array_size);
2238
2239 pandecode_log("\n");
2240 pandecode_prop("f.swizzle = 0x%" PRIx32, t->format.swizzle);
2241 pandecode_prop("f.format = 0x%" PRIx32, t->format.format);
2242 pandecode_prop("f.srgb = 0x%" PRIx32, t->format.srgb);
2243 pandecode_prop("f.unknown1 = 0x%" PRIx32, t->format.unknown1);
2244 pandecode_prop("f.type = %" PRId32, t->format.type);
2245 pandecode_prop("f.layout = %" PRId32, t->format.layout);
2246 pandecode_prop("f.unknown2 = 0x%" PRIx32, t->format.unknown2);
2247 pandecode_prop("f.manual_stride = %" PRId32, t->format.manual_stride);
2248 pandecode_prop("f.zero = 0x%" PRIx32, t->format.zero);
2249 pandecode_log("\n");
2250
2251 pandecode_prop("unknown3 = 0x%" PRIx32, t->unknown3);
2252 pandecode_prop("unknown3A = 0x%" PRIx32, t->unknown3A);
2253 pandecode_prop("levels = %" PRId32, t->levels);
2254 pandecode_prop("swizzle = 0x%" PRIx32, t->swizzle);
2255 pandecode_prop("swizzle_zero = 0x%" PRIx32, t->swizzle_zero);
2256
2257 pandecode_prop("unknown5 = 0x%" PRIx32, t->unknown5);
2258 pandecode_prop("unknown6 = 0x%" PRIx32, t->unknown6);
2259 pandecode_prop("unknown7 = 0x%" PRIx32, t->unknown7);
2260 pandecode_log("\n");
2261
2262 struct mali_texture_format f = t->format;
2263
2264 /* See the definiton of enum mali_texture_type */
2265
2266 bool is_cube = f.type == MALI_TEX_CUBE;
2267 unsigned dimension = is_cube ? 2 : f.type;
2268
2269 pandecode_make_indent();
2270
2271 /* Print the layout. Default is linear; a modifier can denote AFBC or
2272 * u-interleaved/tiled modes */
2273
2274 if (f.layout == MALI_TEXTURE_AFBC)
2275 pandecode_log_cont("afbc");
2276 else if (f.layout == MALI_TEXTURE_TILED)
2277 pandecode_log_cont("tiled");
2278 else if (f.layout == MALI_TEXTURE_LINEAR)
2279 pandecode_log_cont("linear");
2280 else
2281 pandecode_msg("XXX: invalid texture layout 0x%X\n", f.layout);
2282
2283 pandecode_swizzle(t->swizzle, f.format);
2284 pandecode_log_cont(" ");
2285
2286 /* Distinguish cube/2D with modifier */
2287
2288 if (is_cube)
2289 pandecode_log_cont("cube ");
2290
2291 pandecode_format_short(f.format, f.srgb);
2292 pandecode_swizzle(f.swizzle, f.format);
2293
2294 /* All four width/height/depth/array_size dimensions are present
2295 * regardless of the type of texture, but it is an error to have
2296 * non-zero dimensions for unused dimensions. Verify this. array_size
2297 * can always be set, as can width. Depth used for MSAA. */
2298
2299 if (t->height && dimension < 2)
2300 pandecode_msg("XXX: nonzero height for <2D texture\n");
2301
2302 /* Print only the dimensions that are actually there */
2303
2304 pandecode_log_cont(": %d", t->width + 1);
2305
2306 if (t->height || t->depth)
2307 pandecode_log_cont("x%u", t->height + 1);
2308
2309 if (t->depth)
2310 pandecode_log_cont("x%u", t->depth + 1);
2311
2312 if (t->array_size)
2313 pandecode_log_cont("[%u]", t->array_size + 1);
2314
2315 if (t->levels)
2316 pandecode_log_cont(" mip %u", t->levels);
2317
2318 pandecode_log_cont("\n");
2319
2320 if (f.unknown1 | f.zero) {
2321 pandecode_msg("XXX: texture format zero tripped\n");
2322 pandecode_prop("unknown1 = %" PRId32, f.unknown1);
2323 pandecode_prop("zero = %" PRId32, f.zero);
2324 }
2325
2326 if (!f.unknown2) {
2327 pandecode_msg("XXX: expected unknown texture bit set\n");
2328 pandecode_prop("unknown2 = %" PRId32, f.unknown2);
2329 }
2330
2331 if (t->swizzle_zero) {
2332 pandecode_msg("XXX: swizzle zero tripped\n");
2333 pandecode_prop("swizzle_zero = %d", t->swizzle_zero);
2334 }
2335
2336 if (t->unknown3 | t->unknown3A | t->unknown5 | t->unknown6 | t->unknown7) {
2337 pandecode_msg("XXX: texture zero tripped\n");
2338 pandecode_prop("unknown3 = %" PRId16, t->unknown3);
2339 pandecode_prop("unknown3A = %" PRId8, t->unknown3A);
2340 pandecode_prop("unknown5 = 0x%" PRIx32, t->unknown5);
2341 pandecode_prop("unknown6 = 0x%" PRIx32, t->unknown6);
2342 pandecode_prop("unknown7 = 0x%" PRIx32, t->unknown7);
2343 }
2344
2345 pandecode_texture_payload(u + sizeof(*t), f.type, f.layout, f.manual_stride, t->levels, t->depth, t->array_size, tmem);
2346
2347 pandecode_indent--;
2348 pandecode_log("};\n");
2349 }
2350
2351 static void
2352 pandecode_bifrost_texture(
2353 const struct bifrost_texture_descriptor *t,
2354 unsigned job_no,
2355 unsigned tex)
2356 {
2357 pandecode_log("struct bifrost_texture_descriptor texture_descriptor_%d_%d = {\n", job_no, tex);
2358 pandecode_indent++;
2359
2360 pandecode_prop("format_unk = 0x%" PRIx32, t->format_unk);
2361 pandecode_prop("type = %" PRId32, t->type);
2362
2363 if (t->zero) {
2364 pandecode_msg("XXX: zero tripped\n");
2365 pandecode_prop("zero = 0x%" PRIx32, t->zero);
2366 }
2367
2368 pandecode_prop("format_swizzle = 0x%" PRIx32, t->format_swizzle);
2369 pandecode_prop("format = 0x%" PRIx32, t->format);
2370 pandecode_prop("srgb = 0x%" PRIx32, t->srgb);
2371 pandecode_prop("format_unk3 = 0x%" PRIx32, t->format_unk3);
2372 pandecode_prop("width = %" PRId32, t->width);
2373 pandecode_prop("height = %" PRId32, t->height);
2374 pandecode_prop("swizzle = 0x%" PRIx32, t->swizzle);
2375 pandecode_prop("levels = %" PRId32, t->levels);
2376 pandecode_prop("unk1 = 0x%" PRIx32, t->unk1);
2377 pandecode_prop("levels_unk = %" PRId32, t->levels_unk);
2378 pandecode_prop("level_2 = %" PRId32, t->level_2);
2379 pandecode_prop("payload = 0x%" PRIx64, t->payload);
2380 pandecode_prop("array_size = %" PRId32, t->array_size);
2381 pandecode_prop("unk4 = 0x%" PRIx32, t->unk4);
2382 pandecode_prop("depth = %" PRId32, t->depth);
2383 pandecode_prop("unk5 = 0x%" PRIx32, t->unk5);
2384 pandecode_log("\n");
2385
2386 /* See the definiton of enum mali_texture_type */
2387
2388 bool is_cube = t->type == MALI_TEX_CUBE;
2389 unsigned dimension = is_cube ? 2 : t->type;
2390
2391 /* Print the layout. Default is linear; a modifier can denote AFBC or
2392 * u-interleaved/tiled modes */
2393
2394 if (t->layout == MALI_TEXTURE_AFBC)
2395 pandecode_log_cont("afbc");
2396 else if (t->layout == MALI_TEXTURE_TILED)
2397 pandecode_log_cont("tiled");
2398 else if (t->layout == MALI_TEXTURE_LINEAR)
2399 pandecode_log_cont("linear");
2400 else
2401 pandecode_msg("XXX: invalid texture layout 0x%X\n", t->layout);
2402
2403 pandecode_swizzle(t->swizzle, t->format);
2404 pandecode_log_cont(" ");
2405
2406 /* Distinguish cube/2D with modifier */
2407
2408 if (is_cube)
2409 pandecode_log_cont("cube ");
2410
2411 pandecode_format_short(t->format, t->srgb);
2412
2413 /* All four width/height/depth/array_size dimensions are present
2414 * regardless of the type of texture, but it is an error to have
2415 * non-zero dimensions for unused dimensions. Verify this. array_size
2416 * can always be set, as can width. */
2417
2418 if (t->height && dimension < 2)
2419 pandecode_msg("XXX: nonzero height for <2D texture\n");
2420
2421 if (t->depth && dimension < 3)
2422 pandecode_msg("XXX: nonzero depth for <2D texture\n");
2423
2424 /* Print only the dimensions that are actually there */
2425
2426 pandecode_log_cont(": %d", t->width + 1);
2427
2428 if (dimension >= 2)
2429 pandecode_log_cont("x%u", t->height + 1);
2430
2431 if (dimension >= 3)
2432 pandecode_log_cont("x%u", t->depth + 1);
2433
2434 if (t->array_size)
2435 pandecode_log_cont("[%u]", t->array_size + 1);
2436
2437 if (t->levels)
2438 pandecode_log_cont(" mip %u", t->levels);
2439
2440 pandecode_log_cont("\n");
2441
2442 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(t->payload);
2443 if (t->payload) {
2444 pandecode_texture_payload(t->payload, t->type, t->layout,
2445 true, t->levels, t->depth,
2446 t->array_size, tmem);
2447 }
2448
2449 pandecode_indent--;
2450 pandecode_log("};\n");
2451 }
2452
2453 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
2454
2455 static void
2456 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
2457 {
2458 /* Nothing to do */
2459 if (claim == truth)
2460 return;
2461
2462 if (fuzzy && (truth < 0))
2463 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
2464
2465 if ((truth >= 0) && !fuzzy) {
2466 pandecode_msg("%s: expected %s = %d, claimed %u\n",
2467 (truth < claim) ? "warn" : "XXX",
2468 name, truth, claim);
2469 } else if ((claim > -truth) && !fuzzy) {
2470 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
2471 name, -truth, claim);
2472 } else if (fuzzy && (claim < truth))
2473 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
2474 name, truth, claim);
2475
2476 pandecode_log(".%s = %" PRId16, name, claim);
2477
2478 if (fuzzy)
2479 pandecode_log_cont(" /* %u used */", truth);
2480
2481 pandecode_log_cont(",\n");
2482 }
2483
2484 static void
2485 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
2486 bool is_bifrost, unsigned gpu_id)
2487 {
2488 struct midgard_disasm_stats stats =
2489 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
2490
2491 bool has_texture = (stats.texture_count > 0);
2492 bool has_sampler = (stats.sampler_count > 0);
2493 bool has_attribute = (stats.attribute_count > 0);
2494 bool has_varying = (stats.varying_count > 0);
2495 bool has_uniform = (stats.uniform_count > 0);
2496 bool has_ubo = (stats.uniform_buffer_count > 0);
2497
2498 if (has_texture || has_sampler)
2499 pandecode_msg("XXX: blend shader accessing textures\n");
2500
2501 if (has_attribute || has_varying)
2502 pandecode_msg("XXX: blend shader accessing interstage\n");
2503
2504 if (has_uniform || has_ubo)
2505 pandecode_msg("XXX: blend shader accessing uniforms\n");
2506 }
2507
2508 static void
2509 pandecode_textures(mali_ptr textures, unsigned texture_count, int job_no, bool is_bifrost)
2510 {
2511 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(textures);
2512
2513 if (!mmem)
2514 return;
2515
2516 if (is_bifrost) {
2517 const struct bifrost_texture_descriptor *PANDECODE_PTR_VAR(t, mmem, textures);
2518
2519 pandecode_log("uint64_t textures_%"PRIx64"_%d[] = {\n", textures, job_no);
2520 pandecode_indent++;
2521
2522 for (unsigned tex = 0; tex < texture_count; ++tex)
2523 pandecode_bifrost_texture(&t[tex], job_no, tex);
2524
2525 pandecode_indent--;
2526 pandecode_log("};\n");
2527 } else {
2528 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures);
2529
2530 pandecode_log("uint64_t textures_%"PRIx64"_%d[] = {\n", textures, job_no);
2531 pandecode_indent++;
2532
2533 for (int tex = 0; tex < texture_count; ++tex) {
2534 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2535 char *a = pointer_as_memory_reference(*u);
2536 pandecode_log("%s,\n", a);
2537 free(a);
2538 }
2539
2540 pandecode_indent--;
2541 pandecode_log("};\n");
2542
2543 /* Now, finally, descend down into the texture descriptor */
2544 for (unsigned tex = 0; tex < texture_count; ++tex) {
2545 mali_ptr *PANDECODE_PTR_VAR(u, mmem, textures + tex * sizeof(mali_ptr));
2546 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
2547 if (tmem)
2548 pandecode_texture(*u, tmem, job_no, tex);
2549 }
2550 }
2551 }
2552
2553 static void
2554 pandecode_samplers(mali_ptr samplers, unsigned sampler_count, int job_no, bool is_bifrost)
2555 {
2556 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(samplers);
2557
2558 if (!smem)
2559 return;
2560
2561 if (is_bifrost) {
2562 struct bifrost_sampler_descriptor *s;
2563
2564 for (int i = 0; i < sampler_count; ++i) {
2565 s = pandecode_fetch_gpu_mem(smem, samplers + sizeof(*s) * i, sizeof(*s));
2566
2567 pandecode_log("struct bifrost_sampler_descriptor sampler_descriptor_%"PRIx64"_%d_%d = {\n", samplers + sizeof(*s) * i, job_no, i);
2568 pandecode_indent++;
2569
2570 if (s->unk1 != 1) {
2571 pandecode_msg("XXX: unk1 tripped\n");
2572 pandecode_prop("unk1 = 0x%x", s->unk1);
2573 }
2574
2575 pandecode_prop("wrap_s = %s", pandecode_wrap_mode(s->wrap_s));
2576 pandecode_prop("wrap_t = %s", pandecode_wrap_mode(s->wrap_t));
2577 pandecode_prop("wrap_r = %s", pandecode_wrap_mode(s->wrap_r));
2578
2579 if (s->unk8 != 0x8) {
2580 pandecode_msg("XXX: unk8 tripped\n");
2581 pandecode_prop("unk8 = 0x%x", s->unk8);
2582 }
2583
2584 pandecode_prop("unk2 = 0x%x", s->unk2);
2585 pandecode_prop("unk3 = 0x%x", s->unk3);
2586 pandecode_prop("min_filter = %s", s->min_filter ? "nearest" : "linear");
2587 pandecode_prop("norm_coords = 0x%x", s->norm_coords & 0x1);
2588 pandecode_prop("zero1 = 0x%x", s->zero1 & 0x1);
2589 pandecode_prop("mip_filter = %s", s->mip_filter ? "linear" : "nearest");
2590 pandecode_prop("mag_filter = %s", s->mag_filter ? "linear" : "nearest");
2591
2592 pandecode_prop("min_lod = FIXED_16(%f)", DECODE_FIXED_16(s->min_lod));
2593 pandecode_prop("max_lod = FIXED_16(%f)", DECODE_FIXED_16(s->max_lod));
2594
2595 if (s->zero1 || s->zero2 || s->zero3 || s->zero4) {
2596 pandecode_msg("XXX: sampler zero tripped\n");
2597 pandecode_prop("zero = 0x%" PRIx8 ", 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64 "\n", s->zero1, s->zero2, s->zero3, s->zero4);
2598 }
2599
2600 pandecode_indent--;
2601 pandecode_log("};\n");
2602 }
2603 } else {
2604 struct mali_sampler_descriptor *s;
2605
2606 for (int i = 0; i < sampler_count; ++i) {
2607 s = pandecode_fetch_gpu_mem(smem, samplers + sizeof(*s) * i, sizeof(*s));
2608
2609 pandecode_log("struct mali_sampler_descriptor sampler_descriptor_%"PRIx64"_%d_%d = {\n", samplers + sizeof(*s) * i, job_no, i);
2610 pandecode_indent++;
2611
2612 pandecode_log(".filter_mode = ");
2613 pandecode_log_decoded_flags(sampler_flag_info, s->filter_mode);
2614 pandecode_log_cont(",\n");
2615
2616 pandecode_prop("min_lod = FIXED_16(%f)", DECODE_FIXED_16(s->min_lod));
2617 pandecode_prop("max_lod = FIXED_16(%f)", DECODE_FIXED_16(s->max_lod));
2618
2619 if (s->lod_bias)
2620 pandecode_prop("lod_bias = FIXED_16(%f)", DECODE_FIXED_16(s->lod_bias));
2621
2622 pandecode_prop("wrap_s = %s", pandecode_wrap_mode(s->wrap_s));
2623 pandecode_prop("wrap_t = %s", pandecode_wrap_mode(s->wrap_t));
2624 pandecode_prop("wrap_r = %s", pandecode_wrap_mode(s->wrap_r));
2625
2626 pandecode_prop("compare_func = %s", pandecode_func(s->compare_func));
2627
2628 if (s->zero || s->zero2) {
2629 pandecode_msg("XXX: sampler zero tripped\n");
2630 pandecode_prop("zero = 0x%X, 0x%X\n", s->zero, s->zero2);
2631 }
2632
2633 pandecode_prop("seamless_cube_map = %d", s->seamless_cube_map);
2634
2635 pandecode_prop("border_color = { %f, %f, %f, %f }",
2636 s->border_color[0],
2637 s->border_color[1],
2638 s->border_color[2],
2639 s->border_color[3]);
2640
2641 pandecode_indent--;
2642 pandecode_log("};\n");
2643 }
2644 }
2645 }
2646
2647 static void
2648 pandecode_vertex_tiler_postfix_pre(
2649 const struct mali_vertex_tiler_postfix *p,
2650 int job_no, enum mali_job_type job_type,
2651 char *suffix, bool is_bifrost, unsigned gpu_id)
2652 {
2653 struct pandecode_mapped_memory *attr_mem;
2654
2655 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
2656 * are the only things actually needed from the FBD, vertex/tiler jobs
2657 * no longer reference the FBD -- instead, this field points to some
2658 * info about the scratchpad.
2659 */
2660
2661 struct pandecode_fbd fbd_info = {
2662 /* Default for Bifrost */
2663 .rt_count = 1
2664 };
2665
2666 if (is_bifrost) {
2667 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
2668 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
2669 } else if (p->shared_memory & MALI_MFBD)
2670 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == MALI_JOB_TYPE_COMPUTE, false);
2671 else if (job_type == MALI_JOB_TYPE_COMPUTE)
2672 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
2673 else
2674 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
2675
2676 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
2677 int texture_count = 0, sampler_count = 0;
2678
2679 if (p->shader) {
2680 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
2681 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
2682
2683 /* Disassemble ahead-of-time to get stats. Initialize with
2684 * stats for the missing-shader case so we get validation
2685 * there, too */
2686
2687 struct midgard_disasm_stats info = {
2688 .texture_count = 0,
2689 .sampler_count = 0,
2690 .attribute_count = 0,
2691 .varying_count = 0,
2692 .work_count = 1,
2693
2694 .uniform_count = -128,
2695 .uniform_buffer_count = 0
2696 };
2697
2698 if (s->shader & ~0xF)
2699 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
2700
2701 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
2702 pandecode_indent++;
2703
2704 /* Save for dumps */
2705 attribute_count = s->attribute_count;
2706 varying_count = s->varying_count;
2707 texture_count = s->texture_count;
2708 sampler_count = s->sampler_count;
2709
2710 if (is_bifrost) {
2711 uniform_count = s->bifrost2.uniform_count;
2712 uniform_buffer_count = s->bifrost1.uniform_buffer_count;
2713 } else {
2714 uniform_count = s->midgard1.uniform_count;
2715 uniform_buffer_count = s->midgard1.uniform_buffer_count;
2716 }
2717
2718 pandecode_shader_address("shader", s->shader);
2719
2720 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
2721 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
2722 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
2723 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
2724 pandecode_shader_prop("uniform_buffer_count",
2725 uniform_buffer_count,
2726 info.uniform_buffer_count, true);
2727
2728 if (!is_bifrost) {
2729 pandecode_shader_prop("uniform_count",
2730 uniform_count,
2731 info.uniform_count, false);
2732
2733 pandecode_shader_prop("work_count",
2734 s->midgard1.work_count, info.work_count, false);
2735 }
2736
2737 if (is_bifrost) {
2738 pandecode_log("bifrost1.unk1 = ");
2739 pandecode_log_decoded_flags(shader_bifrost_info, s->bifrost1.unk1);
2740 pandecode_log_cont(",\n");
2741 } else {
2742 bool helpers = s->midgard1.flags_lo & MALI_HELPER_INVOCATIONS;
2743
2744 if (helpers != info.helper_invocations) {
2745 pandecode_msg("XXX: expected helpers %u but got %u\n",
2746 info.helper_invocations, helpers);
2747 }
2748
2749 pandecode_log(".midgard1.flags_lo = ");
2750 pandecode_log_decoded_flags(shader_midgard1_flag_lo_info,
2751 s->midgard1.flags_lo & ~MALI_HELPER_INVOCATIONS);
2752 pandecode_log_cont(",\n");
2753
2754 pandecode_log(".midgard1.flags_hi = ");
2755 pandecode_log_decoded_flags(shader_midgard1_flag_hi_info, s->midgard1.flags_hi);
2756 pandecode_log_cont(",\n");
2757 }
2758
2759 if (s->depth_units || s->depth_factor) {
2760 pandecode_prop("depth_factor = %f", s->depth_factor);
2761 pandecode_prop("depth_units = %f", s->depth_units);
2762 }
2763
2764 if (s->coverage_mask)
2765 pandecode_prop("coverage_mask = 0x%X", s->coverage_mask);
2766
2767 if (s->unknown2_2)
2768 pandecode_prop(".unknown2_2 = %X", s->unknown2_2);
2769
2770 if (s->unknown2_3 || s->unknown2_4) {
2771 pandecode_log(".unknown2_3 = ");
2772
2773 int unknown2_3 = s->unknown2_3;
2774 int unknown2_4 = s->unknown2_4;
2775
2776 /* We're not quite sure what these flags mean without the depth test, if anything */
2777
2778 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
2779 const char *func = pandecode_func(MALI_GET_DEPTH_FUNC(unknown2_3));
2780 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
2781
2782 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
2783 }
2784
2785 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
2786 pandecode_log_cont(",\n");
2787
2788 pandecode_log(".unknown2_4 = ");
2789 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
2790 pandecode_log_cont(",\n");
2791 }
2792
2793 if (s->stencil_mask_front || s->stencil_mask_back) {
2794 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
2795 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
2796 }
2797
2798 pandecode_stencil("front", &s->stencil_front);
2799 pandecode_stencil("back", &s->stencil_back);
2800
2801 if (is_bifrost) {
2802 pandecode_log(".bifrost2 = {\n");
2803 pandecode_indent++;
2804
2805 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
2806 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
2807 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
2808 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
2809
2810 pandecode_indent--;
2811 pandecode_log("},\n");
2812 } else if (s->midgard2.unknown2_7) {
2813 pandecode_log(".midgard2 = {\n");
2814 pandecode_indent++;
2815
2816 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
2817 pandecode_indent--;
2818 pandecode_log("},\n");
2819 }
2820
2821 if (s->padding) {
2822 pandecode_msg("XXX: shader padding tripped\n");
2823 pandecode_prop("padding = 0x%" PRIx32, s->padding);
2824 }
2825
2826 if (!is_bifrost) {
2827 /* TODO: Blend shaders routing/disasm */
2828 union midgard_blend blend = s->blend;
2829 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
2830 if (shader & ~0xF)
2831 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2832 } else {
2833 pandecode_msg("mdg_blend = %" PRIx64 "\n", s->blend.shader);
2834 }
2835
2836 pandecode_indent--;
2837 pandecode_log("};\n");
2838
2839 /* MRT blend fields are used whenever MFBD is used, with
2840 * per-RT descriptors */
2841
2842 if (job_type == MALI_JOB_TYPE_TILER && (is_bifrost || p->shared_memory & MALI_MFBD)) {
2843 void* blend_base = (void *) (s + 1);
2844
2845 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
2846 mali_ptr shader = 0;
2847
2848 if (is_bifrost)
2849 shader = pandecode_bifrost_blend(blend_base, job_no, i);
2850 else
2851 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
2852
2853 if (shader & ~0xF)
2854 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2855
2856 }
2857 }
2858 } else
2859 pandecode_msg("XXX: missing shader descriptor\n");
2860
2861 if (p->viewport) {
2862 struct pandecode_mapped_memory *fmem = pandecode_find_mapped_gpu_mem_containing(p->viewport);
2863 struct mali_viewport *PANDECODE_PTR_VAR(f, fmem, p->viewport);
2864
2865 pandecode_log("struct mali_viewport viewport_%"PRIx64"_%d%s = {\n", p->viewport, job_no, suffix);
2866 pandecode_indent++;
2867
2868 pandecode_prop("clip_minx = %f", f->clip_minx);
2869 pandecode_prop("clip_miny = %f", f->clip_miny);
2870 pandecode_prop("clip_minz = %f", f->clip_minz);
2871 pandecode_prop("clip_maxx = %f", f->clip_maxx);
2872 pandecode_prop("clip_maxy = %f", f->clip_maxy);
2873 pandecode_prop("clip_maxz = %f", f->clip_maxz);
2874
2875 /* Only the higher coordinates are MALI_POSITIVE scaled */
2876
2877 pandecode_prop("viewport0 = { %d, %d }",
2878 f->viewport0[0], f->viewport0[1]);
2879
2880 pandecode_prop("viewport1 = { MALI_POSITIVE(%d), MALI_POSITIVE(%d) }",
2881 f->viewport1[0] + 1, f->viewport1[1] + 1);
2882
2883 pandecode_indent--;
2884 pandecode_log("};\n");
2885 }
2886
2887 unsigned max_attr_index = 0;
2888
2889 if (p->attribute_meta)
2890 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
2891
2892 if (p->attributes) {
2893 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
2894 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
2895 }
2896
2897 /* Varyings are encoded like attributes but not actually sent; we just
2898 * pass a zero buffer with the right stride/size set, (or whatever)
2899 * since the GPU will write to it itself */
2900
2901 if (p->varying_meta) {
2902 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
2903 }
2904
2905 if (p->varyings) {
2906 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
2907
2908 /* Number of descriptors depends on whether there are
2909 * non-internal varyings */
2910
2911 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
2912 }
2913
2914 if (p->uniform_buffers) {
2915 if (uniform_buffer_count)
2916 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
2917 else
2918 pandecode_msg("warn: UBOs specified but not referenced\n");
2919 } else if (uniform_buffer_count)
2920 pandecode_msg("XXX: UBOs referenced but not specified\n");
2921
2922 /* We don't want to actually dump uniforms, but we do need to validate
2923 * that the counts we were given are sane */
2924
2925 if (p->uniforms) {
2926 if (uniform_count)
2927 pandecode_uniforms(p->uniforms, uniform_count);
2928 else
2929 pandecode_msg("warn: Uniforms specified but not referenced\n");
2930 } else if (uniform_count)
2931 pandecode_msg("XXX: Uniforms referenced but not specified\n");
2932
2933 if (p->textures)
2934 pandecode_textures(p->textures, texture_count, job_no, is_bifrost);
2935
2936 if (p->sampler_descriptor)
2937 pandecode_samplers(p->sampler_descriptor, sampler_count, job_no, is_bifrost);
2938 }
2939
2940 static void
2941 pandecode_gl_enables(uint32_t gl_enables, int job_type)
2942 {
2943 pandecode_log(".gl_enables = ");
2944
2945 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
2946
2947 pandecode_log_cont(",\n");
2948 }
2949
2950 static void
2951 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
2952 {
2953 if (p->shader & 0xF)
2954 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
2955
2956 pandecode_log(".postfix = {\n");
2957 pandecode_indent++;
2958
2959 pandecode_gl_enables(p->gl_enables, MALI_JOB_TYPE_TILER);
2960 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
2961 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
2962
2963 if (p->zero4) {
2964 pandecode_msg("XXX: vertex only zero tripped");
2965 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
2966 }
2967
2968 pandecode_prop("offset_start = 0x%x", p->offset_start);
2969
2970 if (p->zero5) {
2971 pandecode_msg("XXX: vertex only zero tripped");
2972 pandecode_prop("zero5 = 0x%" PRIx64, p->zero5);
2973 }
2974
2975 MEMORY_PROP(p, position_varying);
2976 MEMORY_PROP(p, occlusion_counter);
2977
2978 pandecode_indent--;
2979 pandecode_log("},\n");
2980 }
2981
2982 static void
2983 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
2984 {
2985 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2986 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
2987
2988 pandecode_log("struct bifrost_tiler_heap_meta tiler_heap_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
2989 pandecode_indent++;
2990
2991 if (h->zero) {
2992 pandecode_msg("XXX: tiler heap zero tripped\n");
2993 pandecode_prop("zero = 0x%x", h->zero);
2994 }
2995
2996 pandecode_prop("heap_size = 0x%x", h->heap_size);
2997 MEMORY_PROP(h, tiler_heap_start);
2998 MEMORY_PROP(h, tiler_heap_free);
2999
3000 /* this might point to the beginning of another buffer, when it's
3001 * really the end of the tiler heap buffer, so we have to be careful
3002 * here. but for zero length, we need the same pointer.
3003 */
3004
3005 if (h->tiler_heap_end == h->tiler_heap_start) {
3006 MEMORY_PROP(h, tiler_heap_start);
3007 } else {
3008 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
3009 pandecode_prop("tiler_heap_end = %s + 1", a);
3010 free(a);
3011 }
3012
3013 for (int i = 0; i < 10; i++) {
3014 if (h->zeros[i] != 0) {
3015 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
3016 i, h->zeros[i]);
3017 }
3018 }
3019
3020 if (h->unk1 != 0x1) {
3021 pandecode_msg("XXX: tiler heap unk1 tripped\n");
3022 pandecode_prop("unk1 = 0x%x", h->unk1);
3023 }
3024
3025 if (h->unk7e007e != 0x7e007e) {
3026 pandecode_msg("XXX: tiler heap unk7e007e tripped\n");
3027 pandecode_prop("unk7e007e = 0x%x", h->unk7e007e);
3028 }
3029
3030 pandecode_indent--;
3031 pandecode_log("};\n");
3032 }
3033
3034 static void
3035 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
3036 {
3037 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
3038 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
3039
3040 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
3041
3042 pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
3043 pandecode_indent++;
3044
3045 pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
3046 pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
3047
3048 if (t->hierarchy_mask != 0xa &&
3049 t->hierarchy_mask != 0x14 &&
3050 t->hierarchy_mask != 0x28 &&
3051 t->hierarchy_mask != 0x50 &&
3052 t->hierarchy_mask != 0xa0)
3053 pandecode_prop("XXX: Unexpected hierarchy_mask (not 0xa, 0x14, 0x28, 0x50 or 0xa0)!");
3054
3055 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
3056
3057 pandecode_prop("flags = 0x%" PRIx16, t->flags);
3058
3059 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
3060 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
3061
3062 if (t->zero0) {
3063 pandecode_msg("XXX: tiler meta zero tripped\n");
3064 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
3065 }
3066
3067 for (int i = 0; i < 12; i++) {
3068 if (t->zeros[i] != 0) {
3069 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
3070 i, t->zeros[i]);
3071 }
3072 }
3073
3074 pandecode_indent--;
3075 pandecode_log("};\n");
3076 }
3077
3078 static void
3079 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
3080 {
3081 if (u.pointer == 0x0)
3082 return;
3083
3084 pandecode_log(".primitive_size = {\n");
3085 pandecode_indent++;
3086
3087 if (constant) {
3088 pandecode_prop("constant = %f", u.constant);
3089 } else {
3090 MEMORY_PROP((&u), pointer);
3091 }
3092
3093 pandecode_indent--;
3094 pandecode_log("},\n");
3095 }
3096
3097 static void
3098 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
3099 {
3100 pandecode_log_cont("{\n");
3101 pandecode_indent++;
3102
3103 /* TODO: gl_PointSize on Bifrost */
3104 pandecode_primitive_size(t->primitive_size, true);
3105
3106 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
3107 || t->zero6) {
3108 pandecode_msg("XXX: tiler only zero tripped\n");
3109 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
3110 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
3111 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
3112 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
3113 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
3114 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
3115 }
3116
3117 pandecode_indent--;
3118 pandecode_log("},\n");
3119 }
3120
3121 static int
3122 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
3123 const struct pandecode_mapped_memory *mem,
3124 mali_ptr payload, int job_no, unsigned gpu_id)
3125 {
3126 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
3127
3128 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
3129
3130 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
3131 pandecode_indent++;
3132
3133 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
3134 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
3135
3136 pandecode_indent--;
3137 pandecode_log("};\n");
3138
3139 return sizeof(*v);
3140 }
3141
3142 static int
3143 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
3144 const struct pandecode_mapped_memory *mem,
3145 mali_ptr payload, int job_no, unsigned gpu_id)
3146 {
3147 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
3148
3149 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
3150 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
3151
3152 pandecode_log("struct bifrost_payload_tiler payload_%"PRIx64"_%d = {\n", payload, job_no);
3153 pandecode_indent++;
3154
3155 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
3156
3157 pandecode_log(".tiler = ");
3158 pandecode_tiler_only_bfr(&t->tiler, job_no);
3159
3160 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
3161
3162 pandecode_indent--;
3163 pandecode_log("};\n");
3164
3165 return sizeof(*t);
3166 }
3167
3168 static int
3169 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
3170 const struct pandecode_mapped_memory *mem,
3171 mali_ptr payload, int job_no, unsigned gpu_id)
3172 {
3173 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
3174 bool is_graphics = (h->job_type == MALI_JOB_TYPE_VERTEX) || (h->job_type == MALI_JOB_TYPE_TILER);
3175
3176 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
3177
3178 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
3179 pandecode_indent++;
3180
3181 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
3182 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
3183
3184 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
3185 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
3186
3187 pandecode_indent--;
3188 pandecode_log("};\n");
3189
3190 return sizeof(*v);
3191 }
3192
3193 static int
3194 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
3195 mali_ptr payload, int job_no,
3196 bool is_bifrost, unsigned gpu_id)
3197 {
3198 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
3199
3200 bool is_mfbd = s->framebuffer & MALI_MFBD;
3201
3202 if (!is_mfbd && is_bifrost)
3203 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
3204
3205 struct pandecode_fbd info;
3206
3207 if (is_mfbd)
3208 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
3209 else
3210 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
3211
3212 /* Compute the tag for the tagged pointer. This contains the type of
3213 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
3214 * additional structures follow the MFBD header (an extra payload or
3215 * not, as well as a count of render targets) */
3216
3217 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
3218
3219 if (is_mfbd) {
3220 if (info.has_extra)
3221 expected_tag |= MALI_MFBD_TAG_EXTRA;
3222
3223 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
3224 }
3225
3226 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
3227 pandecode_msg("XXX: unexpected tile coordinate bits\n");
3228 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
3229 pandecode_prop("max_tile_coord = 0x%X\n", s->max_tile_coord);
3230 }
3231
3232 /* Extract tile coordinates */
3233
3234 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
3235 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
3236
3237 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
3238 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
3239
3240 /* For the max, we also want the floored (rather than ceiled) version for checking */
3241
3242 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
3243 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
3244
3245 /* Validate the coordinates are well-ordered */
3246
3247 if (min_x == max_x)
3248 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
3249 else if (min_x > max_x)
3250 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
3251
3252 if (min_y == max_y)
3253 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
3254 else if (min_y > max_y)
3255 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
3256
3257 /* Validate the coordinates fit inside the framebuffer. We use floor,
3258 * rather than ceil, for the max coordinates, since the tile
3259 * coordinates for something like an 800x600 framebuffer will actually
3260 * resolve to 800x608, which would otherwise trigger a Y-overflow */
3261
3262 if ((min_x > info.width) || (max_x_f > info.width))
3263 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
3264
3265 if ((min_y > info.height) || (max_y_f > info.height))
3266 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
3267
3268 /* After validation, we print */
3269
3270 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
3271
3272 /* The FBD is a tagged pointer */
3273
3274 unsigned tag = (s->framebuffer & ~FBD_MASK);
3275
3276 if (tag != expected_tag)
3277 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
3278
3279 return sizeof(*s);
3280 }
3281
3282 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
3283 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
3284 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
3285 * might wish to combine this with the bifrost parameter) because some details
3286 * are model-specific even within a particular architecture. Minimal traces
3287 * *only* examine the job descriptors, skipping printing entirely if there is
3288 * no faults, and only descends into the payload if there are faults. This is
3289 * useful for looking for faults without the overhead of invasive traces. */
3290
3291 void
3292 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
3293 {
3294 pandecode_dump_file_open();
3295
3296 struct mali_job_descriptor_header *h;
3297 unsigned job_descriptor_number = 0;
3298
3299 do {
3300 struct pandecode_mapped_memory *mem =
3301 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
3302
3303 void *payload;
3304
3305 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
3306
3307 /* On Midgard, for 32-bit jobs except for fragment jobs, the
3308 * high 32-bits of the 64-bit pointer are reused to store
3309 * something else.
3310 */
3311 int offset = h->job_descriptor_size == MALI_JOB_32 &&
3312 h->job_type != MALI_JOB_TYPE_FRAGMENT ? 4 : 0;
3313 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h) - offset;
3314
3315 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
3316
3317 int job_no = job_descriptor_number++;
3318
3319 /* If the job is good to go, skip it in minimal mode */
3320 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
3321 continue;
3322
3323 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
3324 pandecode_indent++;
3325
3326 pandecode_prop("job_type = %s", mali_job_type_as_str(h->job_type));
3327
3328 if (h->job_descriptor_size)
3329 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
3330
3331 if (h->exception_status && h->exception_status != 0x1)
3332 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
3333 h->exception_status,
3334 (h->exception_status >> 16) & 0xFFFF,
3335 pandecode_exception_access((h->exception_status >> 8) & 0x3),
3336 h->exception_status & 0xFF);
3337
3338 if (h->first_incomplete_task)
3339 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
3340
3341 if (h->fault_pointer)
3342 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
3343
3344 if (h->job_barrier)
3345 pandecode_prop("job_barrier = %d", h->job_barrier);
3346
3347 pandecode_prop("job_index = %d", h->job_index);
3348
3349 if (h->unknown_flags)
3350 pandecode_prop("unknown_flags = %d", h->unknown_flags);
3351
3352 if (h->job_dependency_index_1)
3353 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
3354
3355 if (h->job_dependency_index_2)
3356 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
3357
3358 pandecode_indent--;
3359 pandecode_log("};\n");
3360
3361 switch (h->job_type) {
3362 case MALI_JOB_TYPE_WRITE_VALUE: {
3363 struct mali_payload_write_value *s = payload;
3364 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
3365 pandecode_indent++;
3366 MEMORY_PROP(s, address);
3367
3368 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
3369 pandecode_msg("XXX: unknown value descriptor\n");
3370 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
3371 }
3372
3373 if (s->reserved) {
3374 pandecode_msg("XXX: set value tripped\n");
3375 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
3376 }
3377
3378 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
3379 pandecode_indent--;
3380 pandecode_log("};\n");
3381
3382 break;
3383 }
3384
3385 case MALI_JOB_TYPE_TILER:
3386 case MALI_JOB_TYPE_VERTEX:
3387 case MALI_JOB_TYPE_COMPUTE:
3388 if (bifrost) {
3389 if (h->job_type == MALI_JOB_TYPE_TILER)
3390 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
3391 else
3392 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
3393 } else
3394 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
3395
3396 break;
3397
3398 case MALI_JOB_TYPE_FRAGMENT:
3399 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
3400 break;
3401
3402 default:
3403 break;
3404 }
3405 } while ((jc_gpu_va = h->next_job));
3406
3407 pandecode_map_read_write();
3408 }