src/panfrost/midgard/disassemble.c

   1 /* Author(s):
   2  *   Connor Abbott
   3  *   Alyssa Rosenzweig
   4  *
   5  * Copyright (c) 2013 Connor Abbott (connor@abbott.cx)
   6  * Copyright (c) 2018 Alyssa Rosenzweig (alyssa@rosenzweig.io)
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26
  27 #include <stdio.h>
  28 #include <stdint.h>
  29 #include <stdlib.h>
  30 #include <assert.h>
  31 #include <inttypes.h>
  32 #include <ctype.h>
  33 #include <string.h>
  34 #include "midgard.h"
  35 #include "midgard-parse.h"
  36 #include "midgard_ops.h"
  37 #include "midgard_quirks.h"
  38 #include "disassemble.h"
  39 #include "helpers.h"
  40 #include "util/half_float.h"
  41 #include "util/u_math.h"
  42
  43 #define DEFINE_CASE(define, str) case define: { printf(str); break; }
  44
  45 static unsigned *midg_tags;
  46 static bool is_instruction_int = false;
  47
  48 /* Stats */
  49
  50 static struct midgard_disasm_stats midg_stats;
  51
  52 /* Prints a short form of the tag for branching, the minimum needed to be
  53  * legible and unambiguous */
  54
  55 static void
  56 print_tag_short(unsigned tag)
  57 {
  58         switch (midgard_word_types[tag]) {
  59         case midgard_word_type_texture:
  60                 printf("tex/%X", tag);
  61                 break;
  62
  63         case midgard_word_type_load_store:
  64                 printf("ldst");
  65                 break;
  66
  67         case midgard_word_type_alu:
  68                 printf("alu%u/%X", midgard_word_size[tag], tag);
  69                 break;
  70
  71         default:
  72                 printf("%s%X", (tag > 0) ? "" : "unk", tag);
  73                 break;
  74         }
  75 }
  76
  77 static void
  78 print_alu_opcode(midgard_alu_op op)
  79 {
  80         bool int_op = false;
  81
  82         if (alu_opcode_props[op].name) {
  83                 printf("%s", alu_opcode_props[op].name);
  84
  85                 int_op = midgard_is_integer_op(op);
  86         } else
  87                 printf("alu_op_%02X", op);
  88
  89         /* For constant analysis */
  90         is_instruction_int = int_op;
  91 }
  92
  93 static void
  94 print_ld_st_opcode(midgard_load_store_op op)
  95 {
  96         if (load_store_opcode_props[op].name)
  97                 printf("%s", load_store_opcode_props[op].name);
  98         else
  99                 printf("ldst_op_%02X", op);
 100 }
 101
 102 static bool is_embedded_constant_half = false;
 103 static bool is_embedded_constant_int = false;
 104
 105 static char
 106 prefix_for_bits(unsigned bits)
 107 {
 108         switch (bits) {
 109         case 8:
 110                 return 'q';
 111         case 16:
 112                 return 'h';
 113         case 64:
 114                 return 'd';
 115         default:
 116                 return 0;
 117         }
 118 }
 119
 120 /* For static analysis to ensure all registers are written at least once before
 121  * use along the source code path (TODO: does this break done for complex CF?)
 122  */
 123
 124 uint16_t midg_ever_written = 0;
 125
 126 static void
 127 print_reg(unsigned reg, unsigned bits)
 128 {
 129         /* Perform basic static analysis for expanding constants correctly */
 130
 131         if (reg == 26) {
 132                 is_embedded_constant_int = is_instruction_int;
 133                 is_embedded_constant_half = (bits < 32);
 134         }
 135
 136         unsigned uniform_reg = 23 - reg;
 137         bool is_uniform = false;
 138
 139         /* For r8-r15, it could be a work or uniform. We distinguish based on
 140          * the fact work registers are ALWAYS written before use, but uniform
 141          * registers are NEVER written before use. */
 142
 143         if ((reg >= 8 && reg < 16) && !(midg_ever_written & (1 << reg)))
 144                 is_uniform = true;
 145
 146         /* r16-r23 are always uniform */
 147
 148         if (reg >= 16 && reg <= 23)
 149                 is_uniform = true;
 150
 151         /* Update the uniform count appropriately */
 152
 153         if (is_uniform)
 154                 midg_stats.uniform_count =
 155                         MAX2(uniform_reg + 1, midg_stats.uniform_count);
 156
 157         char prefix = prefix_for_bits(bits);
 158
 159         if (prefix)
 160                 putchar(prefix);
 161
 162         printf("r%u", reg);
 163 }
 164
 165 static char *outmod_names_float[4] = {
 166         "",
 167         ".pos",
 168         ".unk2",
 169         ".sat"
 170 };
 171
 172 static char *outmod_names_int[4] = {
 173         ".isat",
 174         ".usat",
 175         "",
 176         ".hi"
 177 };
 178
 179 static char *srcmod_names_int[4] = {
 180         "sext(",
 181         "zext(",
 182         "",
 183         "("
 184 };
 185
 186 static void
 187 print_outmod(unsigned outmod, bool is_int)
 188 {
 189         printf("%s", is_int ? outmod_names_int[outmod] :
 190                outmod_names_float[outmod]);
 191 }
 192
 193 static void
 194 print_quad_word(uint32_t *words, unsigned tabs)
 195 {
 196         unsigned i;
 197
 198         for (i = 0; i < 4; i++)
 199                 printf("0x%08X%s ", words[i], i == 3 ? "" : ",");
 200
 201         printf("\n");
 202 }
 203
 204 static const char components[16] = "xyzwefghijklmnop";
 205
 206 /* Helper to print 4 chars of a swizzle */
 207 static void
 208 print_swizzle_helper(unsigned swizzle, bool upper)
 209 {
 210         for (unsigned i = 0; i < 4; ++i) {
 211                 unsigned c = (swizzle >> (i * 2)) & 3;
 212                 c += upper*4;
 213                 printf("%c", components[c]);
 214         }
 215 }
 216
 217 /* Helper to print 8 chars of a swizzle, duplicating over */
 218 static void
 219 print_swizzle_helper_8(unsigned swizzle, bool upper)
 220 {
 221         for (unsigned i = 0; i < 4; ++i) {
 222                 unsigned c = (swizzle >> (i * 2)) & 3;
 223                 c *= 2;
 224                 c += upper*8;
 225                 printf("%c%c", components[c], components[c+1]);
 226         }
 227 }
 228
 229 static void
 230 print_swizzle_vec16(unsigned swizzle, bool rep_high, bool rep_low,
 231                     midgard_dest_override override)
 232 {
 233         printf(".");
 234
 235         if (override == midgard_dest_override_upper) {
 236                 if (rep_high)
 237                         printf(" /* rep_high */ ");
 238                 if (rep_low)
 239                         printf(" /* rep_low */ ");
 240
 241                 if (!rep_high && rep_low)
 242                         print_swizzle_helper_8(swizzle, true);
 243                 else
 244                         print_swizzle_helper_8(swizzle, false);
 245         } else {
 246                 print_swizzle_helper_8(swizzle, rep_high & 1);
 247                 print_swizzle_helper_8(swizzle, !(rep_low & 1));
 248         }
 249 }
 250
 251 static void
 252 print_swizzle_vec8(unsigned swizzle, bool rep_high, bool rep_low)
 253 {
 254         printf(".");
 255
 256         print_swizzle_helper(swizzle, rep_high & 1);
 257         print_swizzle_helper(swizzle, !(rep_low & 1));
 258 }
 259
 260 static void
 261 print_swizzle_vec4(unsigned swizzle, bool rep_high, bool rep_low)
 262 {
 263         if (rep_high)
 264                 printf(" /* rep_high */ ");
 265         if (rep_low)
 266                 printf(" /* rep_low */ ");
 267
 268         if (swizzle == 0xE4) return; /* xyzw */
 269
 270         printf(".");
 271         print_swizzle_helper(swizzle, 0);
 272 }
 273 static void
 274 print_swizzle_vec2(unsigned swizzle, bool rep_high, bool rep_low)
 275 {
 276         if (rep_high)
 277                 printf(" /* rep_high */ ");
 278         if (rep_low)
 279                 printf(" /* rep_low */ ");
 280
 281         if (swizzle == 0xE4) return; /* XY */
 282
 283         printf(".");
 284
 285         for (unsigned i = 0; i < 4; i += 2) {
 286                 unsigned a = (swizzle >> (i * 2)) & 3;
 287                 unsigned b = (swizzle >> ((i+1) * 2)) & 3;
 288
 289                 /* Normally we're adjacent, but if there's an issue, don't make
 290                  * it ambiguous */
 291
 292                 if (a & 0x1)
 293                         printf("[%c%c]", components[a], components[b]);
 294                 else if (a == b)
 295                         printf("%c", components[a >> 1]);
 296                 else if (b == (a + 1))
 297                         printf("%c", "XY"[a >> 1]);
 298                 else
 299                         printf("[%c%c]", components[a], components[b]);
 300         }
 301 }
 302
 303 static int
 304 bits_for_mode(midgard_reg_mode mode)
 305 {
 306         switch (mode) {
 307         case midgard_reg_mode_8:
 308                 return 8;
 309         case midgard_reg_mode_16:
 310                 return 16;
 311         case midgard_reg_mode_32:
 312                 return 32;
 313         case midgard_reg_mode_64:
 314                 return 64;
 315         default:
 316                 unreachable("Invalid reg mode");
 317                 return 0;
 318         }
 319 }
 320
 321 static int
 322 bits_for_mode_halved(midgard_reg_mode mode, bool half)
 323 {
 324         unsigned bits = bits_for_mode(mode);
 325
 326         if (half)
 327                 bits >>= 1;
 328
 329         return bits;
 330 }
 331
 332 static void
 333 print_vector_src(unsigned src_binary,
 334                  midgard_reg_mode mode, unsigned reg,
 335                  midgard_dest_override override, bool is_int)
 336 {
 337         midgard_vector_alu_src *src = (midgard_vector_alu_src *)&src_binary;
 338
 339         /* Modifiers change meaning depending on the op's context */
 340
 341         midgard_int_mod int_mod = src->mod;
 342
 343         if (is_int) {
 344                 printf("%s", srcmod_names_int[int_mod]);
 345         } else {
 346                 if (src->mod & MIDGARD_FLOAT_MOD_NEG)
 347                         printf("-");
 348
 349                 if (src->mod & MIDGARD_FLOAT_MOD_ABS)
 350                         printf("abs(");
 351         }
 352
 353         //register
 354         unsigned bits = bits_for_mode_halved(mode, src->half);
 355         print_reg(reg, bits);
 356
 357         //swizzle
 358         if (bits == 16) {
 359                 /* When the mode of the instruction is itself 16-bit,
 360                  * rep_low/high work more or less as expected. But if the mode
 361                  * is 32-bit and we're stepping down, you only have vec4 and
 362                  * the meaning shifts to rep_low as higher-half and rep_high is
 363                  * never seen. TODO: are other modes similar? */
 364
 365                 if (mode == midgard_reg_mode_32) {
 366                         printf(".");
 367                         print_swizzle_helper(src->swizzle, src->rep_low);
 368                         assert(!src->rep_high);
 369                 } else {
 370                         print_swizzle_vec8(src->swizzle, src->rep_high, src->rep_low);
 371                 }
 372         } else if (bits == 8)
 373                 print_swizzle_vec16(src->swizzle, src->rep_high, src->rep_low, override);
 374         else if (bits == 32)
 375                 print_swizzle_vec4(src->swizzle, src->rep_high, src->rep_low);
 376         else if (bits == 64)
 377                 print_swizzle_vec2(src->swizzle, src->rep_high, src->rep_low);
 378
 379         /* Since we wrapped with a function-looking thing */
 380
 381         if (is_int && int_mod == midgard_int_shift)
 382                 printf(") << %u", bits);
 383         else if ((is_int && (int_mod != midgard_int_normal))
 384                  || (!is_int && src->mod & MIDGARD_FLOAT_MOD_ABS))
 385                 printf(")");
 386 }
 387
 388 static uint16_t
 389 decode_vector_imm(unsigned src2_reg, unsigned imm)
 390 {
 391         uint16_t ret;
 392         ret = src2_reg << 11;
 393         ret |= (imm & 0x7) << 8;
 394         ret |= (imm >> 3) & 0xFF;
 395         return ret;
 396 }
 397
 398 static void
 399 print_immediate(uint16_t imm)
 400 {
 401         if (is_instruction_int)
 402                 printf("#%u", imm);
 403         else
 404                 printf("#%g", _mesa_half_to_float(imm));
 405 }
 406
 407 static void
 408 update_dest(unsigned reg)
 409 {
 410         /* We should record writes as marking this as a work register. Store
 411          * the max register in work_count; we'll add one at the end */
 412
 413         if (reg < 16) {
 414                 midg_stats.work_count = MAX2(reg, midg_stats.work_count);
 415                 midg_ever_written |= (1 << reg);
 416         }
 417 }
 418
 419 static void
 420 print_dest(unsigned reg, midgard_reg_mode mode, midgard_dest_override override)
 421 {
 422         /* Depending on the mode and override, we determine the type of
 423          * destination addressed. Absent an override, we address just the
 424          * type of the operation itself */
 425
 426         unsigned bits = bits_for_mode(mode);
 427
 428         if (override != midgard_dest_override_none)
 429                 bits /= 2;
 430
 431         update_dest(reg);
 432         print_reg(reg, bits);
 433 }
 434
 435 static void
 436 print_mask_vec16(uint8_t mask, midgard_dest_override override)
 437 {
 438         printf(".");
 439
 440         for (unsigned i = 0; i < 8; i++) {
 441                 if (mask & (1 << i))
 442                         printf("%c%c",
 443                                components[i*2 + 0],
 444                                components[i*2 + 1]);
 445         }
 446 }
 447
 448 /* For 16-bit+ masks, we read off from the 8-bit mask field. For 16-bit (vec8),
 449  * it's just one bit per channel, easy peasy. For 32-bit (vec4), it's one bit
 450  * per channel with one duplicate bit in the middle. For 64-bit (vec2), it's
 451  * one-bit per channel with _3_ duplicate bits in the middle. Basically, just
 452  * subdividing the 128-bit word in 16-bit increments. For 64-bit, we uppercase
 453  * the mask to make it obvious what happened */
 454
 455 static void
 456 print_mask(uint8_t mask, unsigned bits, midgard_dest_override override)
 457 {
 458         if (bits == 8) {
 459                 print_mask_vec16(mask, override);
 460                 return;
 461         }
 462
 463         /* Skip 'complete' masks */
 464
 465         if (override == midgard_dest_override_none) {
 466                 if (bits >= 32 && mask == 0xFF) return;
 467
 468                 if (bits == 16) {
 469                         if (mask == 0x0F)
 470                                 return;
 471                         else if (mask == 0xF0) {
 472                                 printf("'");
 473                                 return;
 474                         }
 475                 }
 476         }
 477
 478         printf(".");
 479
 480         unsigned skip = (bits / 16);
 481         bool uppercase = bits > 32;
 482         bool tripped = false;
 483
 484         /* To apply an upper destination override, we "shift" the alphabet.
 485          * E.g. with an upper override on 32-bit, instead of xyzw, print efgh.
 486          * For upper 16-bit, instead of xyzwefgh, print ijklmnop */
 487
 488         const char *alphabet = components;
 489
 490         if (override == midgard_dest_override_upper)
 491                 alphabet += (128 / bits);
 492
 493         for (unsigned i = 0; i < 8; i += skip) {
 494                 bool a = (mask & (1 << i)) != 0;
 495
 496                 for (unsigned j = 1; j < skip; ++j) {
 497                         bool dupe = (mask & (1 << (i + j))) != 0;
 498                         tripped |= (dupe != a);
 499                 }
 500
 501                 if (a) {
 502                         char c = alphabet[i / skip];
 503
 504                         if (uppercase)
 505                                 c = toupper(c);
 506
 507                         printf("%c", c);
 508                 }
 509         }
 510
 511         if (tripped)
 512                 printf(" /* %X */", mask);
 513 }
 514
 515 /* Prints the 4-bit masks found in texture and load/store ops, as opposed to
 516  * the 8-bit masks found in (vector) ALU ops. Supports texture-style 16-bit
 517  * mode as well, but not load/store-style 16-bit mode. */
 518
 519 static void
 520 print_mask_4(unsigned mask, bool upper)
 521 {
 522         if (mask == 0xF) {
 523                 if (upper)
 524                         printf("'");
 525
 526                 return;
 527         }
 528
 529         printf(".");
 530
 531         for (unsigned i = 0; i < 4; ++i) {
 532                 bool a = (mask & (1 << i)) != 0;
 533                 if (a)
 534                         printf("%c", components[i + (upper ? 4 : 0)]);
 535         }
 536 }
 537
 538 static void
 539 print_vector_field(const char *name, uint16_t *words, uint16_t reg_word,
 540                    unsigned tabs)
 541 {
 542         midgard_reg_info *reg_info = (midgard_reg_info *)&reg_word;
 543         midgard_vector_alu *alu_field = (midgard_vector_alu *) words;
 544         midgard_reg_mode mode = alu_field->reg_mode;
 545         unsigned override = alu_field->dest_override;
 546
 547         /* For now, prefix instruction names with their unit, until we
 548          * understand how this works on a deeper level */
 549         printf("%s.", name);
 550
 551         print_alu_opcode(alu_field->op);
 552
 553         /* Postfix with the size to disambiguate if necessary */
 554         char postfix = prefix_for_bits(bits_for_mode(mode));
 555         bool size_ambiguous = override != midgard_dest_override_none;
 556
 557         if (size_ambiguous)
 558                 printf("%c", postfix ? postfix : 'r');
 559
 560         /* Print the outmod, if there is one */
 561         print_outmod(alu_field->outmod,
 562                      midgard_is_integer_out_op(alu_field->op));
 563
 564         printf(" ");
 565
 566         /* Mask denoting status of 8-lanes */
 567         uint8_t mask = alu_field->mask;
 568
 569         /* First, print the destination */
 570         print_dest(reg_info->out_reg, mode, alu_field->dest_override);
 571
 572         if (override != midgard_dest_override_none) {
 573                 bool modeable = (mode != midgard_reg_mode_8);
 574                 bool known = override != 0x3; /* Unused value */
 575
 576                 if (!(modeable && known))
 577                         printf("/* do%u */ ", override);
 578         }
 579
 580         print_mask(mask, bits_for_mode(mode), override);
 581
 582         printf(", ");
 583
 584         bool is_int = midgard_is_integer_op(alu_field->op);
 585         print_vector_src(alu_field->src1, mode, reg_info->src1_reg, override, is_int);
 586
 587         printf(", ");
 588
 589         if (reg_info->src2_imm) {
 590                 uint16_t imm = decode_vector_imm(reg_info->src2_reg, alu_field->src2 >> 2);
 591                 print_immediate(imm);
 592         } else {
 593                 print_vector_src(alu_field->src2, mode,
 594                                  reg_info->src2_reg, override, is_int);
 595         }
 596
 597         midg_stats.instruction_count++;
 598         printf("\n");
 599 }
 600
 601 static void
 602 print_scalar_src(unsigned src_binary, unsigned reg)
 603 {
 604         midgard_scalar_alu_src *src = (midgard_scalar_alu_src *)&src_binary;
 605
 606         if (src->negate)
 607                 printf("-");
 608
 609         if (src->abs)
 610                 printf("abs(");
 611
 612         print_reg(reg, src->full ? 32 : 16);
 613
 614         unsigned c = src->component;
 615
 616         if (src->full) {
 617                 assert((c & 1) == 0);
 618                 c >>= 1;
 619         }
 620
 621         printf(".%c", components[c]);
 622
 623         if (src->abs)
 624                 printf(")");
 625
 626 }
 627
 628 static uint16_t
 629 decode_scalar_imm(unsigned src2_reg, unsigned imm)
 630 {
 631         uint16_t ret;
 632         ret = src2_reg << 11;
 633         ret |= (imm & 3) << 9;
 634         ret |= (imm & 4) << 6;
 635         ret |= (imm & 0x38) << 2;
 636         ret |= imm >> 6;
 637         return ret;
 638 }
 639
 640 static void
 641 print_scalar_field(const char *name, uint16_t *words, uint16_t reg_word,
 642                    unsigned tabs)
 643 {
 644         midgard_reg_info *reg_info = (midgard_reg_info *)&reg_word;
 645         midgard_scalar_alu *alu_field = (midgard_scalar_alu *) words;
 646
 647         if (alu_field->unknown)
 648                 printf("scalar ALU unknown bit set\n");
 649
 650         printf("%s.", name);
 651         print_alu_opcode(alu_field->op);
 652         print_outmod(alu_field->outmod,
 653                      midgard_is_integer_out_op(alu_field->op));
 654         printf(" ");
 655
 656         bool full = alu_field->output_full;
 657         update_dest(reg_info->out_reg);
 658         print_reg(reg_info->out_reg, full ? 32 : 16);
 659         unsigned c = alu_field->output_component;
 660
 661         if (full) {
 662                 assert((c & 1) == 0);
 663                 c >>= 1;
 664         }
 665
 666         printf(".%c, ", components[c]);
 667
 668         print_scalar_src(alu_field->src1, reg_info->src1_reg);
 669
 670         printf(", ");
 671
 672         if (reg_info->src2_imm) {
 673                 uint16_t imm = decode_scalar_imm(reg_info->src2_reg,
 674                                                  alu_field->src2);
 675                 print_immediate(imm);
 676         } else
 677                 print_scalar_src(alu_field->src2, reg_info->src2_reg);
 678
 679         midg_stats.instruction_count++;
 680         printf("\n");
 681 }
 682
 683 static void
 684 print_branch_op(unsigned op)
 685 {
 686         switch (op) {
 687         case midgard_jmp_writeout_op_branch_uncond:
 688                 printf("uncond.");
 689                 break;
 690
 691         case midgard_jmp_writeout_op_branch_cond:
 692                 printf("cond.");
 693                 break;
 694
 695         case midgard_jmp_writeout_op_writeout:
 696                 printf("write.");
 697                 break;
 698
 699         case midgard_jmp_writeout_op_tilebuffer_pending:
 700                 printf("tilebuffer.");
 701                 break;
 702
 703         case midgard_jmp_writeout_op_discard:
 704                 printf("discard.");
 705                 break;
 706
 707         default:
 708                 printf("unk%u.", op);
 709                 break;
 710         }
 711 }
 712
 713 static void
 714 print_branch_cond(int cond)
 715 {
 716         switch (cond) {
 717         case midgard_condition_write0:
 718                 printf("write0");
 719                 break;
 720
 721         case midgard_condition_false:
 722                 printf("false");
 723                 break;
 724
 725         case midgard_condition_true:
 726                 printf("true");
 727                 break;
 728
 729         case midgard_condition_always:
 730                 printf("always");
 731                 break;
 732
 733         default:
 734                 printf("unk%X", cond);
 735                 break;
 736         }
 737 }
 738
 739 static bool
 740 print_compact_branch_writeout_field(uint16_t word)
 741 {
 742         midgard_jmp_writeout_op op = word & 0x7;
 743         midg_stats.instruction_count++;
 744
 745         switch (op) {
 746         case midgard_jmp_writeout_op_branch_uncond: {
 747                 midgard_branch_uncond br_uncond;
 748                 memcpy((char *) &br_uncond, (char *) &word, sizeof(br_uncond));
 749                 printf("br.uncond ");
 750
 751                 if (br_uncond.unknown != 1)
 752                         printf("unknown:%u, ", br_uncond.unknown);
 753
 754                 if (br_uncond.offset >= 0)
 755                         printf("+");
 756
 757                 printf("%d -> ", br_uncond.offset);
 758                 print_tag_short(br_uncond.dest_tag);
 759                 printf("\n");
 760
 761                 return br_uncond.offset >= 0;
 762         }
 763
 764         case midgard_jmp_writeout_op_branch_cond:
 765         case midgard_jmp_writeout_op_writeout:
 766         case midgard_jmp_writeout_op_discard:
 767         default: {
 768                 midgard_branch_cond br_cond;
 769                 memcpy((char *) &br_cond, (char *) &word, sizeof(br_cond));
 770
 771                 printf("br.");
 772
 773                 print_branch_op(br_cond.op);
 774                 print_branch_cond(br_cond.cond);
 775
 776                 printf(" ");
 777
 778                 if (br_cond.offset >= 0)
 779                         printf("+");
 780
 781                 printf("%d -> ", br_cond.offset);
 782                 print_tag_short(br_cond.dest_tag);
 783                 printf("\n");
 784
 785                 return br_cond.offset >= 0;
 786         }
 787         }
 788
 789         return false;
 790 }
 791
 792 static bool
 793 print_extended_branch_writeout_field(uint8_t *words, unsigned next)
 794 {
 795         midgard_branch_extended br;
 796         memcpy((char *) &br, (char *) words, sizeof(br));
 797
 798         printf("brx.");
 799
 800         print_branch_op(br.op);
 801
 802         /* Condition codes are a LUT in the general case, but simply repeated 8 times for single-channel conditions.. Check this. */
 803
 804         bool single_channel = true;
 805
 806         for (unsigned i = 0; i < 16; i += 2) {
 807                 single_channel &= (((br.cond >> i) & 0x3) == (br.cond & 0x3));
 808         }
 809
 810         if (single_channel)
 811                 print_branch_cond(br.cond & 0x3);
 812         else
 813                 printf("lut%X", br.cond);
 814
 815         if (br.unknown)
 816                 printf(".unknown%u", br.unknown);
 817
 818         printf(" ");
 819
 820         if (br.offset >= 0)
 821                 printf("+");
 822
 823         printf("%d -> ", br.offset);
 824         print_tag_short(br.dest_tag);
 825         printf("\n");
 826
 827         unsigned I = next + br.offset * 4;
 828
 829         if (midg_tags[I] && midg_tags[I] != br.dest_tag) {
 830                 printf("\t/* XXX TAG ERROR: jumping to ");
 831                 print_tag_short(br.dest_tag);
 832                 printf(" but tagged ");
 833                 print_tag_short(midg_tags[I]);
 834                 printf(" */\n");
 835         }
 836
 837         midg_tags[I] = br.dest_tag;
 838
 839         midg_stats.instruction_count++;
 840         return br.offset >= 0;
 841 }
 842
 843 static unsigned
 844 num_alu_fields_enabled(uint32_t control_word)
 845 {
 846         unsigned ret = 0;
 847
 848         if ((control_word >> 17) & 1)
 849                 ret++;
 850
 851         if ((control_word >> 19) & 1)
 852                 ret++;
 853
 854         if ((control_word >> 21) & 1)
 855                 ret++;
 856
 857         if ((control_word >> 23) & 1)
 858                 ret++;
 859
 860         if ((control_word >> 25) & 1)
 861                 ret++;
 862
 863         return ret;
 864 }
 865
 866 static float
 867 float_bitcast(uint32_t integer)
 868 {
 869         union {
 870                 uint32_t i;
 871                 float f;
 872         } v;
 873
 874         v.i = integer;
 875         return v.f;
 876 }
 877
 878 static bool
 879 print_alu_word(uint32_t *words, unsigned num_quad_words,
 880                unsigned tabs, unsigned next)
 881 {
 882         uint32_t control_word = words[0];
 883         uint16_t *beginning_ptr = (uint16_t *)(words + 1);
 884         unsigned num_fields = num_alu_fields_enabled(control_word);
 885         uint16_t *word_ptr = beginning_ptr + num_fields;
 886         unsigned num_words = 2 + num_fields;
 887         bool branch_forward = false;
 888
 889         if ((control_word >> 16) & 1)
 890                 printf("unknown bit 16 enabled\n");
 891
 892         if ((control_word >> 17) & 1) {
 893                 print_vector_field("vmul", word_ptr, *beginning_ptr, tabs);
 894                 beginning_ptr += 1;
 895                 word_ptr += 3;
 896                 num_words += 3;
 897         }
 898
 899         if ((control_word >> 18) & 1)
 900                 printf("unknown bit 18 enabled\n");
 901
 902         if ((control_word >> 19) & 1) {
 903                 print_scalar_field("sadd", word_ptr, *beginning_ptr, tabs);
 904                 beginning_ptr += 1;
 905                 word_ptr += 2;
 906                 num_words += 2;
 907         }
 908
 909         if ((control_word >> 20) & 1)
 910                 printf("unknown bit 20 enabled\n");
 911
 912         if ((control_word >> 21) & 1) {
 913                 print_vector_field("vadd", word_ptr, *beginning_ptr, tabs);
 914                 beginning_ptr += 1;
 915                 word_ptr += 3;
 916                 num_words += 3;
 917         }
 918
 919         if ((control_word >> 22) & 1)
 920                 printf("unknown bit 22 enabled\n");
 921
 922         if ((control_word >> 23) & 1) {
 923                 print_scalar_field("smul", word_ptr, *beginning_ptr, tabs);
 924                 beginning_ptr += 1;
 925                 word_ptr += 2;
 926                 num_words += 2;
 927         }
 928
 929         if ((control_word >> 24) & 1)
 930                 printf("unknown bit 24 enabled\n");
 931
 932         if ((control_word >> 25) & 1) {
 933                 print_vector_field("lut", word_ptr, *beginning_ptr, tabs);
 934                 word_ptr += 3;
 935                 num_words += 3;
 936         }
 937
 938         if ((control_word >> 26) & 1) {
 939                 branch_forward |= print_compact_branch_writeout_field(*word_ptr);
 940                 word_ptr += 1;
 941                 num_words += 1;
 942         }
 943
 944         if ((control_word >> 27) & 1) {
 945                 branch_forward |= print_extended_branch_writeout_field((uint8_t *) word_ptr, next);
 946                 word_ptr += 3;
 947                 num_words += 3;
 948         }
 949
 950         if (num_quad_words > (num_words + 7) / 8) {
 951                 assert(num_quad_words == (num_words + 15) / 8);
 952                 //Assume that the extra quadword is constants
 953                 void *consts = words + (4 * num_quad_words - 4);
 954
 955                 if (is_embedded_constant_int) {
 956                         if (is_embedded_constant_half) {
 957                                 int16_t *sconsts = (int16_t *) consts;
 958                                 printf("sconstants %d, %d, %d, %d\n",
 959                                        sconsts[0],
 960                                        sconsts[1],
 961                                        sconsts[2],
 962                                        sconsts[3]);
 963                         } else {
 964                                 uint32_t *iconsts = (uint32_t *) consts;
 965                                 printf("iconstants 0x%X, 0x%X, 0x%X, 0x%X\n",
 966                                        iconsts[0],
 967                                        iconsts[1],
 968                                        iconsts[2],
 969                                        iconsts[3]);
 970                         }
 971                 } else {
 972                         if (is_embedded_constant_half) {
 973                                 uint16_t *hconsts = (uint16_t *) consts;
 974                                 printf("hconstants %g, %g, %g, %g\n",
 975                                        _mesa_half_to_float(hconsts[0]),
 976                                        _mesa_half_to_float(hconsts[1]),
 977                                        _mesa_half_to_float(hconsts[2]),
 978                                        _mesa_half_to_float(hconsts[3]));
 979                         } else {
 980                                 uint32_t *fconsts = (uint32_t *) consts;
 981                                 printf("fconstants %g, %g, %g, %g\n",
 982                                        float_bitcast(fconsts[0]),
 983                                        float_bitcast(fconsts[1]),
 984                                        float_bitcast(fconsts[2]),
 985                                        float_bitcast(fconsts[3]));
 986                         }
 987
 988                 }
 989         }
 990
 991         return branch_forward;
 992 }
 993
 994 static void
 995 print_varying_parameters(midgard_load_store_word *word)
 996 {
 997         midgard_varying_parameter param;
 998         unsigned v = word->varying_parameters;
 999         memcpy(&param, &v, sizeof(param));
1000
1001         if (param.is_varying) {
1002                 /* If a varying, there are qualifiers */
1003                 if (param.flat)
1004                         printf(".flat");
1005
1006                 if (param.interpolation != midgard_interp_default) {
1007                         if (param.interpolation == midgard_interp_centroid)
1008                                 printf(".centroid");
1009                         else
1010                                 printf(".interp%d", param.interpolation);
1011                 }
1012
1013                 if (param.modifier != midgard_varying_mod_none) {
1014                         if (param.modifier == midgard_varying_mod_perspective_w)
1015                                 printf(".perspectivew");
1016                         else if (param.modifier == midgard_varying_mod_perspective_z)
1017                                 printf(".perspectivez");
1018                         else
1019                                 printf(".mod%d", param.modifier);
1020                 }
1021         } else if (param.flat || param.interpolation || param.modifier) {
1022                 printf(" /* is_varying not set but varying metadata attached */");
1023         }
1024
1025         if (param.zero0 || param.zero1 || param.zero2)
1026                 printf(" /* zero tripped, %u %u %u */ ", param.zero0, param.zero1, param.zero2);
1027 }
1028
1029 static bool
1030 is_op_varying(unsigned op)
1031 {
1032         switch (op) {
1033         case midgard_op_st_vary_16:
1034         case midgard_op_st_vary_32:
1035         case midgard_op_st_vary_32i:
1036         case midgard_op_st_vary_32u:
1037         case midgard_op_ld_vary_16:
1038         case midgard_op_ld_vary_32:
1039         case midgard_op_ld_vary_32i:
1040         case midgard_op_ld_vary_32u:
1041                 return true;
1042         }
1043
1044         return false;
1045 }
1046
1047 static bool
1048 is_op_attribute(unsigned op)
1049 {
1050         switch (op) {
1051         case midgard_op_ld_attr_16:
1052         case midgard_op_ld_attr_32:
1053         case midgard_op_ld_attr_32i:
1054         case midgard_op_ld_attr_32u:
1055                 return true;
1056         }
1057
1058         return false;
1059 }
1060
1061 static void
1062 print_load_store_arg(uint8_t arg, unsigned index)
1063 {
1064         /* Try to interpret as a register */
1065         midgard_ldst_register_select sel;
1066         memcpy(&sel, &arg, sizeof(arg));
1067
1068         /* If unknown is set, we're not sure what this is or how to
1069          * interpret it. But if it's zero, we get it. */
1070
1071         if (sel.unknown) {
1072                 printf("0x%02X", arg);
1073                 return;
1074         }
1075
1076         unsigned reg = REGISTER_LDST_BASE + sel.select;
1077         char comp = components[sel.component];
1078
1079         printf("r%u.%c", reg, comp);
1080
1081         /* Only print a shift if it's non-zero. Shifts only make sense for the
1082          * second index. For the first, we're not sure what it means yet */
1083
1084         if (index == 1) {
1085                 if (sel.shift)
1086                         printf(" << %u", sel.shift);
1087         } else {
1088                 printf(" /* %X */", sel.shift);
1089         }
1090 }
1091
1092 static void
1093 update_stats(signed *stat, unsigned address)
1094 {
1095         if (*stat >= 0)
1096                 *stat = MAX2(*stat, address + 1);
1097 }
1098
1099 static void
1100 print_load_store_instr(uint64_t data,
1101                        unsigned tabs)
1102 {
1103         midgard_load_store_word *word = (midgard_load_store_word *) &data;
1104
1105         print_ld_st_opcode(word->op);
1106
1107         unsigned address = word->address;
1108
1109         if (is_op_varying(word->op)) {
1110                 print_varying_parameters(word);
1111
1112                 /* Do some analysis: check if direct cacess */
1113
1114                 if ((word->arg_2 == 0x1E) && midg_stats.varying_count >= 0)
1115                         update_stats(&midg_stats.varying_count, address);
1116                 else
1117                         midg_stats.varying_count = -16;
1118         } else if (is_op_attribute(word->op)) {
1119                 if ((word->arg_2 == 0x1E) && midg_stats.attribute_count >= 0)
1120                         update_stats(&midg_stats.attribute_count, address);
1121                 else
1122                         midg_stats.attribute_count = -16;
1123         }
1124
1125         printf(" r%u", word->reg);
1126         print_mask_4(word->mask, false);
1127
1128         if (!OP_IS_STORE(word->op))
1129                 update_dest(word->reg);
1130
1131         bool is_ubo = OP_IS_UBO_READ(word->op);
1132
1133         if (is_ubo) {
1134                 /* UBOs use their own addressing scheme */
1135
1136                 int lo = word->varying_parameters >> 7;
1137                 int hi = word->address;
1138
1139                 /* TODO: Combine fields logically */
1140                 address = (hi << 3) | lo;
1141         }
1142
1143         printf(", %u", address);
1144
1145         print_swizzle_vec4(word->swizzle, false, false);
1146
1147         printf(", ");
1148
1149         if (is_ubo) {
1150                 printf("ubo%u", word->arg_1);
1151                 update_stats(&midg_stats.uniform_buffer_count, word->arg_1);
1152         } else
1153                 print_load_store_arg(word->arg_1, 0);
1154
1155         printf(", ");
1156         print_load_store_arg(word->arg_2, 1);
1157         printf(" /* %X */\n", word->varying_parameters);
1158
1159         midg_stats.instruction_count++;
1160 }
1161
1162 static void
1163 print_load_store_word(uint32_t *word, unsigned tabs)
1164 {
1165         midgard_load_store *load_store = (midgard_load_store *) word;
1166
1167         if (load_store->word1 != 3) {
1168                 print_load_store_instr(load_store->word1, tabs);
1169         }
1170
1171         if (load_store->word2 != 3) {
1172                 print_load_store_instr(load_store->word2, tabs);
1173         }
1174 }
1175
1176 static void
1177 print_texture_reg_select(uint8_t u, unsigned base)
1178 {
1179         midgard_tex_register_select sel;
1180         memcpy(&sel, &u, sizeof(u));
1181
1182         if (!sel.full)
1183                 printf("h");
1184
1185         printf("r%u", base + sel.select);
1186
1187         unsigned component = sel.component;
1188
1189         /* Use the upper half in half-reg mode */
1190         if (sel.upper) {
1191                 assert(!sel.full);
1192                 component += 4;
1193         }
1194
1195         printf(".%c", components[component]);
1196
1197         assert(sel.zero == 0);
1198 }
1199
1200 static void
1201 print_texture_format(int format)
1202 {
1203         /* Act like a modifier */
1204         printf(".");
1205
1206         switch (format) {
1207                 DEFINE_CASE(MALI_TEX_1D, "1d");
1208                 DEFINE_CASE(MALI_TEX_2D, "2d");
1209                 DEFINE_CASE(MALI_TEX_3D, "3d");
1210                 DEFINE_CASE(MALI_TEX_CUBE, "cube");
1211
1212         default:
1213                 unreachable("Bad format");
1214         }
1215 }
1216
1217 static bool
1218 midgard_op_has_helpers(unsigned op, bool gather)
1219 {
1220         if (gather)
1221                 return true;
1222
1223         switch (op) {
1224         case TEXTURE_OP_NORMAL:
1225         case TEXTURE_OP_DFDX:
1226         case TEXTURE_OP_DFDY:
1227                 return true;
1228         default:
1229                 return false;
1230         }
1231 }
1232
1233 static void
1234 print_texture_op(unsigned op, bool gather)
1235 {
1236         /* Act like a bare name, like ESSL functions */
1237
1238         if (gather) {
1239                 printf("textureGather");
1240
1241                 unsigned component = op >> 4;
1242                 unsigned bottom = op & 0xF;
1243
1244                 if (bottom != 0x2)
1245                         printf("_unk%u", bottom);
1246
1247                 printf(".%c", components[component]);
1248                 return;
1249         }
1250
1251         switch (op) {
1252                 DEFINE_CASE(TEXTURE_OP_NORMAL, "texture");
1253                 DEFINE_CASE(TEXTURE_OP_LOD, "textureLod");
1254                 DEFINE_CASE(TEXTURE_OP_TEXEL_FETCH, "texelFetch");
1255                 DEFINE_CASE(TEXTURE_OP_DFDX, "dFdx");
1256                 DEFINE_CASE(TEXTURE_OP_DFDY, "dFdy");
1257
1258         default:
1259                 printf("tex_%X", op);
1260                 break;
1261         }
1262 }
1263
1264 static bool
1265 texture_op_takes_bias(unsigned op)
1266 {
1267         return op == TEXTURE_OP_NORMAL;
1268 }
1269
1270 static char
1271 sampler_type_name(enum mali_sampler_type t)
1272 {
1273         switch (t) {
1274         case MALI_SAMPLER_FLOAT:
1275                 return 'f';
1276         case MALI_SAMPLER_UNSIGNED:
1277                 return 'u';
1278         case MALI_SAMPLER_SIGNED:
1279                 return 'i';
1280         default:
1281                 return '?';
1282         }
1283
1284 }
1285
1286 #undef DEFINE_CASE
1287
1288 static void
1289 print_texture_word(uint32_t *word, unsigned tabs, unsigned in_reg_base, unsigned out_reg_base)
1290 {
1291         midgard_texture_word *texture = (midgard_texture_word *) word;
1292
1293         midg_stats.helper_invocations |=
1294                 midgard_op_has_helpers(texture->op, texture->is_gather);
1295
1296         /* Broad category of texture operation in question */
1297         print_texture_op(texture->op, texture->is_gather);
1298
1299         /* Specific format in question */
1300         print_texture_format(texture->format);
1301
1302         /* Instruction "modifiers" parallel the ALU instructions. */
1303
1304         if (texture->shadow)
1305                 printf(".shadow");
1306
1307         if (texture->cont)
1308                 printf(".cont");
1309
1310         if (texture->last)
1311                 printf(".last");
1312
1313         /* Output modifiers are always interpreted floatly */
1314         print_outmod(texture->outmod, false);
1315
1316         printf(" %sr%u", texture->out_full ? "" : "h",
1317                         out_reg_base + texture->out_reg_select);
1318         print_mask_4(texture->mask, texture->out_upper);
1319         assert(!(texture->out_full && texture->out_upper));
1320         printf(", ");
1321
1322         /* Depending on whether we read from textures directly or indirectly,
1323          * we may be able to update our analysis */
1324
1325         if (texture->texture_register) {
1326                 printf("texture[");
1327                 print_texture_reg_select(texture->texture_handle, in_reg_base);
1328                 printf("], ");
1329
1330                 /* Indirect, tut tut */
1331                 midg_stats.texture_count = -16;
1332         } else {
1333                 printf("texture%u, ", texture->texture_handle);
1334                 update_stats(&midg_stats.texture_count, texture->texture_handle);
1335         }
1336
1337         /* Print the type, GL style */
1338         printf("%csampler", sampler_type_name(texture->sampler_type));
1339
1340         if (texture->sampler_register) {
1341                 printf("[");
1342                 print_texture_reg_select(texture->sampler_handle, in_reg_base);
1343                 printf("]");
1344
1345                 midg_stats.sampler_count = -16;
1346         } else {
1347                 printf("%u", texture->sampler_handle);
1348                 update_stats(&midg_stats.sampler_count, texture->sampler_handle);
1349         }
1350
1351         print_swizzle_vec4(texture->swizzle, false, false);
1352         printf(", %sr%u", texture->in_reg_full ? "" : "h", in_reg_base + texture->in_reg_select);
1353         assert(!(texture->in_reg_full && texture->in_reg_upper));
1354
1355         /* TODO: integrate with swizzle */
1356         if (texture->in_reg_upper)
1357                 printf("'");
1358
1359         print_swizzle_vec4(texture->in_reg_swizzle, false, false);
1360
1361         /* There is *always* an offset attached. Of
1362          * course, that offset is just immediate #0 for a
1363          * GLES call that doesn't take an offset. If there
1364          * is a non-negative non-zero offset, this is
1365          * specified in immediate offset mode, with the
1366          * values in the offset_* fields as immediates. If
1367          * this is a negative offset, we instead switch to
1368          * a register offset mode, where the offset_*
1369          * fields become register triplets */
1370
1371         if (texture->offset_register) {
1372                 printf(" + ");
1373
1374                 bool full = texture->offset & 1;
1375                 bool select = texture->offset & 2;
1376                 bool upper = texture->offset & 4;
1377
1378                 printf("%sr%u", full ? "" : "h", in_reg_base + select);
1379                 assert(!(texture->out_full && texture->out_upper));
1380
1381                 /* TODO: integrate with swizzle */
1382                 if (upper)
1383                         printf("'");
1384
1385                 print_swizzle_vec4(texture->offset >> 3, false, false);
1386
1387                 printf(", ");
1388         } else if (texture->offset) {
1389                 /* Only select ops allow negative immediate offsets, verify */
1390
1391                 signed offset_x = (texture->offset & 0xF);
1392                 signed offset_y = ((texture->offset >> 4) & 0xF);
1393                 signed offset_z = ((texture->offset >> 8) & 0xF);
1394
1395                 bool neg_x = offset_x < 0;
1396                 bool neg_y = offset_y < 0;
1397                 bool neg_z = offset_z < 0;
1398                 bool any_neg = neg_x || neg_y || neg_z;
1399
1400                 if (any_neg && texture->op != TEXTURE_OP_TEXEL_FETCH)
1401                         printf("/* invalid negative */ ");
1402
1403                 /* Regardless, just print the immediate offset */
1404
1405                 printf(" + <%d, %d, %d>, ", offset_x, offset_y, offset_z);
1406         } else {
1407                 printf(", ");
1408         }
1409
1410         char lod_operand = texture_op_takes_bias(texture->op) ? '+' : '=';
1411
1412         if (texture->lod_register) {
1413                 printf("lod %c ", lod_operand);
1414                 print_texture_reg_select(texture->bias, in_reg_base);
1415                 printf(", ");
1416
1417                 if (texture->bias_int)
1418                         printf(" /* bias_int = 0x%X */", texture->bias_int);
1419         } else if (texture->op == TEXTURE_OP_TEXEL_FETCH) {
1420                 /* For texel fetch, the int LOD is in the fractional place and
1421                  * there is no fraction / possibility of bias. We *always* have
1422                  * an explicit LOD, even if it's zero. */
1423
1424                 if (texture->bias_int)
1425                         printf(" /* bias_int = 0x%X */ ", texture->bias_int);
1426
1427                 printf("lod = %u, ", texture->bias);
1428         } else if (texture->bias || texture->bias_int) {
1429                 signed bias_int = texture->bias_int;
1430                 float bias_frac = texture->bias / 256.0f;
1431                 float bias = bias_int + bias_frac;
1432
1433                 bool is_bias = texture_op_takes_bias(texture->op);
1434                 char sign = (bias >= 0.0) ? '+' : '-';
1435                 char operand = is_bias ? sign : '=';
1436
1437                 printf("lod %c %f, ", operand, fabsf(bias));
1438         }
1439
1440         printf("\n");
1441
1442         /* While not zero in general, for these simple instructions the
1443          * following unknowns are zero, so we don't include them */
1444
1445         if (texture->unknown4 ||
1446             texture->unknownA ||
1447             texture->unknown8) {
1448                 printf("// unknown4 = 0x%x\n", texture->unknown4);
1449                 printf("// unknownA = 0x%x\n", texture->unknownA);
1450                 printf("// unknown8 = 0x%x\n", texture->unknown8);
1451         }
1452
1453         midg_stats.instruction_count++;
1454 }
1455
1456 struct midgard_disasm_stats
1457 disassemble_midgard(uint8_t *code, size_t size, unsigned gpu_id, gl_shader_stage stage)
1458 {
1459         uint32_t *words = (uint32_t *) code;
1460         unsigned num_words = size / 4;
1461         int tabs = 0;
1462
1463         bool branch_forward = false;
1464
1465         int last_next_tag = -1;
1466
1467         unsigned i = 0;
1468
1469         midg_tags = calloc(sizeof(midg_tags[0]), num_words);
1470
1471         /* Stats for shader-db */
1472         memset(&midg_stats, 0, sizeof(midg_stats));
1473         midg_ever_written = 0;
1474
1475         while (i < num_words) {
1476                 unsigned tag = words[i] & 0xF;
1477                 unsigned next_tag = (words[i] >> 4) & 0xF;
1478                 printf("\t%X -> %X\n", tag, next_tag);
1479                 unsigned num_quad_words = midgard_word_size[tag];
1480
1481                 if (midg_tags[i] && midg_tags[i] != tag) {
1482                         printf("\t/* XXX: TAG ERROR branch, got ");
1483                         print_tag_short(tag);
1484                         printf(" expected ");
1485                         print_tag_short(midg_tags[i]);
1486                         printf(" */\n");
1487                 }
1488
1489                 midg_tags[i] = tag;
1490
1491                 /* Check the tag */
1492                 if (last_next_tag > 1) {
1493                         if (last_next_tag != tag) {
1494                                 printf("\t/* XXX: TAG ERROR sequence, got ");
1495                                 print_tag_short(tag);
1496                                 printf(" expected ");
1497                                 print_tag_short(last_next_tag);
1498                                 printf(" */\n");
1499                         }
1500                 } else {
1501                         /* TODO: Check ALU case */
1502                 }
1503
1504                 last_next_tag = next_tag;
1505
1506                 switch (midgard_word_types[tag]) {
1507                 case midgard_word_type_texture: {
1508                         bool interpipe_aliasing =
1509                                 midgard_get_quirks(gpu_id) & MIDGARD_INTERPIPE_REG_ALIASING;
1510
1511                         print_texture_word(&words[i], tabs,
1512                                         interpipe_aliasing ? 0 : REG_TEX_BASE,
1513                                         interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE);
1514                         break;
1515                 }
1516
1517                 case midgard_word_type_load_store:
1518                         print_load_store_word(&words[i], tabs);
1519                         break;
1520
1521                 case midgard_word_type_alu:
1522                         branch_forward = print_alu_word(&words[i], num_quad_words, tabs, i + 4*num_quad_words);
1523
1524                         /* Reset word static analysis state */
1525                         is_embedded_constant_half = false;
1526                         is_embedded_constant_int = false;
1527
1528                         break;
1529
1530                 default:
1531                         printf("Unknown word type %u:\n", words[i] & 0xF);
1532                         num_quad_words = 1;
1533                         print_quad_word(&words[i], tabs);
1534                         printf("\n");
1535                         break;
1536                 }
1537
1538                 /* We are parsing per bundle anyway. Add before we start
1539                  * breaking out so we don't miss the final bundle. */
1540
1541                 midg_stats.bundle_count++;
1542                 midg_stats.quadword_count += num_quad_words;
1543
1544                 printf("\n");
1545
1546                 unsigned next = (words[i] & 0xF0) >> 4;
1547
1548                 if (i < num_words && next == 1 && !branch_forward)
1549                         break;
1550
1551                 i += 4 * num_quad_words;
1552         }
1553
1554         /* We computed work_count as max_work_registers, so add one to get the
1555          * count. If no work registers are written, you still have one work
1556          * reported, which is exactly what the hardware expects */
1557
1558         midg_stats.work_count++;
1559
1560         return midg_stats;
1561 }