util: Add a mapping from VkFormat to PIPE_FORMAT.
[mesa.git] / src / panfrost / midgard / midgard_opt_copy_prop.c
1 /*
2 * Copyright (C) 2018 Alyssa Rosenzweig
3 * Copyright (C) 2019 Collabora, Ltd.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25 #include "compiler.h"
26 #include "midgard_ops.h"
27
28 /* Special case for copypropagating the results of vectors */
29
30 static bool
31 midgard_opt_copy_prop_reg(compiler_context *ctx, midgard_block *block)
32 {
33 bool progress = false;
34
35 mir_foreach_instr_in_block_safe(block, ins) {
36 if (ins->type != TAG_ALU_4) continue;
37 if (!OP_IS_MOVE(ins->alu.op)) continue;
38
39 unsigned from = ins->src[1];
40 unsigned to = ins->dest;
41
42 if (!(to & IS_REG)) continue;
43 if (from & IS_REG) continue;
44
45 if (ins->has_inline_constant) continue;
46 if (ins->has_constants) continue;
47 if (mir_nontrivial_source2_mod(ins)) continue;
48 if (mir_nontrivial_outmod(ins)) continue;
49 if (!mir_single_use(ctx, ins->src[1])) continue;
50
51 bool bad = false;
52
53 mir_foreach_instr_global(ctx, c) {
54 if (mir_has_arg(c, ins->src[1])) {
55 if (ins->mask != c->mask)
56 bad = true;
57 }
58 }
59
60 if (bad)
61 continue;
62
63
64 mir_rewrite_index_dst(ctx, ins->src[1], ins->dest);
65 mir_remove_instruction(ins);
66 progress |= true;
67 }
68
69 return progress;
70 }
71
72 bool
73 midgard_opt_copy_prop(compiler_context *ctx, midgard_block *block)
74 {
75 bool progress = false;
76
77 mir_foreach_instr_in_block_safe(block, ins) {
78 if (ins->type != TAG_ALU_4) continue;
79 if (!OP_IS_MOVE(ins->alu.op)) continue;
80
81 unsigned from = ins->src[1];
82 unsigned to = ins->dest;
83
84 /* We only work on pure SSA */
85
86 if (to >= SSA_FIXED_MINIMUM) continue;
87 if (from >= SSA_FIXED_MINIMUM) continue;
88 if (to & IS_REG) continue;
89 if (from & IS_REG) continue;
90
91 /* Constant propagation is not handled here, either */
92 if (ins->has_inline_constant) continue;
93 if (ins->has_constants) continue;
94
95 /* Modifier propagation is not handled here */
96 if (mir_nontrivial_source2_mod_simple(ins)) continue;
97 if (mir_nontrivial_outmod(ins)) continue;
98
99 /* Shortened arguments (bias for textures, extra load/store
100 * arguments, etc.) do not get a swizzle, only a start
101 * component and even that is restricted. Fragment writeout
102 * doesn't even get that much */
103
104 bool skip = false;
105
106 mir_foreach_instr_global(ctx, q) {
107 bool is_tex = q->type == TAG_TEXTURE_4;
108 bool is_ldst = q->type == TAG_LOAD_STORE_4;
109 bool is_branch = q->compact_branch;
110
111 if (!(is_tex || is_ldst || is_branch)) continue;
112
113 /* For textures, we get a real swizzle for the
114 * coordinate and the content. For stores, we get one.
115 * For loads, we get none. */
116
117 unsigned start =
118 is_tex ? 2 :
119 OP_IS_STORE(q->load_store.op) ? 1 : 0;
120
121 mir_foreach_src(q, s) {
122 if ((s >= start) && q->src[s] == to) {
123 skip = true;
124 break;
125 }
126 }
127 }
128
129 if (skip)
130 continue;
131
132 /* We're clear -- rewrite, composing the swizzle */
133 mir_rewrite_index_src_swizzle(ctx, to, from, ins->swizzle[1]);
134 mir_remove_instruction(ins);
135 progress |= true;
136 }
137
138 return progress | midgard_opt_copy_prop_reg(ctx, block);
139 }