src/panfrost/midgard/midgard_opt_invert.c

   1 /*
   2  * Copyright (C) 2019 Collabora, Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  */
  23
  24 #include "compiler.h"
  25 #include "midgard_ops.h"
  26
  27 /* Lowers the invert field on instructions to a dedicated inot (inor)
  28  * instruction instead, as invert is not always supported natively by the
  29  * hardware */
  30
  31 void
  32 midgard_lower_invert(compiler_context *ctx, midgard_block *block)
  33 {
  34         mir_foreach_instr_in_block_safe(block, ins) {
  35                 if (ins->type != TAG_ALU_4) continue;
  36                 if (!ins->invert) continue;
  37
  38                 unsigned temp = make_compiler_temp(ctx);
  39
  40                 midgard_instruction not = {
  41                         .type = TAG_ALU_4,
  42                         .mask = ins->mask,
  43                         .ssa_args = {
  44                                 .src0 = temp,
  45                                 .src1 = 0,
  46                                 .dest = ins->ssa_args.dest,
  47                                 .inline_constant = true
  48                         },
  49                         .alu = {
  50                                 .op = midgard_alu_op_inor,
  51                                 /* TODO: i16 */
  52                                 .reg_mode = midgard_reg_mode_32,
  53                                 .dest_override = midgard_dest_override_none,
  54                                 .outmod = midgard_outmod_int_wrap,
  55                                 .src1 = vector_alu_srco_unsigned(blank_alu_src),
  56                                 .src2 = vector_alu_srco_unsigned(zero_alu_src)
  57                         },
  58                 };
  59
  60                 ins->ssa_args.dest = temp;
  61                 ins->invert = false;
  62                 mir_insert_instruction_before(mir_next_op(ins), not);
  63         }
  64 }