2 * Copyright (C) 2019 Alyssa Rosenzweig <alyssa@rosenzweig.io>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 #include "midgard_ops.h"
27 void mir_rewrite_index_src_single(midgard_instruction
*ins
, unsigned old
, unsigned new)
29 if (ins
->ssa_args
.src0
== old
)
30 ins
->ssa_args
.src0
= new;
32 if (ins
->ssa_args
.src1
== old
&&
33 !ins
->ssa_args
.inline_constant
)
34 ins
->ssa_args
.src1
= new;
39 mir_rewrite_index_src(compiler_context
*ctx
, unsigned old
, unsigned new)
41 mir_foreach_instr_global(ctx
, ins
) {
42 mir_rewrite_index_src_single(ins
, old
, new);
47 mir_rewrite_index_src_tag(compiler_context
*ctx
, unsigned old
, unsigned new, unsigned tag
)
49 mir_foreach_instr_global(ctx
, ins
) {
53 mir_rewrite_index_src_single(ins
, old
, new);
60 mir_rewrite_index_dst(compiler_context
*ctx
, unsigned old
, unsigned new)
62 mir_foreach_instr_global(ctx
, ins
) {
63 if (ins
->ssa_args
.dest
== old
)
64 ins
->ssa_args
.dest
= new;
69 mir_rewrite_index_dst_tag(compiler_context
*ctx
, unsigned old
, unsigned new, unsigned tag
)
71 mir_foreach_instr_global(ctx
, ins
) {
75 if (ins
->ssa_args
.dest
== old
)
76 ins
->ssa_args
.dest
= new;
83 mir_rewrite_index(compiler_context
*ctx
, unsigned old
, unsigned new)
85 mir_rewrite_index_src(ctx
, old
, new);
86 mir_rewrite_index_dst(ctx
, old
, new);
90 mir_use_count(compiler_context
*ctx
, unsigned value
)
92 unsigned used_count
= 0;
94 mir_foreach_instr_global(ctx
, ins
) {
95 if (mir_has_arg(ins
, value
))
102 /* Checks if a value is used only once (or totally dead), which is an important
103 * heuristic to figure out if certain optimizations are Worth It (TM) */
106 mir_single_use(compiler_context
*ctx
, unsigned value
)
108 return mir_use_count(ctx
, value
) <= 1;
112 mir_nontrivial_raw_mod(midgard_vector_alu_src src
, bool is_int
)
115 return src
.mod
== midgard_int_shift
;
121 mir_nontrivial_mod(midgard_vector_alu_src src
, bool is_int
, unsigned mask
)
123 if (mir_nontrivial_raw_mod(src
, is_int
)) return true;
125 /* size-conversion */
126 if (src
.half
) return true;
129 for (unsigned c
= 0; c
< 4; ++c
) {
130 if (!(mask
& (1 << c
))) continue;
131 if (((src
.swizzle
>> (2*c
)) & 3) != c
) return true;
137 mir_nontrivial_source2_mod(midgard_instruction
*ins
)
139 bool is_int
= midgard_is_integer_op(ins
->alu
.op
);
141 midgard_vector_alu_src src2
=
142 vector_alu_from_unsigned(ins
->alu
.src2
);
144 return mir_nontrivial_mod(src2
, is_int
, ins
->mask
);
148 mir_nontrivial_outmod(midgard_instruction
*ins
)
150 bool is_int
= midgard_is_integer_op(ins
->alu
.op
);
151 unsigned mod
= ins
->alu
.outmod
;
157 /* Type conversion is a sort of outmod */
158 if (ins
->alu
.dest_override
!= midgard_dest_override_none
)
162 return mod
!= midgard_outmod_int_wrap
;
164 return mod
!= midgard_outmod_none
;
167 /* Checks if an index will be used as a special register -- basically, if we're
168 * used as the input to a non-ALU op */
171 mir_special_index(compiler_context
*ctx
, unsigned idx
)
173 mir_foreach_instr_global(ctx
, ins
) {
174 bool is_ldst
= ins
->type
== TAG_LOAD_STORE_4
;
175 bool is_tex
= ins
->type
== TAG_TEXTURE_4
;
177 if (!(is_ldst
|| is_tex
))
180 if (mir_has_arg(ins
, idx
))
187 /* Is a node written before a given instruction? */
190 mir_is_written_before(compiler_context
*ctx
, midgard_instruction
*ins
, unsigned node
)
192 if ((node
< 0) || (node
>= SSA_FIXED_MINIMUM
))
195 mir_foreach_instr_global(ctx
, q
) {
199 if (q
->ssa_args
.dest
== node
)
206 /* Creates a mask of the components of a node read by an instruction, by
207 * analyzing the swizzle with respect to the instruction's mask. E.g.:
209 * fadd r0.xz, r1.yyyy, r2.zwyx
211 * will return a mask of Z/Y for r2
215 mir_mask_of_read_components_single(unsigned src
, unsigned outmask
)
217 midgard_vector_alu_src s
= vector_alu_from_unsigned(src
);
220 for (unsigned c
= 0; c
< 4; ++c
) {
221 if (!(outmask
& (1 << c
))) continue;
223 unsigned comp
= (s
.swizzle
>> (2*c
)) & 3;
231 mir_mask_of_read_components(midgard_instruction
*ins
, unsigned node
)
233 assert(ins
->type
== TAG_ALU_4
);
237 if (ins
->ssa_args
.src0
== node
)
238 mask
|= mir_mask_of_read_components_single(ins
->alu
.src1
, ins
->mask
);
240 if (ins
->ssa_args
.src1
== node
&& !ins
->ssa_args
.inline_constant
)
241 mask
|= mir_mask_of_read_components_single(ins
->alu
.src2
, ins
->mask
);