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panfrost: Remove most usage of midgard_payload_vertex_tiler
[mesa.git] / src / panfrost / pandecode / decode.c
1 /*
2 * Copyright (C) 2017-2019 Alyssa Rosenzweig
3 * Copyright (C) 2017-2019 Connor Abbott
4 * Copyright (C) 2019 Collabora, Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 #include <panfrost-job.h>
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <memory.h>
30 #include <stdbool.h>
31 #include <stdarg.h>
32 #include <ctype.h>
33 #include "decode.h"
34 #include "util/macros.h"
35 #include "util/u_math.h"
36
37 #include "pan_pretty_print.h"
38 #include "midgard/disassemble.h"
39 #include "bifrost/disassemble.h"
40
41 #include "pan_encoder.h"
42
43 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
44
45 #define MEMORY_PROP(obj, p) {\
46 if (obj->p) { \
47 char *a = pointer_as_memory_reference(obj->p); \
48 pandecode_prop("%s = %s", #p, a); \
49 free(a); \
50 } \
51 }
52
53 #define MEMORY_PROP_DIR(obj, p) {\
54 if (obj.p) { \
55 char *a = pointer_as_memory_reference(obj.p); \
56 pandecode_prop("%s = %s", #p, a); \
57 free(a); \
58 } \
59 }
60
61 FILE *pandecode_dump_stream;
62
63 /* Semantic logging type.
64 *
65 * Raw: for raw messages to be printed as is.
66 * Message: for helpful information to be commented out in replays.
67 * Property: for properties of a struct
68 *
69 * Use one of pandecode_log, pandecode_msg, or pandecode_prop as syntax sugar.
70 */
71
72 enum pandecode_log_type {
73 PANDECODE_RAW,
74 PANDECODE_MESSAGE,
75 PANDECODE_PROPERTY
76 };
77
78 #define pandecode_log(...) pandecode_log_typed(PANDECODE_RAW, __VA_ARGS__)
79 #define pandecode_msg(...) pandecode_log_typed(PANDECODE_MESSAGE, __VA_ARGS__)
80 #define pandecode_prop(...) pandecode_log_typed(PANDECODE_PROPERTY, __VA_ARGS__)
81
82 unsigned pandecode_indent = 0;
83
84 static void
85 pandecode_make_indent(void)
86 {
87 for (unsigned i = 0; i < pandecode_indent; ++i)
88 fprintf(pandecode_dump_stream, " ");
89 }
90
91 static void
92 pandecode_log_typed(enum pandecode_log_type type, const char *format, ...)
93 {
94 va_list ap;
95
96 pandecode_make_indent();
97
98 if (type == PANDECODE_MESSAGE)
99 fprintf(pandecode_dump_stream, "// ");
100 else if (type == PANDECODE_PROPERTY)
101 fprintf(pandecode_dump_stream, ".");
102
103 va_start(ap, format);
104 vfprintf(pandecode_dump_stream, format, ap);
105 va_end(ap);
106
107 if (type == PANDECODE_PROPERTY)
108 fprintf(pandecode_dump_stream, ",\n");
109 }
110
111 static void
112 pandecode_log_cont(const char *format, ...)
113 {
114 va_list ap;
115
116 va_start(ap, format);
117 vfprintf(pandecode_dump_stream, format, ap);
118 va_end(ap);
119 }
120
121 /* To check for memory safety issues, validates that the given pointer in GPU
122 * memory is valid, containing at least sz bytes. The goal is to eliminate
123 * GPU-side memory bugs (NULL pointer dereferences, buffer overflows, or buffer
124 * overruns) by statically validating pointers.
125 */
126
127 static void
128 pandecode_validate_buffer(mali_ptr addr, size_t sz)
129 {
130 if (!addr) {
131 pandecode_msg("XXX: null pointer deref");
132 return;
133 }
134
135 /* Find a BO */
136
137 struct pandecode_mapped_memory *bo =
138 pandecode_find_mapped_gpu_mem_containing(addr);
139
140 if (!bo) {
141 pandecode_msg("XXX: invalid memory dereference\n");
142 return;
143 }
144
145 /* Bounds check */
146
147 unsigned offset = addr - bo->gpu_va;
148 unsigned total = offset + sz;
149
150 if (total > bo->length) {
151 pandecode_msg("XXX: buffer overrun. "
152 "Chunk of size %zu at offset %d in buffer of size %zu. "
153 "Overrun by %zu bytes. \n",
154 sz, offset, bo->length, total - bo->length);
155 return;
156 }
157 }
158
159 struct pandecode_flag_info {
160 u64 flag;
161 const char *name;
162 };
163
164 static void
165 pandecode_log_decoded_flags(const struct pandecode_flag_info *flag_info,
166 u64 flags)
167 {
168 bool decodable_flags_found = false;
169
170 for (int i = 0; flag_info[i].name; i++) {
171 if ((flags & flag_info[i].flag) != flag_info[i].flag)
172 continue;
173
174 if (!decodable_flags_found) {
175 decodable_flags_found = true;
176 } else {
177 pandecode_log_cont(" | ");
178 }
179
180 pandecode_log_cont("%s", flag_info[i].name);
181
182 flags &= ~flag_info[i].flag;
183 }
184
185 if (decodable_flags_found) {
186 if (flags)
187 pandecode_log_cont(" | 0x%" PRIx64, flags);
188 } else {
189 pandecode_log_cont("0x%" PRIx64, flags);
190 }
191 }
192
193 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
194 static const struct pandecode_flag_info gl_enable_flag_info[] = {
195 FLAG_INFO(OCCLUSION_QUERY),
196 FLAG_INFO(OCCLUSION_PRECISE),
197 FLAG_INFO(FRONT_CCW_TOP),
198 FLAG_INFO(CULL_FACE_FRONT),
199 FLAG_INFO(CULL_FACE_BACK),
200 {}
201 };
202 #undef FLAG_INFO
203
204 #define FLAG_INFO(flag) { MALI_CLEAR_##flag, "MALI_CLEAR_" #flag }
205 static const struct pandecode_flag_info clear_flag_info[] = {
206 FLAG_INFO(FAST),
207 FLAG_INFO(SLOW),
208 FLAG_INFO(SLOW_STENCIL),
209 {}
210 };
211 #undef FLAG_INFO
212
213 #define FLAG_INFO(flag) { MALI_MASK_##flag, "MALI_MASK_" #flag }
214 static const struct pandecode_flag_info mask_flag_info[] = {
215 FLAG_INFO(R),
216 FLAG_INFO(G),
217 FLAG_INFO(B),
218 FLAG_INFO(A),
219 {}
220 };
221 #undef FLAG_INFO
222
223 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
224 static const struct pandecode_flag_info u3_flag_info[] = {
225 FLAG_INFO(HAS_MSAA),
226 FLAG_INFO(CAN_DISCARD),
227 FLAG_INFO(HAS_BLEND_SHADER),
228 FLAG_INFO(DEPTH_WRITEMASK),
229 {}
230 };
231
232 static const struct pandecode_flag_info u4_flag_info[] = {
233 FLAG_INFO(NO_MSAA),
234 FLAG_INFO(NO_DITHER),
235 FLAG_INFO(DEPTH_RANGE_A),
236 FLAG_INFO(DEPTH_RANGE_B),
237 FLAG_INFO(STENCIL_TEST),
238 FLAG_INFO(SAMPLE_ALPHA_TO_COVERAGE_NO_BLEND_SHADER),
239 {}
240 };
241 #undef FLAG_INFO
242
243 #define FLAG_INFO(flag) { MALI_MFBD_FORMAT_##flag, "MALI_MFBD_FORMAT_" #flag }
244 static const struct pandecode_flag_info mfbd_fmt_flag_info[] = {
245 FLAG_INFO(MSAA),
246 FLAG_INFO(SRGB),
247 {}
248 };
249 #undef FLAG_INFO
250
251 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
252 static const struct pandecode_flag_info mfbd_extra_flag_hi_info[] = {
253 FLAG_INFO(PRESENT),
254 {}
255 };
256 #undef FLAG_INFO
257
258 #define FLAG_INFO(flag) { MALI_EXTRA_##flag, "MALI_EXTRA_" #flag }
259 static const struct pandecode_flag_info mfbd_extra_flag_lo_info[] = {
260 FLAG_INFO(ZS),
261 {}
262 };
263 #undef FLAG_INFO
264
265 #define FLAG_INFO(flag) { MALI_##flag, "MALI_" #flag }
266 static const struct pandecode_flag_info shader_midgard1_flag_lo_info [] = {
267 FLAG_INFO(WRITES_Z),
268 FLAG_INFO(EARLY_Z),
269 FLAG_INFO(READS_TILEBUFFER),
270 FLAG_INFO(READS_ZS),
271 {}
272 };
273
274 static const struct pandecode_flag_info shader_midgard1_flag_hi_info [] = {
275 FLAG_INFO(WRITES_S),
276 {}
277 };
278 #undef FLAG_INFO
279
280 #define FLAG_INFO(flag) { MALI_MFBD_##flag, "MALI_MFBD_" #flag }
281 static const struct pandecode_flag_info mfbd_flag_info [] = {
282 FLAG_INFO(DEPTH_WRITE),
283 FLAG_INFO(EXTRA),
284 {}
285 };
286 #undef FLAG_INFO
287
288 #define FLAG_INFO(flag) { MALI_SAMP_##flag, "MALI_SAMP_" #flag }
289 static const struct pandecode_flag_info sampler_flag_info [] = {
290 FLAG_INFO(MAG_NEAREST),
291 FLAG_INFO(MIN_NEAREST),
292 FLAG_INFO(MIP_LINEAR_1),
293 FLAG_INFO(MIP_LINEAR_2),
294 FLAG_INFO(NORM_COORDS),
295 {}
296 };
297 #undef FLAG_INFO
298
299 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
300 static const struct pandecode_flag_info sfbd_unk1_info [] = {
301 FLAG_INFO(MSAA_8),
302 FLAG_INFO(MSAA_A),
303 {}
304 };
305 #undef FLAG_INFO
306
307 #define FLAG_INFO(flag) { MALI_SFBD_FORMAT_##flag, "MALI_SFBD_FORMAT_" #flag }
308 static const struct pandecode_flag_info sfbd_unk2_info [] = {
309 FLAG_INFO(MSAA_B),
310 FLAG_INFO(SRGB),
311 {}
312 };
313 #undef FLAG_INFO
314
315 extern char *replace_fragment;
316 extern char *replace_vertex;
317
318 static char *
319 pandecode_job_type(enum mali_job_type type)
320 {
321 #define DEFINE_CASE(name) case JOB_TYPE_ ## name: return "JOB_TYPE_" #name
322
323 switch (type) {
324 DEFINE_CASE(NULL);
325 DEFINE_CASE(WRITE_VALUE);
326 DEFINE_CASE(CACHE_FLUSH);
327 DEFINE_CASE(COMPUTE);
328 DEFINE_CASE(VERTEX);
329 DEFINE_CASE(TILER);
330 DEFINE_CASE(FUSED);
331 DEFINE_CASE(FRAGMENT);
332
333 case JOB_NOT_STARTED:
334 return "NOT_STARTED";
335
336 default:
337 pandecode_log("Warning! Unknown job type %x\n", type);
338 return "!?!?!?";
339 }
340
341 #undef DEFINE_CASE
342 }
343
344 static char *
345 pandecode_draw_mode(enum mali_draw_mode mode)
346 {
347 #define DEFINE_CASE(name) case MALI_ ## name: return "MALI_" #name
348
349 switch (mode) {
350 DEFINE_CASE(DRAW_NONE);
351 DEFINE_CASE(POINTS);
352 DEFINE_CASE(LINES);
353 DEFINE_CASE(TRIANGLES);
354 DEFINE_CASE(TRIANGLE_STRIP);
355 DEFINE_CASE(TRIANGLE_FAN);
356 DEFINE_CASE(LINE_STRIP);
357 DEFINE_CASE(LINE_LOOP);
358 DEFINE_CASE(POLYGON);
359 DEFINE_CASE(QUADS);
360 DEFINE_CASE(QUAD_STRIP);
361
362 default:
363 pandecode_msg("XXX: invalid draw mode %X\n", mode);
364 return "";
365 }
366
367 #undef DEFINE_CASE
368 }
369
370 #define DEFINE_CASE(name) case MALI_FUNC_ ## name: return "MALI_FUNC_" #name
371 static char *
372 pandecode_func(enum mali_func mode)
373 {
374 switch (mode) {
375 DEFINE_CASE(NEVER);
376 DEFINE_CASE(LESS);
377 DEFINE_CASE(EQUAL);
378 DEFINE_CASE(LEQUAL);
379 DEFINE_CASE(GREATER);
380 DEFINE_CASE(NOTEQUAL);
381 DEFINE_CASE(GEQUAL);
382 DEFINE_CASE(ALWAYS);
383
384 default:
385 pandecode_msg("XXX: invalid func %X\n", mode);
386 return "";
387 }
388 }
389 #undef DEFINE_CASE
390
391 #define DEFINE_CASE(name) case MALI_STENCIL_ ## name: return "MALI_STENCIL_" #name
392 static char *
393 pandecode_stencil_op(enum mali_stencil_op op)
394 {
395 switch (op) {
396 DEFINE_CASE(KEEP);
397 DEFINE_CASE(REPLACE);
398 DEFINE_CASE(ZERO);
399 DEFINE_CASE(INVERT);
400 DEFINE_CASE(INCR_WRAP);
401 DEFINE_CASE(DECR_WRAP);
402 DEFINE_CASE(INCR);
403 DEFINE_CASE(DECR);
404
405 default:
406 pandecode_msg("XXX: invalid stencil op %X\n", op);
407 return "";
408 }
409 }
410
411 #undef DEFINE_CASE
412
413 static char *pandecode_attr_mode_short(enum mali_attr_mode mode)
414 {
415 switch(mode) {
416 /* TODO: Combine to just "instanced" once this can be done
417 * unambiguously in all known cases */
418 case MALI_ATTR_POT_DIVIDE:
419 return "instanced_pot";
420 case MALI_ATTR_MODULO:
421 return "instanced_mod";
422 case MALI_ATTR_NPOT_DIVIDE:
423 return "instanced_npot";
424 case MALI_ATTR_IMAGE:
425 return "image";
426 default:
427 pandecode_msg("XXX: invalid attribute mode %X\n", mode);
428 return "";
429 }
430 }
431
432 static const char *
433 pandecode_special_record(uint64_t v, bool* attribute)
434 {
435 switch(v) {
436 case MALI_ATTR_VERTEXID:
437 *attribute = true;
438 return "gl_VertexID";
439 case MALI_ATTR_INSTANCEID:
440 *attribute = true;
441 return "gl_InstanceID";
442 case MALI_VARYING_FRAG_COORD:
443 return "gl_FragCoord";
444 case MALI_VARYING_FRONT_FACING:
445 return "gl_FrontFacing";
446 case MALI_VARYING_POINT_COORD:
447 return "gl_PointCoord";
448 default:
449 pandecode_msg("XXX: invalid special record %" PRIx64 "\n", v);
450 return "";
451 }
452 }
453
454 #define DEFINE_CASE(name) case MALI_WRAP_## name: return "MALI_WRAP_" #name
455 static char *
456 pandecode_wrap_mode(enum mali_wrap_mode op)
457 {
458 switch (op) {
459 DEFINE_CASE(REPEAT);
460 DEFINE_CASE(CLAMP_TO_EDGE);
461 DEFINE_CASE(CLAMP_TO_BORDER);
462 DEFINE_CASE(MIRRORED_REPEAT);
463
464 default:
465 pandecode_msg("XXX: invalid wrap mode %X\n", op);
466 return "";
467 }
468 }
469 #undef DEFINE_CASE
470
471 #define DEFINE_CASE(name) case MALI_BLOCK_## name: return "MALI_BLOCK_" #name
472 static char *
473 pandecode_block_format(enum mali_block_format fmt)
474 {
475 switch (fmt) {
476 DEFINE_CASE(TILED);
477 DEFINE_CASE(UNKNOWN);
478 DEFINE_CASE(LINEAR);
479 DEFINE_CASE(AFBC);
480
481 default:
482 unreachable("Invalid case");
483 }
484 }
485 #undef DEFINE_CASE
486
487 #define DEFINE_CASE(name) case MALI_EXCEPTION_ACCESS_## name: return ""#name
488 char *
489 pandecode_exception_access(unsigned access)
490 {
491 switch (access) {
492 DEFINE_CASE(NONE);
493 DEFINE_CASE(EXECUTE);
494 DEFINE_CASE(READ);
495 DEFINE_CASE(WRITE);
496
497 default:
498 unreachable("Invalid case");
499 }
500 }
501 #undef DEFINE_CASE
502
503 /* Midgard's tiler descriptor is embedded within the
504 * larger FBD */
505
506 static void
507 pandecode_midgard_tiler_descriptor(
508 const struct midgard_tiler_descriptor *t,
509 unsigned width,
510 unsigned height,
511 bool is_fragment,
512 bool has_hierarchy)
513 {
514 pandecode_log(".tiler = {\n");
515 pandecode_indent++;
516
517 if (t->hierarchy_mask == MALI_TILER_DISABLED)
518 pandecode_prop("hierarchy_mask = MALI_TILER_DISABLED");
519 else
520 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
521
522 /* We know this name from the kernel, but we never see it nonzero */
523
524 if (t->flags)
525 pandecode_msg("XXX: unexpected tiler flags 0x%" PRIx16, t->flags);
526
527 MEMORY_PROP(t, polygon_list);
528
529 /* The body is offset from the base of the polygon list */
530 //assert(t->polygon_list_body > t->polygon_list);
531 unsigned body_offset = t->polygon_list_body - t->polygon_list;
532
533 /* It needs to fit inside the reported size */
534 //assert(t->polygon_list_size >= body_offset);
535
536 /* Check that we fit */
537 struct pandecode_mapped_memory *plist =
538 pandecode_find_mapped_gpu_mem_containing(t->polygon_list);
539
540 //assert(t->polygon_list_size <= plist->length);
541
542 /* Now that we've sanity checked, we'll try to calculate the sizes
543 * ourselves for comparison */
544
545 unsigned ref_header = panfrost_tiler_header_size(width, height, t->hierarchy_mask, has_hierarchy);
546 unsigned ref_size = panfrost_tiler_full_size(width, height, t->hierarchy_mask, has_hierarchy);
547
548 if (!((ref_header == body_offset) && (ref_size == t->polygon_list_size))) {
549 pandecode_msg("XXX: bad polygon list size (expected %d / 0x%x)\n",
550 ref_header, ref_size);
551 pandecode_prop("polygon_list_size = 0x%x", t->polygon_list_size);
552 pandecode_msg("body offset %d\n", body_offset);
553 }
554
555 /* The tiler heap has a start and end specified -- it should be
556 * identical to what we have in the BO. The exception is if tiling is
557 * disabled. */
558
559 MEMORY_PROP(t, heap_start);
560 assert(t->heap_end >= t->heap_start);
561
562 struct pandecode_mapped_memory *heap =
563 pandecode_find_mapped_gpu_mem_containing(t->heap_start);
564
565 unsigned heap_size = t->heap_end - t->heap_start;
566
567 /* Tiling is enabled with a special flag */
568 unsigned hierarchy_mask = t->hierarchy_mask & MALI_HIERARCHY_MASK;
569 unsigned tiler_flags = t->hierarchy_mask ^ hierarchy_mask;
570
571 bool tiling_enabled = hierarchy_mask;
572
573 if (tiling_enabled) {
574 /* When tiling is enabled, the heap should be a tight fit */
575 unsigned heap_offset = t->heap_start - heap->gpu_va;
576 if ((heap_offset + heap_size) != heap->length) {
577 pandecode_msg("XXX: heap size %u (expected %zu)\n",
578 heap_size, heap->length - heap_offset);
579 }
580
581 /* We should also have no other flags */
582 if (tiler_flags)
583 pandecode_msg("XXX: unexpected tiler %X\n", tiler_flags);
584 } else {
585 /* When tiling is disabled, we should have that flag and no others */
586
587 if (tiler_flags != MALI_TILER_DISABLED) {
588 pandecode_msg("XXX: unexpected tiler flag %X, expected MALI_TILER_DISABLED\n",
589 tiler_flags);
590 }
591
592 /* We should also have an empty heap */
593 if (heap_size) {
594 pandecode_msg("XXX: tiler heap size %d given, expected empty\n",
595 heap_size);
596 }
597
598 /* Disabled tiling is used only for clear-only jobs, which are
599 * purely FRAGMENT, so we should never see this for
600 * non-FRAGMENT descriptors. */
601
602 if (!is_fragment)
603 pandecode_msg("XXX: tiler disabled for non-FRAGMENT job\n");
604 }
605
606 /* We've never seen weights used in practice, but we know from the
607 * kernel these fields is there */
608
609 bool nonzero_weights = false;
610
611 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
612 nonzero_weights |= t->weights[w] != 0x0;
613 }
614
615 if (nonzero_weights) {
616 pandecode_log(".weights = { ");
617
618 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
619 pandecode_log_cont("%d, ", t->weights[w]);
620 }
621
622 pandecode_log("},");
623 }
624
625 pandecode_indent--;
626 pandecode_log("}\n");
627 }
628
629 /* TODO: The Bifrost tiler is not understood at all yet */
630
631 static void
632 pandecode_bifrost_tiler_descriptor(const struct midgard_tiler_descriptor *t)
633 {
634 pandecode_log(".tiler = {\n");
635 pandecode_indent++;
636
637 pandecode_prop("polygon_list_size = 0x%" PRIx32, t->polygon_list_size);
638 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
639 pandecode_prop("flags = 0x%" PRIx16, t->flags);
640
641 MEMORY_PROP(t, polygon_list);
642 MEMORY_PROP(t, polygon_list_body);
643 MEMORY_PROP(t, heap_start);
644 MEMORY_PROP(t, heap_end);
645
646 pandecode_log(".weights = { ");
647
648 for (unsigned w = 0; w < ARRAY_SIZE(t->weights); ++w) {
649 pandecode_log_cont("%d, ", t->weights[w]);
650 }
651
652 pandecode_log("},\n");
653
654 pandecode_indent--;
655 pandecode_log("}\n");
656
657 }
658
659 /* Information about the framebuffer passed back for
660 * additional analysis */
661
662 struct pandecode_fbd {
663 unsigned width;
664 unsigned height;
665 unsigned rt_count;
666 bool has_extra;
667 };
668
669 static void
670 pandecode_sfbd_format(struct mali_sfbd_format format)
671 {
672 pandecode_log(".format = {\n");
673 pandecode_indent++;
674
675 pandecode_log(".unk1 = ");
676 pandecode_log_decoded_flags(sfbd_unk1_info, format.unk1);
677 pandecode_log_cont(",\n");
678
679 /* TODO: Map formats so we can check swizzles and print nicely */
680 pandecode_log("swizzle");
681 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
682 pandecode_log_cont(",\n");
683
684 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
685 (format.nr_channels + 1));
686
687 pandecode_log(".unk2 = ");
688 pandecode_log_decoded_flags(sfbd_unk2_info, format.unk2);
689 pandecode_log_cont(",\n");
690
691 pandecode_prop("block = %s", pandecode_block_format(format.block));
692
693 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
694
695 pandecode_indent--;
696 pandecode_log("},\n");
697 }
698
699 static void
700 pandecode_shared_memory(const struct mali_shared_memory *desc, bool is_compute)
701 {
702 pandecode_prop("stack_shift = 0x%x", desc->stack_shift);
703
704 if (desc->unk0)
705 pandecode_prop("unk0 = 0x%x", desc->unk0);
706
707 if (desc->shared_workgroup_count != 0x1F) {
708 pandecode_prop("shared_workgroup_count = %d", desc->shared_workgroup_count);
709 if (!is_compute)
710 pandecode_msg("XXX: wrong workgroup count for noncompute\n");
711 }
712
713 if (desc->shared_unk1 || desc->shared_shift) {
714 pandecode_prop("shared_unk1 = %X", desc->shared_unk1);
715 pandecode_prop("shared_shift = %X", desc->shared_shift);
716
717 if (!is_compute)
718 pandecode_msg("XXX: shared memory configured in noncompute shader");
719 }
720
721 if (desc->shared_zero) {
722 pandecode_msg("XXX: shared memory zero tripped\n");
723 pandecode_prop("shared_zero = 0x%" PRIx32, desc->shared_zero);
724 }
725
726 if (desc->shared_memory && !is_compute)
727 pandecode_msg("XXX: shared memory used in noncompute shader\n");
728
729 MEMORY_PROP(desc, scratchpad);
730 MEMORY_PROP(desc, shared_memory);
731 MEMORY_PROP(desc, unknown1);
732
733 if (desc->scratchpad) {
734 struct pandecode_mapped_memory *smem =
735 pandecode_find_mapped_gpu_mem_containing(desc->scratchpad);
736
737 pandecode_msg("scratchpad size %u\n", smem->length);
738 }
739
740 }
741
742 static struct pandecode_fbd
743 pandecode_sfbd(uint64_t gpu_va, int job_no, bool is_fragment, unsigned gpu_id)
744 {
745 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
746 const struct mali_single_framebuffer *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
747
748 struct pandecode_fbd info = {
749 .has_extra = false,
750 .rt_count = 1
751 };
752
753 pandecode_log("struct mali_single_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
754 pandecode_indent++;
755
756 pandecode_log(".shared_memory = {\n");
757 pandecode_indent++;
758 pandecode_shared_memory(&s->shared_memory, false);
759 pandecode_indent--;
760 pandecode_log("},\n");
761
762 pandecode_sfbd_format(s->format);
763
764 info.width = s->width + 1;
765 info.height = s->height + 1;
766
767 pandecode_prop("width = MALI_POSITIVE(%" PRId16 ")", info.width);
768 pandecode_prop("height = MALI_POSITIVE(%" PRId16 ")", info.height);
769
770 MEMORY_PROP(s, checksum);
771
772 if (s->checksum_stride)
773 pandecode_prop("checksum_stride = %d", s->checksum_stride);
774
775 MEMORY_PROP(s, framebuffer);
776 pandecode_prop("stride = %d", s->stride);
777
778 /* Earlier in the actual commandstream -- right before width -- but we
779 * delay to flow nicer */
780
781 pandecode_log(".clear_flags = ");
782 pandecode_log_decoded_flags(clear_flag_info, s->clear_flags);
783 pandecode_log_cont(",\n");
784
785 if (s->depth_buffer) {
786 MEMORY_PROP(s, depth_buffer);
787 pandecode_prop("depth_stride = %d", s->depth_stride);
788 }
789
790 if (s->stencil_buffer) {
791 MEMORY_PROP(s, stencil_buffer);
792 pandecode_prop("stencil_stride = %d", s->stencil_stride);
793 }
794
795 if (s->depth_stride_zero ||
796 s->stencil_stride_zero ||
797 s->zero7 || s->zero8) {
798 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
799 pandecode_prop("depth_stride_zero = 0x%x",
800 s->depth_stride_zero);
801 pandecode_prop("stencil_stride_zero = 0x%x",
802 s->stencil_stride_zero);
803 pandecode_prop("zero7 = 0x%" PRIx32,
804 s->zero7);
805 pandecode_prop("zero8 = 0x%" PRIx32,
806 s->zero8);
807 }
808
809 if (s->clear_color_1 | s->clear_color_2 | s->clear_color_3 | s->clear_color_4) {
810 pandecode_prop("clear_color_1 = 0x%" PRIx32, s->clear_color_1);
811 pandecode_prop("clear_color_2 = 0x%" PRIx32, s->clear_color_2);
812 pandecode_prop("clear_color_3 = 0x%" PRIx32, s->clear_color_3);
813 pandecode_prop("clear_color_4 = 0x%" PRIx32, s->clear_color_4);
814 }
815
816 if (s->clear_depth_1 != 0 || s->clear_depth_2 != 0 || s->clear_depth_3 != 0 || s->clear_depth_4 != 0) {
817 pandecode_prop("clear_depth_1 = %f", s->clear_depth_1);
818 pandecode_prop("clear_depth_2 = %f", s->clear_depth_2);
819 pandecode_prop("clear_depth_3 = %f", s->clear_depth_3);
820 pandecode_prop("clear_depth_4 = %f", s->clear_depth_4);
821 }
822
823 if (s->clear_stencil) {
824 pandecode_prop("clear_stencil = 0x%x", s->clear_stencil);
825 }
826
827 const struct midgard_tiler_descriptor t = s->tiler;
828
829 bool has_hierarchy = !(gpu_id == 0x0720 || gpu_id == 0x0820 || gpu_id == 0x0830);
830 pandecode_midgard_tiler_descriptor(&t, s->width + 1, s->height + 1, is_fragment, has_hierarchy);
831
832 pandecode_indent--;
833 pandecode_log("};\n");
834
835 pandecode_prop("zero2 = 0x%" PRIx32, s->zero2);
836 pandecode_prop("zero4 = 0x%" PRIx32, s->zero4);
837 pandecode_prop("zero5 = 0x%" PRIx32, s->zero5);
838
839 pandecode_log_cont(".zero3 = {");
840
841 for (int i = 0; i < sizeof(s->zero3) / sizeof(s->zero3[0]); ++i)
842 pandecode_log_cont("%X, ", s->zero3[i]);
843
844 pandecode_log_cont("},\n");
845
846 pandecode_log_cont(".zero6 = {");
847
848 for (int i = 0; i < sizeof(s->zero6) / sizeof(s->zero6[0]); ++i)
849 pandecode_log_cont("%X, ", s->zero6[i]);
850
851 pandecode_log_cont("},\n");
852
853 return info;
854 }
855
856 static void
857 pandecode_compute_fbd(uint64_t gpu_va, int job_no)
858 {
859 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
860 const struct mali_shared_memory *PANDECODE_PTR_VAR(s, mem, (mali_ptr) gpu_va);
861
862 pandecode_log("struct mali_shared_memory shared_%"PRIx64"_%d = {\n", gpu_va, job_no);
863 pandecode_indent++;
864 pandecode_shared_memory(s, true);
865 pandecode_indent--;
866 pandecode_log("},\n");
867 }
868
869 /* Extracts the number of components associated with a Mali format */
870
871 static unsigned
872 pandecode_format_component_count(enum mali_format fmt)
873 {
874 /* Mask out the format class */
875 unsigned top = fmt & 0b11100000;
876
877 switch (top) {
878 case MALI_FORMAT_SNORM:
879 case MALI_FORMAT_UINT:
880 case MALI_FORMAT_UNORM:
881 case MALI_FORMAT_SINT:
882 return ((fmt >> 3) & 3) + 1;
883 default:
884 /* TODO: Validate */
885 return 4;
886 }
887 }
888
889 /* Extracts a mask of accessed components from a 12-bit Mali swizzle */
890
891 static unsigned
892 pandecode_access_mask_from_channel_swizzle(unsigned swizzle)
893 {
894 unsigned mask = 0;
895 assert(MALI_CHANNEL_RED == 0);
896
897 for (unsigned c = 0; c < 4; ++c) {
898 enum mali_channel chan = (swizzle >> (3*c)) & 0x7;
899
900 if (chan <= MALI_CHANNEL_ALPHA)
901 mask |= (1 << chan);
902 }
903
904 return mask;
905 }
906
907 /* Validates that a (format, swizzle) pair is valid, in the sense that the
908 * swizzle doesn't access any components that are undefined in the format.
909 * Returns whether the swizzle is trivial (doesn't do any swizzling) and can be
910 * omitted */
911
912 static bool
913 pandecode_validate_format_swizzle(enum mali_format fmt, unsigned swizzle)
914 {
915 unsigned nr_comp = pandecode_format_component_count(fmt);
916 unsigned access_mask = pandecode_access_mask_from_channel_swizzle(swizzle);
917 unsigned valid_mask = (1 << nr_comp) - 1;
918 unsigned invalid_mask = ~valid_mask;
919
920 if (access_mask & invalid_mask) {
921 pandecode_msg("XXX: invalid components accessed\n");
922 return false;
923 }
924
925 /* Check for the default non-swizzling swizzle so we can suppress
926 * useless printing for the defaults */
927
928 unsigned default_swizzles[4] = {
929 MALI_CHANNEL_RED | (MALI_CHANNEL_ZERO << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
930 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_ZERO << 6) | (MALI_CHANNEL_ONE << 9),
931 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ONE << 9),
932 MALI_CHANNEL_RED | (MALI_CHANNEL_GREEN << 3) | (MALI_CHANNEL_BLUE << 6) | (MALI_CHANNEL_ALPHA << 9)
933 };
934
935 return (swizzle == default_swizzles[nr_comp - 1]);
936 }
937
938 /* Maps MALI_RGBA32F to rgba32f, etc */
939
940 static void
941 pandecode_format_short(enum mali_format fmt, bool srgb)
942 {
943 /* We want a type-like format, so cut off the initial MALI_ */
944 char *format = pandecode_format(fmt);
945 format += strlen("MALI_");
946
947 unsigned len = strlen(format);
948 char *lower_format = calloc(1, len + 1);
949
950 for (unsigned i = 0; i < len; ++i)
951 lower_format[i] = tolower(format[i]);
952
953 /* Sanity check sRGB flag is applied to RGB, per the name */
954 if (srgb && lower_format[0] != 'r')
955 pandecode_msg("XXX: sRGB applied to non-colour format\n");
956
957 /* Just prefix with an s, so you get formats like srgba8_unorm */
958 if (srgb)
959 pandecode_log_cont("s");
960
961 pandecode_log_cont("%s", lower_format);
962 free(lower_format);
963 }
964
965 static void
966 pandecode_swizzle(unsigned swizzle, enum mali_format format)
967 {
968 /* First, do some validation */
969 bool trivial_swizzle = pandecode_validate_format_swizzle(
970 format, swizzle);
971
972 if (trivial_swizzle)
973 return;
974
975 /* Next, print the swizzle */
976 pandecode_log_cont(".");
977
978 static const char components[] = "rgba01";
979
980 for (unsigned c = 0; c < 4; ++c) {
981 enum mali_channel chan = (swizzle >> (3 * c)) & 0x7;
982
983 if (chan >= MALI_CHANNEL_RESERVED_0) {
984 pandecode_log("XXX: invalid swizzle channel %d\n", chan);
985 continue;
986 }
987 pandecode_log_cont("%c", components[chan]);
988 }
989 }
990
991 static void
992 pandecode_rt_format(struct mali_rt_format format)
993 {
994 pandecode_log(".format = {\n");
995 pandecode_indent++;
996
997 pandecode_prop("unk1 = 0x%" PRIx32, format.unk1);
998 pandecode_prop("unk2 = 0x%" PRIx32, format.unk2);
999 pandecode_prop("unk3 = 0x%" PRIx32, format.unk3);
1000
1001 pandecode_prop("block = %s", pandecode_block_format(format.block));
1002
1003 /* TODO: Map formats so we can check swizzles and print nicely */
1004 pandecode_log("swizzle");
1005 pandecode_swizzle(format.swizzle, MALI_RGBA8_UNORM);
1006 pandecode_log_cont(",\n");
1007
1008 pandecode_prop("nr_channels = MALI_POSITIVE(%d)",
1009 (format.nr_channels + 1));
1010
1011 pandecode_log(".flags = ");
1012 pandecode_log_decoded_flags(mfbd_fmt_flag_info, format.flags);
1013 pandecode_log_cont(",\n");
1014
1015 /* In theory, the no_preload bit can be cleared to enable MFBD preload,
1016 * which is a faster hardware-based alternative to the wallpaper method
1017 * to preserve framebuffer contents across frames. In practice, MFBD
1018 * preload is buggy on Midgard, and so this is a chicken bit. If this
1019 * bit isn't set, most likely something broke unrelated to preload */
1020
1021 if (!format.no_preload) {
1022 pandecode_msg("XXX: buggy MFBD preload enabled - chicken bit should be clear\n");
1023 pandecode_prop("no_preload = 0x%" PRIx32, format.no_preload);
1024 }
1025
1026 if (format.zero)
1027 pandecode_prop("zero = 0x%" PRIx32, format.zero);
1028
1029 pandecode_indent--;
1030 pandecode_log("},\n");
1031 }
1032
1033 static void
1034 pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct mali_framebuffer *fb)
1035 {
1036 pandecode_log("struct mali_render_target rts_list_%"PRIx64"_%d[] = {\n", gpu_va, job_no);
1037 pandecode_indent++;
1038
1039 for (int i = 0; i < (fb->rt_count_1 + 1); i++) {
1040 mali_ptr rt_va = gpu_va + i * sizeof(struct mali_render_target);
1041 struct pandecode_mapped_memory *mem =
1042 pandecode_find_mapped_gpu_mem_containing(rt_va);
1043 const struct mali_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
1044
1045 pandecode_log("{\n");
1046 pandecode_indent++;
1047
1048 pandecode_rt_format(rt->format);
1049
1050 if (rt->format.block == MALI_BLOCK_AFBC) {
1051 pandecode_log(".afbc = {\n");
1052 pandecode_indent++;
1053
1054 char *a = pointer_as_memory_reference(rt->afbc.metadata);
1055 pandecode_prop("metadata = %s", a);
1056 free(a);
1057
1058 pandecode_prop("stride = %d", rt->afbc.stride);
1059 pandecode_prop("unk = 0x%" PRIx32, rt->afbc.unk);
1060
1061 pandecode_indent--;
1062 pandecode_log("},\n");
1063 } else if (rt->afbc.metadata || rt->afbc.stride || rt->afbc.unk) {
1064 pandecode_msg("XXX: AFBC disabled but AFBC field set (0x%lX, 0x%x, 0x%x)\n",
1065 rt->afbc.metadata,
1066 rt->afbc.stride,
1067 rt->afbc.unk);
1068 }
1069
1070 MEMORY_PROP(rt, framebuffer);
1071 pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
1072
1073 if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
1074 pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
1075 pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
1076 pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
1077 pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
1078 }
1079
1080 if (rt->zero1 || rt->zero2 || rt->zero3) {
1081 pandecode_msg("XXX: render target zeros tripped\n");
1082 pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
1083 pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
1084 pandecode_prop("zero3 = 0x%" PRIx32, rt->zero3);
1085 }
1086
1087 pandecode_indent--;
1088 pandecode_log("},\n");
1089 }
1090
1091 pandecode_indent--;
1092 pandecode_log("};\n");
1093 }
1094
1095 static struct pandecode_fbd
1096 pandecode_mfbd_bfr(uint64_t gpu_va, int job_no, bool is_fragment, bool is_compute, bool is_bifrost)
1097 {
1098 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1099 const struct mali_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
1100
1101 struct pandecode_fbd info;
1102
1103 if (is_bifrost && fb->msaa.sample_locations) {
1104 /* The blob stores all possible sample locations in a single buffer
1105 * allocated on startup, and just switches the pointer when switching
1106 * MSAA state. For now, we just put the data into the cmdstream, but we
1107 * should do something like what the blob does with a real driver.
1108 *
1109 * There seem to be 32 slots for sample locations, followed by another
1110 * 16. The second 16 is just the center location followed by 15 zeros
1111 * in all the cases I've identified (maybe shader vs. depth/color
1112 * samples?).
1113 */
1114
1115 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(fb->msaa.sample_locations);
1116
1117 const u16 *PANDECODE_PTR_VAR(samples, smem, fb->msaa.sample_locations);
1118
1119 pandecode_log("uint16_t sample_locations_%d[] = {\n", job_no);
1120 pandecode_indent++;
1121
1122 for (int i = 0; i < 32 + 16; i++) {
1123 pandecode_log("%d, %d,\n", samples[2 * i], samples[2 * i + 1]);
1124 }
1125
1126 pandecode_indent--;
1127 pandecode_log("};\n");
1128 }
1129
1130 pandecode_log("struct mali_framebuffer framebuffer_%"PRIx64"_%d = {\n", gpu_va, job_no);
1131 pandecode_indent++;
1132
1133 if (is_bifrost) {
1134 pandecode_log(".msaa = {\n");
1135 pandecode_indent++;
1136
1137 if (fb->msaa.sample_locations)
1138 pandecode_prop("sample_locations = sample_locations_%d", job_no);
1139 else
1140 pandecode_msg("XXX: sample_locations missing\n");
1141
1142 if (fb->msaa.zero1 || fb->msaa.zero2 || fb->msaa.zero4) {
1143 pandecode_msg("XXX: multisampling zero tripped\n");
1144 pandecode_prop("zero1 = %" PRIx64, fb->msaa.zero1);
1145 pandecode_prop("zero2 = %" PRIx64, fb->msaa.zero2);
1146 pandecode_prop("zero4 = %" PRIx64, fb->msaa.zero4);
1147 }
1148
1149 pandecode_indent--;
1150 pandecode_log("},\n");
1151 } else {
1152 pandecode_log(".shared_memory = {\n");
1153 pandecode_indent++;
1154 pandecode_shared_memory(&fb->shared_memory, is_compute);
1155 pandecode_indent--;
1156 pandecode_log("},\n");
1157 }
1158
1159 info.width = fb->width1 + 1;
1160 info.height = fb->height1 + 1;
1161 info.rt_count = fb->rt_count_1 + 1;
1162
1163 pandecode_prop("width1 = MALI_POSITIVE(%d)", fb->width1 + 1);
1164 pandecode_prop("height1 = MALI_POSITIVE(%d)", fb->height1 + 1);
1165 pandecode_prop("width2 = MALI_POSITIVE(%d)", fb->width2 + 1);
1166 pandecode_prop("height2 = MALI_POSITIVE(%d)", fb->height2 + 1);
1167
1168 pandecode_prop("unk1 = 0x%x", fb->unk1);
1169 pandecode_prop("unk2 = 0x%x", fb->unk2);
1170 pandecode_prop("rt_count_1 = MALI_POSITIVE(%d)", fb->rt_count_1 + 1);
1171 pandecode_prop("rt_count_2 = %d", fb->rt_count_2);
1172
1173 pandecode_log(".mfbd_flags = ");
1174 pandecode_log_decoded_flags(mfbd_flag_info, fb->mfbd_flags);
1175 pandecode_log_cont(",\n");
1176
1177 if (fb->clear_stencil)
1178 pandecode_prop("clear_stencil = 0x%x", fb->clear_stencil);
1179
1180 if (fb->clear_depth)
1181 pandecode_prop("clear_depth = %f", fb->clear_depth);
1182
1183 const struct midgard_tiler_descriptor t = fb->tiler;
1184 if (!is_compute)
1185 if (is_bifrost)
1186 pandecode_bifrost_tiler_descriptor(&t);
1187 else
1188 pandecode_midgard_tiler_descriptor(&t, fb->width1 + 1, fb->height1 + 1, is_fragment, true);
1189 else
1190 pandecode_msg("XXX: skipping compute MFBD, fixme\n");
1191
1192 if (fb->zero3 || fb->zero4) {
1193 pandecode_msg("XXX: framebuffer zeros tripped\n");
1194 pandecode_prop("zero3 = 0x%" PRIx32, fb->zero3);
1195 pandecode_prop("zero4 = 0x%" PRIx32, fb->zero4);
1196 }
1197
1198 pandecode_indent--;
1199 pandecode_log("};\n");
1200
1201 gpu_va += sizeof(struct mali_framebuffer);
1202
1203 info.has_extra = (fb->mfbd_flags & MALI_MFBD_EXTRA) && is_fragment;
1204
1205 if (info.has_extra) {
1206 mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
1207 const struct mali_framebuffer_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
1208
1209 pandecode_log("struct mali_framebuffer_extra fb_extra_%"PRIx64"_%d = {\n", gpu_va, job_no);
1210 pandecode_indent++;
1211
1212 MEMORY_PROP(fbx, checksum);
1213
1214 if (fbx->checksum_stride)
1215 pandecode_prop("checksum_stride = %d", fbx->checksum_stride);
1216
1217 pandecode_log(".flags_hi = ");
1218 pandecode_log_decoded_flags(mfbd_extra_flag_hi_info, fbx->flags_lo);
1219 pandecode_log_cont(",\n");
1220
1221 pandecode_log(".flags_lo = ");
1222 pandecode_log_decoded_flags(mfbd_extra_flag_lo_info, fbx->flags_lo);
1223 pandecode_log_cont(",\n");
1224
1225 pandecode_prop("zs_block = %s", pandecode_block_format(fbx->zs_block));
1226
1227 if (fbx->zs_block == MALI_BLOCK_AFBC) {
1228 pandecode_log(".ds_afbc = {\n");
1229 pandecode_indent++;
1230
1231 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil_afbc_metadata);
1232 pandecode_prop("depth_stencil_afbc_stride = %d",
1233 fbx->ds_afbc.depth_stencil_afbc_stride);
1234 MEMORY_PROP_DIR(fbx->ds_afbc, depth_stencil);
1235
1236 if (fbx->ds_afbc.zero1 || fbx->ds_afbc.padding) {
1237 pandecode_msg("XXX: Depth/stencil AFBC zeros tripped\n");
1238 pandecode_prop("zero1 = 0x%" PRIx32,
1239 fbx->ds_afbc.zero1);
1240 pandecode_prop("padding = 0x%" PRIx64,
1241 fbx->ds_afbc.padding);
1242 }
1243
1244 pandecode_indent--;
1245 pandecode_log("},\n");
1246 } else {
1247 pandecode_log(".ds_linear = {\n");
1248 pandecode_indent++;
1249
1250 if (fbx->ds_linear.depth) {
1251 MEMORY_PROP_DIR(fbx->ds_linear, depth);
1252 pandecode_prop("depth_stride = %d",
1253 fbx->ds_linear.depth_stride);
1254 } else if (fbx->ds_linear.depth_stride) {
1255 pandecode_msg("XXX: depth stride zero tripped %d\n", fbx->ds_linear.depth_stride);
1256 }
1257
1258 if (fbx->ds_linear.stencil) {
1259 MEMORY_PROP_DIR(fbx->ds_linear, stencil);
1260 pandecode_prop("stencil_stride = %d",
1261 fbx->ds_linear.stencil_stride);
1262 } else if (fbx->ds_linear.stencil_stride) {
1263 pandecode_msg("XXX: stencil stride zero tripped %d\n", fbx->ds_linear.stencil_stride);
1264 }
1265
1266 if (fbx->ds_linear.depth_stride_zero ||
1267 fbx->ds_linear.stencil_stride_zero ||
1268 fbx->ds_linear.zero1 || fbx->ds_linear.zero2) {
1269 pandecode_msg("XXX: Depth/stencil zeros tripped\n");
1270 pandecode_prop("depth_stride_zero = 0x%x",
1271 fbx->ds_linear.depth_stride_zero);
1272 pandecode_prop("stencil_stride_zero = 0x%x",
1273 fbx->ds_linear.stencil_stride_zero);
1274 pandecode_prop("zero1 = 0x%" PRIx32,
1275 fbx->ds_linear.zero1);
1276 pandecode_prop("zero2 = 0x%" PRIx32,
1277 fbx->ds_linear.zero2);
1278 }
1279
1280 pandecode_indent--;
1281 pandecode_log("},\n");
1282 }
1283
1284 if (fbx->zero3 || fbx->zero4) {
1285 pandecode_msg("XXX: fb_extra zeros tripped\n");
1286 pandecode_prop("zero3 = 0x%" PRIx64, fbx->zero3);
1287 pandecode_prop("zero4 = 0x%" PRIx64, fbx->zero4);
1288 }
1289
1290 pandecode_indent--;
1291 pandecode_log("};\n");
1292
1293 gpu_va += sizeof(struct mali_framebuffer_extra);
1294 }
1295
1296 if (is_fragment)
1297 pandecode_render_target(gpu_va, job_no, fb);
1298
1299 return info;
1300 }
1301
1302 /* Just add a comment decoding the shift/odd fields forming the padded vertices
1303 * count */
1304
1305 static void
1306 pandecode_padded_vertices(unsigned shift, unsigned k)
1307 {
1308 unsigned odd = 2*k + 1;
1309 unsigned pot = 1 << shift;
1310 pandecode_msg("padded_num_vertices = %d\n", odd * pot);
1311 }
1312
1313 /* Given a magic divisor, recover what we were trying to divide by.
1314 *
1315 * Let m represent the magic divisor. By definition, m is an element on Z, whre
1316 * 0 <= m < 2^N, for N bits in m.
1317 *
1318 * Let q represent the number we would like to divide by.
1319 *
1320 * By definition of a magic divisor for N-bit unsigned integers (a number you
1321 * multiply by to magically get division), m is a number such that:
1322 *
1323 * (m * x) & (2^N - 1) = floor(x/q).
1324 * for all x on Z where 0 <= x < 2^N
1325 *
1326 * Ignore the case where any of the above values equals zero; it is irrelevant
1327 * for our purposes (instanced arrays).
1328 *
1329 * Choose x = q. Then:
1330 *
1331 * (m * x) & (2^N - 1) = floor(x/q).
1332 * (m * q) & (2^N - 1) = floor(q/q).
1333 *
1334 * floor(q/q) = floor(1) = 1, therefore:
1335 *
1336 * (m * q) & (2^N - 1) = 1
1337 *
1338 * Recall the identity that the bitwise AND of one less than a power-of-two
1339 * equals the modulo with that power of two, i.e. for all x:
1340 *
1341 * x & (2^N - 1) = x % N
1342 *
1343 * Therefore:
1344 *
1345 * mq % (2^N) = 1
1346 *
1347 * By definition, a modular multiplicative inverse of a number m is the number
1348 * q such that with respect to a modulos M:
1349 *
1350 * mq % M = 1
1351 *
1352 * Therefore, q is the modular multiplicative inverse of m with modulus 2^N.
1353 *
1354 */
1355
1356 static void
1357 pandecode_magic_divisor(uint32_t magic, unsigned shift, unsigned orig_divisor, unsigned extra)
1358 {
1359 #if 0
1360 /* Compute the modular inverse of `magic` with respect to 2^(32 -
1361 * shift) the most lame way possible... just repeatedly add.
1362 * Asymptoptically slow but nobody cares in practice, unless you have
1363 * massive numbers of vertices or high divisors. */
1364
1365 unsigned inverse = 0;
1366
1367 /* Magic implicitly has the highest bit set */
1368 magic |= (1 << 31);
1369
1370 /* Depending on rounding direction */
1371 if (extra)
1372 magic++;
1373
1374 for (;;) {
1375 uint32_t product = magic * inverse;
1376
1377 if (shift) {
1378 product >>= shift;
1379 }
1380
1381 if (product == 1)
1382 break;
1383
1384 ++inverse;
1385 }
1386
1387 pandecode_msg("dividing by %d (maybe off by two)\n", inverse);
1388
1389 /* Recall we're supposed to divide by (gl_level_divisor *
1390 * padded_num_vertices) */
1391
1392 unsigned padded_num_vertices = inverse / orig_divisor;
1393
1394 pandecode_msg("padded_num_vertices = %d\n", padded_num_vertices);
1395 #endif
1396 }
1397
1398 static void
1399 pandecode_attributes(const struct pandecode_mapped_memory *mem,
1400 mali_ptr addr, int job_no, char *suffix,
1401 int count, bool varying, enum mali_job_type job_type)
1402 {
1403 char *prefix = varying ? "varying" : "attribute";
1404 assert(addr);
1405
1406 if (!count) {
1407 pandecode_msg("warn: No %s records\n", prefix);
1408 return;
1409 }
1410
1411 union mali_attr *attr = pandecode_fetch_gpu_mem(mem, addr, sizeof(union mali_attr) * count);
1412
1413 for (int i = 0; i < count; ++i) {
1414 /* First, check for special records */
1415 if (attr[i].elements < MALI_RECORD_SPECIAL) {
1416 if (attr[i].size)
1417 pandecode_msg("XXX: tripped size=%d\n", attr[i].size);
1418
1419 if (attr[i].stride) {
1420 /* gl_InstanceID passes a magic divisor in the
1421 * stride field to divide by the padded vertex
1422 * count. No other records should do so, so
1423 * stride should otherwise be zero. Note that
1424 * stride in the usual attribute sense doesn't
1425 * apply to special records. */
1426
1427 bool has_divisor = attr[i].elements == MALI_ATTR_INSTANCEID;
1428
1429 pandecode_log_cont("/* %smagic divisor = %X */ ",
1430 has_divisor ? "" : "XXX: ", attr[i].stride);
1431 }
1432
1433 if (attr[i].shift || attr[i].extra_flags) {
1434 /* Attributes use these fields for
1435 * instancing/padding/etc type issues, but
1436 * varyings don't */
1437
1438 pandecode_log_cont("/* %sshift=%d, extra=%d */ ",
1439 varying ? "XXX: " : "",
1440 attr[i].shift, attr[i].extra_flags);
1441 }
1442
1443 /* Print the special record name */
1444 bool attribute = false;
1445 pandecode_log("%s_%d = %s;\n", prefix, i, pandecode_special_record(attr[i].elements, &attribute));
1446
1447 /* Sanity check */
1448 if (attribute == varying)
1449 pandecode_msg("XXX: mismatched special record\n");
1450
1451 continue;
1452 }
1453
1454 enum mali_attr_mode mode = attr[i].elements & 7;
1455
1456 if (mode == MALI_ATTR_UNUSED)
1457 pandecode_msg("XXX: unused attribute record\n");
1458
1459 /* For non-linear records, we need to print the type of record */
1460 if (mode != MALI_ATTR_LINEAR)
1461 pandecode_log_cont("%s ", pandecode_attr_mode_short(mode));
1462
1463 /* Print the name to link with attr_meta */
1464 pandecode_log_cont("%s_%d", prefix, i);
1465
1466 /* Print the stride and size */
1467 pandecode_log_cont("<%u>[%u]", attr[i].stride, attr[i].size);
1468
1469 /* TODO: Sanity check the quotient itself. It must be equal to
1470 * (or be greater than, if the driver added padding) the padded
1471 * vertex count. */
1472
1473 /* Finally, print the pointer */
1474 mali_ptr raw_elements = attr[i].elements & ~7;
1475 char *a = pointer_as_memory_reference(raw_elements);
1476 pandecode_log_cont(" = (%s);\n", a);
1477 free(a);
1478
1479 /* Check the pointer */
1480 pandecode_validate_buffer(raw_elements, attr[i].size);
1481
1482 /* shift/extra_flags exist only for instanced */
1483 if (attr[i].shift | attr[i].extra_flags) {
1484 /* These are set to random values by the blob for
1485 * varyings, most likely a symptom of uninitialized
1486 * memory where the hardware masked the bug. As such we
1487 * put this at a warning, not an error. */
1488
1489 if (mode == MALI_ATTR_LINEAR)
1490 pandecode_msg("warn: instancing fields set for linear\n");
1491
1492 pandecode_prop("shift = %d", attr[i].shift);
1493 pandecode_prop("extra_flags = %d", attr[i].extra_flags);
1494 }
1495
1496 /* Decode further where possible */
1497
1498 if (mode == MALI_ATTR_MODULO) {
1499 pandecode_padded_vertices(
1500 attr[i].shift,
1501 attr[i].extra_flags);
1502 }
1503
1504 if (mode == MALI_ATTR_NPOT_DIVIDE) {
1505 i++;
1506 pandecode_log("{\n");
1507 pandecode_indent++;
1508 pandecode_prop("unk = 0x%x", attr[i].unk);
1509 pandecode_prop("magic_divisor = 0x%08x", attr[i].magic_divisor);
1510 if (attr[i].zero != 0)
1511 pandecode_prop("XXX: zero tripped (0x%x)\n", attr[i].zero);
1512 pandecode_prop("divisor = %d", attr[i].divisor);
1513 pandecode_magic_divisor(attr[i].magic_divisor, attr[i - 1].shift, attr[i].divisor, attr[i - 1].extra_flags);
1514 pandecode_indent--;
1515 pandecode_log("}, \n");
1516 }
1517
1518 }
1519
1520 pandecode_log("\n");
1521 }
1522
1523 static mali_ptr
1524 pandecode_shader_address(const char *name, mali_ptr ptr)
1525 {
1526 /* TODO: Decode flags */
1527 mali_ptr shader_ptr = ptr & ~15;
1528
1529 char *a = pointer_as_memory_reference(shader_ptr);
1530 pandecode_prop("%s = (%s) | %d", name, a, (int) (ptr & 15));
1531 free(a);
1532
1533 return shader_ptr;
1534 }
1535
1536 static void
1537 pandecode_stencil(const char *name, const struct mali_stencil_test *stencil)
1538 {
1539 unsigned any_nonzero =
1540 stencil->ref | stencil->mask | stencil->func |
1541 stencil->sfail | stencil->dpfail | stencil->dppass;
1542
1543 if (any_nonzero == 0)
1544 return;
1545
1546 const char *func = pandecode_func(stencil->func);
1547 const char *sfail = pandecode_stencil_op(stencil->sfail);
1548 const char *dpfail = pandecode_stencil_op(stencil->dpfail);
1549 const char *dppass = pandecode_stencil_op(stencil->dppass);
1550
1551 if (stencil->zero)
1552 pandecode_msg("XXX: stencil zero tripped: %X\n", stencil->zero);
1553
1554 pandecode_log(".stencil_%s = {\n", name);
1555 pandecode_indent++;
1556 pandecode_prop("ref = %d", stencil->ref);
1557 pandecode_prop("mask = 0x%02X", stencil->mask);
1558 pandecode_prop("func = %s", func);
1559 pandecode_prop("sfail = %s", sfail);
1560 pandecode_prop("dpfail = %s", dpfail);
1561 pandecode_prop("dppass = %s", dppass);
1562 pandecode_indent--;
1563 pandecode_log("},\n");
1564 }
1565
1566 static void
1567 pandecode_blend_equation(const struct mali_blend_equation *blend)
1568 {
1569 if (blend->zero1)
1570 pandecode_msg("XXX: blend zero tripped: %X\n", blend->zero1);
1571
1572 pandecode_log(".equation = {\n");
1573 pandecode_indent++;
1574
1575 pandecode_prop("rgb_mode = 0x%X", blend->rgb_mode);
1576 pandecode_prop("alpha_mode = 0x%X", blend->alpha_mode);
1577
1578 pandecode_log(".color_mask = ");
1579 pandecode_log_decoded_flags(mask_flag_info, blend->color_mask);
1580 pandecode_log_cont(",\n");
1581
1582 pandecode_indent--;
1583 pandecode_log("},\n");
1584 }
1585
1586 /* Decodes a Bifrost blend constant. See the notes in bifrost_blend_rt */
1587
1588 static unsigned
1589 decode_bifrost_constant(u16 constant)
1590 {
1591 float lo = (float) (constant & 0xFF);
1592 float hi = (float) (constant >> 8);
1593
1594 return (hi / 255.0) + (lo / 65535.0);
1595 }
1596
1597 static mali_ptr
1598 pandecode_bifrost_blend(void *descs, int job_no, int rt_no)
1599 {
1600 struct bifrost_blend_rt *b =
1601 ((struct bifrost_blend_rt *) descs) + rt_no;
1602
1603 pandecode_log("struct bifrost_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1604 pandecode_indent++;
1605
1606 pandecode_prop("flags = 0x%" PRIx16, b->flags);
1607 pandecode_prop("constant = 0x%" PRIx8 " /* %f */",
1608 b->constant, decode_bifrost_constant(b->constant));
1609
1610 /* TODO figure out blend shader enable bit */
1611 pandecode_blend_equation(&b->equation);
1612 pandecode_prop("unk2 = 0x%" PRIx16, b->unk2);
1613 pandecode_prop("index = 0x%" PRIx16, b->index);
1614 pandecode_prop("shader = 0x%" PRIx32, b->shader);
1615
1616 pandecode_indent--;
1617 pandecode_log("},\n");
1618
1619 return 0;
1620 }
1621
1622 static mali_ptr
1623 pandecode_midgard_blend(union midgard_blend *blend, bool is_shader)
1624 {
1625 /* constant/equation is in a union */
1626 if (!blend->shader)
1627 return 0;
1628
1629 pandecode_log(".blend = {\n");
1630 pandecode_indent++;
1631
1632 if (is_shader) {
1633 pandecode_shader_address("shader", blend->shader);
1634 } else {
1635 pandecode_blend_equation(&blend->equation);
1636 pandecode_prop("constant = %f", blend->constant);
1637 }
1638
1639 pandecode_indent--;
1640 pandecode_log("},\n");
1641
1642 /* Return blend shader to disassemble if present */
1643 return is_shader ? (blend->shader & ~0xF) : 0;
1644 }
1645
1646 static mali_ptr
1647 pandecode_midgard_blend_mrt(void *descs, int job_no, int rt_no)
1648 {
1649 struct midgard_blend_rt *b =
1650 ((struct midgard_blend_rt *) descs) + rt_no;
1651
1652 /* Flags determine presence of blend shader */
1653 bool is_shader = (b->flags & 0xF) >= 0x2;
1654
1655 pandecode_log("struct midgard_blend_rt blend_rt_%d_%d = {\n", job_no, rt_no);
1656 pandecode_indent++;
1657
1658 pandecode_prop("flags = 0x%" PRIx64, b->flags);
1659
1660 union midgard_blend blend = b->blend;
1661 mali_ptr shader = pandecode_midgard_blend(&blend, is_shader);
1662
1663 pandecode_indent--;
1664 pandecode_log("};\n");
1665
1666 return shader;
1667 }
1668
1669 /* Attributes and varyings have descriptor records, which contain information
1670 * about their format and ordering with the attribute/varying buffers. We'll
1671 * want to validate that the combinations specified are self-consistent.
1672 */
1673
1674 static int
1675 pandecode_attribute_meta(int job_no, int count, const struct mali_vertex_tiler_postfix *v, bool varying, char *suffix)
1676 {
1677 char base[128];
1678 char *prefix = varying ? "varying" : "attribute";
1679 unsigned max_index = 0;
1680 snprintf(base, sizeof(base), "%s_meta", prefix);
1681
1682 struct mali_attr_meta *attr_meta;
1683 mali_ptr p = varying ? v->varying_meta : v->attribute_meta;
1684
1685 struct pandecode_mapped_memory *attr_mem = pandecode_find_mapped_gpu_mem_containing(p);
1686
1687 for (int i = 0; i < count; ++i, p += sizeof(struct mali_attr_meta)) {
1688 attr_meta = pandecode_fetch_gpu_mem(attr_mem, p,
1689 sizeof(*attr_mem));
1690
1691 /* If the record is discard, it should be zero for everything else */
1692
1693 if (attr_meta->format == MALI_VARYING_DISCARD) {
1694 uint64_t zero =
1695 attr_meta->index |
1696 attr_meta->unknown1 |
1697 attr_meta->unknown3 |
1698 attr_meta->src_offset;
1699
1700 if (zero)
1701 pandecode_msg("XXX: expected empty record for varying discard\n");
1702
1703 /* We want to look for a literal 0000 swizzle -- this
1704 * is not encoded with all zeroes, however */
1705
1706 enum mali_channel z = MALI_CHANNEL_ZERO;
1707 unsigned zero_swizzle = z | (z << 3) | (z << 6) | (z << 9);
1708 bool good_swizzle = attr_meta->swizzle == zero_swizzle;
1709
1710 if (!good_swizzle)
1711 pandecode_msg("XXX: expected zero swizzle for discard\n");
1712
1713 if (!varying)
1714 pandecode_msg("XXX: cannot discard attribute\n");
1715
1716 /* If we're all good, omit the record */
1717 if (!zero && varying && good_swizzle) {
1718 pandecode_log("/* discarded varying */\n");
1719 continue;
1720 }
1721 }
1722
1723 if (attr_meta->index > max_index)
1724 max_index = attr_meta->index;
1725
1726 if (attr_meta->unknown1 != 0x2) {
1727 pandecode_msg("XXX: expected unknown1 = 0x2\n");
1728 pandecode_prop("unknown1 = 0x%" PRIx64, (u64) attr_meta->unknown1);
1729 }
1730
1731 if (attr_meta->unknown3) {
1732 pandecode_msg("XXX: unexpected unknown3 set\n");
1733 pandecode_prop("unknown3 = 0x%" PRIx64, (u64) attr_meta->unknown3);
1734 }
1735
1736 pandecode_format_short(attr_meta->format, false);
1737 pandecode_log_cont(" %s_%u", prefix, attr_meta->index);
1738
1739 if (attr_meta->src_offset)
1740 pandecode_log_cont("[%u]", attr_meta->src_offset);
1741
1742 pandecode_swizzle(attr_meta->swizzle, attr_meta->format);
1743
1744 pandecode_log_cont(";\n");
1745 }
1746
1747 pandecode_log("\n");
1748
1749 return count ? (max_index + 1) : 0;
1750 }
1751
1752 /* return bits [lo, hi) of word */
1753 static u32
1754 bits(u32 word, u32 lo, u32 hi)
1755 {
1756 if (hi - lo >= 32)
1757 return word; // avoid undefined behavior with the shift
1758
1759 return (word >> lo) & ((1 << (hi - lo)) - 1);
1760 }
1761
1762 static void
1763 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
1764 {
1765 pandecode_log(".prefix = {\n");
1766 pandecode_indent++;
1767
1768 /* Decode invocation_count. See the comment before the definition of
1769 * invocation_count for an explanation.
1770 */
1771
1772 unsigned size_y_shift = bits(p->invocation_shifts, 0, 5);
1773 unsigned size_z_shift = bits(p->invocation_shifts, 5, 10);
1774 unsigned workgroups_x_shift = bits(p->invocation_shifts, 10, 16);
1775 unsigned workgroups_y_shift = bits(p->invocation_shifts, 16, 22);
1776 unsigned workgroups_z_shift = bits(p->invocation_shifts, 22, 28);
1777 unsigned workgroups_x_shift_2 = bits(p->invocation_shifts, 28, 32);
1778
1779 unsigned size_x = bits(p->invocation_count, 0, size_y_shift) + 1;
1780 unsigned size_y = bits(p->invocation_count, size_y_shift, size_z_shift) + 1;
1781 unsigned size_z = bits(p->invocation_count, size_z_shift, workgroups_x_shift) + 1;
1782
1783 unsigned groups_x = bits(p->invocation_count, workgroups_x_shift, workgroups_y_shift) + 1;
1784 unsigned groups_y = bits(p->invocation_count, workgroups_y_shift, workgroups_z_shift) + 1;
1785 unsigned groups_z = bits(p->invocation_count, workgroups_z_shift, 32) + 1;
1786
1787 /* Even though we have this decoded, we want to ensure that the
1788 * representation is "unique" so we don't lose anything by printing only
1789 * the final result. More specifically, we need to check that we were
1790 * passed something in canonical form, since the definition per the
1791 * hardware is inherently not unique. How? Well, take the resulting
1792 * decode and pack it ourselves! If it is bit exact with what we
1793 * decoded, we're good to go. */
1794
1795 struct mali_vertex_tiler_prefix ref;
1796 panfrost_pack_work_groups_compute(&ref, groups_x, groups_y, groups_z, size_x, size_y, size_z, graphics);
1797
1798 bool canonical =
1799 (p->invocation_count == ref.invocation_count) &&
1800 (p->invocation_shifts == ref.invocation_shifts);
1801
1802 if (!canonical) {
1803 pandecode_msg("XXX: non-canonical workgroups packing\n");
1804 pandecode_msg("expected: %X, %X",
1805 ref.invocation_count,
1806 ref.invocation_shifts);
1807
1808 pandecode_prop("invocation_count = 0x%" PRIx32, p->invocation_count);
1809 pandecode_prop("size_y_shift = %d", size_y_shift);
1810 pandecode_prop("size_z_shift = %d", size_z_shift);
1811 pandecode_prop("workgroups_x_shift = %d", workgroups_x_shift);
1812 pandecode_prop("workgroups_y_shift = %d", workgroups_y_shift);
1813 pandecode_prop("workgroups_z_shift = %d", workgroups_z_shift);
1814 pandecode_prop("workgroups_x_shift_2 = %d", workgroups_x_shift_2);
1815 }
1816
1817 /* Regardless, print the decode */
1818 pandecode_msg("size (%d, %d, %d), count (%d, %d, %d)\n",
1819 size_x, size_y, size_z,
1820 groups_x, groups_y, groups_z);
1821
1822 /* TODO: Decode */
1823 if (p->unknown_draw)
1824 pandecode_prop("unknown_draw = 0x%" PRIx32, p->unknown_draw);
1825
1826 pandecode_prop("workgroups_x_shift_3 = 0x%" PRIx32, p->workgroups_x_shift_3);
1827
1828 if (p->draw_mode != MALI_DRAW_NONE)
1829 pandecode_prop("draw_mode = %s", pandecode_draw_mode(p->draw_mode));
1830
1831 /* Index count only exists for tiler jobs anyway */
1832
1833 if (p->index_count)
1834 pandecode_prop("index_count = MALI_POSITIVE(%" PRId32 ")", p->index_count + 1);
1835
1836
1837 unsigned index_raw_size = (p->unknown_draw & MALI_DRAW_INDEXED_SIZE);
1838 index_raw_size >>= MALI_DRAW_INDEXED_SHIFT;
1839
1840 /* Validate an index buffer is present if we need one. TODO: verify
1841 * relationship between invocation_count and index_count */
1842
1843 if (p->indices) {
1844 unsigned count = p->index_count;
1845
1846 /* Grab the size */
1847 unsigned size = (index_raw_size == 0x3) ? 4 : index_raw_size;
1848
1849 /* Ensure we got a size, and if so, validate the index buffer
1850 * is large enough to hold a full set of indices of the given
1851 * size */
1852
1853 if (!index_raw_size)
1854 pandecode_msg("XXX: index size missing\n");
1855 else
1856 pandecode_validate_buffer(p->indices, count * size);
1857 } else if (index_raw_size)
1858 pandecode_msg("XXX: unexpected index size %u\n", index_raw_size);
1859
1860 if (p->offset_bias_correction)
1861 pandecode_prop("offset_bias_correction = %d", p->offset_bias_correction);
1862
1863 /* TODO: Figure out what this is. It's not zero */
1864 pandecode_prop("zero1 = 0x%" PRIx32, p->zero1);
1865
1866 pandecode_indent--;
1867 pandecode_log("},\n");
1868 }
1869
1870 static void
1871 pandecode_uniform_buffers(mali_ptr pubufs, int ubufs_count, int job_no)
1872 {
1873 struct pandecode_mapped_memory *umem = pandecode_find_mapped_gpu_mem_containing(pubufs);
1874 uint64_t *PANDECODE_PTR_VAR(ubufs, umem, pubufs);
1875
1876 for (int i = 0; i < ubufs_count; i++) {
1877 unsigned size = (ubufs[i] & ((1 << 10) - 1)) * 16;
1878 mali_ptr addr = (ubufs[i] >> 10) << 2;
1879
1880 pandecode_validate_buffer(addr, size);
1881
1882 char *ptr = pointer_as_memory_reference(addr);
1883 pandecode_log("ubuf_%d[%u] = %s;\n", i, size, ptr);
1884 free(ptr);
1885 }
1886
1887 pandecode_log("\n");
1888 }
1889
1890 static void
1891 pandecode_uniforms(mali_ptr uniforms, unsigned uniform_count)
1892 {
1893 pandecode_validate_buffer(uniforms, uniform_count * 16);
1894
1895 char *ptr = pointer_as_memory_reference(uniforms);
1896 pandecode_log("vec4 uniforms[%u] = %s;\n", uniform_count, ptr);
1897 free(ptr);
1898 }
1899
1900 static const char *
1901 shader_type_for_job(unsigned type)
1902 {
1903 switch (type) {
1904 case JOB_TYPE_VERTEX: return "VERTEX";
1905 case JOB_TYPE_TILER: return "FRAGMENT";
1906 case JOB_TYPE_COMPUTE: return "COMPUTE";
1907 default:
1908 return "UNKNOWN";
1909 }
1910 }
1911
1912 static unsigned shader_id = 0;
1913
1914 static struct midgard_disasm_stats
1915 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
1916 bool is_bifrost, unsigned gpu_id)
1917 {
1918 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
1919 uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
1920
1921 /* Compute maximum possible size */
1922 size_t sz = mem->length - (shader_ptr - mem->gpu_va);
1923
1924 /* Print some boilerplate to clearly denote the assembly (which doesn't
1925 * obey indentation rules), and actually do the disassembly! */
1926
1927 pandecode_log_cont("\n\n");
1928
1929 struct midgard_disasm_stats stats;
1930
1931 if (is_bifrost) {
1932 disassemble_bifrost(pandecode_dump_stream, code, sz, true);
1933
1934 /* TODO: Extend stats to Bifrost */
1935 stats.texture_count = -128;
1936 stats.sampler_count = -128;
1937 stats.attribute_count = -128;
1938 stats.varying_count = -128;
1939 stats.uniform_count = -128;
1940 stats.uniform_buffer_count = -128;
1941 stats.work_count = -128;
1942
1943 stats.instruction_count = 0;
1944 stats.bundle_count = 0;
1945 stats.quadword_count = 0;
1946 stats.helper_invocations = false;
1947 } else {
1948 stats = disassemble_midgard(pandecode_dump_stream,
1949 code, sz, gpu_id,
1950 type == JOB_TYPE_TILER ?
1951 MESA_SHADER_FRAGMENT : MESA_SHADER_VERTEX);
1952 }
1953
1954 /* Print shader-db stats. Skip COMPUTE jobs since they are used for
1955 * driver-internal purposes with the blob and interfere */
1956
1957 bool should_shaderdb = type != JOB_TYPE_COMPUTE;
1958
1959 if (should_shaderdb) {
1960 unsigned nr_threads =
1961 (stats.work_count <= 4) ? 4 :
1962 (stats.work_count <= 8) ? 2 :
1963 1;
1964
1965 pandecode_log_cont("shader%d - MESA_SHADER_%s shader: "
1966 "%u inst, %u bundles, %u quadwords, "
1967 "%u registers, %u threads, 0 loops, 0:0 spills:fills\n\n\n",
1968 shader_id++,
1969 shader_type_for_job(type),
1970 stats.instruction_count, stats.bundle_count, stats.quadword_count,
1971 stats.work_count, nr_threads);
1972 }
1973
1974
1975 return stats;
1976 }
1977
1978 static void
1979 pandecode_texture(mali_ptr u,
1980 struct pandecode_mapped_memory *tmem,
1981 unsigned job_no, unsigned tex)
1982 {
1983 struct mali_texture_descriptor *PANDECODE_PTR_VAR(t, tmem, u);
1984
1985 pandecode_log("struct mali_texture_descriptor texture_descriptor_%"PRIx64"_%d_%d = {\n", u, job_no, tex);
1986 pandecode_indent++;
1987
1988 struct mali_texture_format f = t->format;
1989
1990 /* See the definiton of enum mali_texture_type */
1991
1992 bool is_cube = f.type == MALI_TEX_CUBE;
1993 unsigned dimension = is_cube ? 2 : f.type;
1994
1995 pandecode_make_indent();
1996
1997 /* TODO: Are there others? */
1998 bool is_zs = f.format == MALI_Z32_UNORM;
1999
2000 /* Recall Z/S switched the meaning of linear/tiled .. */
2001 if (is_zs && f.layout == MALI_TEXTURE_LINEAR)
2002 pandecode_msg("XXX: depth/stencil cannot be tiled\n");
2003
2004 /* Print the layout. Default is linear; a modifier can denote AFBC or
2005 * u-interleaved/tiled modes */
2006
2007 if (f.layout == MALI_TEXTURE_AFBC)
2008 pandecode_log_cont("afbc");
2009 else if (f.layout == MALI_TEXTURE_TILED)
2010 pandecode_log_cont("tiled");
2011 else if (f.layout == MALI_TEXTURE_LINEAR)
2012 pandecode_log_cont("linear");
2013 else
2014 pandecode_msg("XXX: invalid texture layout 0x%X\n", f.layout);
2015
2016 pandecode_swizzle(t->swizzle, f.format);
2017 pandecode_log_cont(" ");
2018
2019 /* Distinguish cube/2D with modifier */
2020
2021 if (is_cube)
2022 pandecode_log_cont("cube ");
2023
2024 pandecode_format_short(f.format, f.srgb);
2025 pandecode_swizzle(f.swizzle, f.format);
2026
2027 /* All four width/height/depth/array_size dimensions are present
2028 * regardless of the type of texture, but it is an error to have
2029 * non-zero dimensions for unused dimensions. Verify this. array_size
2030 * can always be set, as can width. */
2031
2032 if (t->height && dimension < 2)
2033 pandecode_msg("XXX: nonzero height for <2D texture\n");
2034
2035 if (t->depth && dimension < 3)
2036 pandecode_msg("XXX: nonzero depth for <2D texture\n");
2037
2038 /* Print only the dimensions that are actually there */
2039
2040 pandecode_log_cont(": %d", t->width + 1);
2041
2042 if (dimension >= 2)
2043 pandecode_log_cont("x%u", t->height + 1);
2044
2045 if (dimension >= 3)
2046 pandecode_log_cont("x%u", t->depth + 1);
2047
2048 if (t->array_size)
2049 pandecode_log_cont("[%u]", t->array_size + 1);
2050
2051 if (t->levels)
2052 pandecode_log_cont(" mip %u", t->levels);
2053
2054 pandecode_log_cont("\n");
2055
2056 if (f.unknown1 | f.zero) {
2057 pandecode_msg("XXX: texture format zero tripped\n");
2058 pandecode_prop("unknown1 = %" PRId32, f.unknown1);
2059 pandecode_prop("zero = %" PRId32, f.zero);
2060 }
2061
2062 if (!f.unknown2) {
2063 pandecode_msg("XXX: expected unknown texture bit set\n");
2064 pandecode_prop("unknown2 = %" PRId32, f.unknown2);
2065 }
2066
2067 if (t->swizzle_zero) {
2068 pandecode_msg("XXX: swizzle zero tripped\n");
2069 pandecode_prop("swizzle_zero = %d", t->swizzle_zero);
2070 }
2071
2072 if (t->unknown3 | t->unknown3A | t->unknown5 | t->unknown6 | t->unknown7) {
2073 pandecode_msg("XXX: texture zero tripped\n");
2074 pandecode_prop("unknown3 = %" PRId16, t->unknown3);
2075 pandecode_prop("unknown3A = %" PRId8, t->unknown3A);
2076 pandecode_prop("unknown5 = 0x%" PRIx32, t->unknown5);
2077 pandecode_prop("unknown6 = 0x%" PRIx32, t->unknown6);
2078 pandecode_prop("unknown7 = 0x%" PRIx32, t->unknown7);
2079 }
2080
2081 pandecode_log(".payload = {\n");
2082 pandecode_indent++;
2083
2084 /* A bunch of bitmap pointers follow.
2085 * We work out the correct number,
2086 * based on the mipmap/cubemap
2087 * properties, but dump extra
2088 * possibilities to futureproof */
2089
2090 int bitmap_count = t->levels + 1;
2091
2092 /* Miptree for each face */
2093 if (f.type == MALI_TEX_CUBE)
2094 bitmap_count *= 6;
2095 else if (f.type == MALI_TEX_3D && f.layout == MALI_TEXTURE_LINEAR)
2096 bitmap_count *= (t->depth + 1);
2097
2098 /* Array of textures */
2099 bitmap_count *= (t->array_size + 1);
2100
2101 /* Stride for each element */
2102 if (f.manual_stride)
2103 bitmap_count *= 2;
2104
2105 mali_ptr *pointers_and_strides = pandecode_fetch_gpu_mem(tmem,
2106 u + sizeof(*t), sizeof(mali_ptr) * bitmap_count);
2107 for (int i = 0; i < bitmap_count; ++i) {
2108 /* How we dump depends if this is a stride or a pointer */
2109
2110 if (f.manual_stride && (i & 1)) {
2111 /* signed 32-bit snuck in as a 64-bit pointer */
2112 uint64_t stride_set = pointers_and_strides[i];
2113 uint32_t clamped_stride = stride_set;
2114 int32_t stride = clamped_stride;
2115 assert(stride_set == clamped_stride);
2116 pandecode_log("(mali_ptr) %d /* stride */, \n", stride);
2117 } else {
2118 char *a = pointer_as_memory_reference(pointers_and_strides[i]);
2119 pandecode_log("%s, \n", a);
2120 free(a);
2121 }
2122 }
2123
2124 pandecode_indent--;
2125 pandecode_log("},\n");
2126
2127 pandecode_indent--;
2128 pandecode_log("};\n");
2129 }
2130
2131 /* For shader properties like texture_count, we have a claimed property in the shader_meta, and the actual Truth from static analysis (this may just be an upper limit). We validate accordingly */
2132
2133 static void
2134 pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy)
2135 {
2136 /* Nothing to do */
2137 if (claim == truth)
2138 return;
2139
2140 if (fuzzy && (truth < 0))
2141 pandecode_msg("XXX: fuzzy %s, claimed %d, expected %d\n", name, claim, truth);
2142
2143 if ((truth >= 0) && !fuzzy) {
2144 pandecode_msg("%s: expected %s = %d, claimed %u\n",
2145 (truth < claim) ? "warn" : "XXX",
2146 name, truth, claim);
2147 } else if ((claim > -truth) && !fuzzy) {
2148 pandecode_msg("XXX: expected %s <= %u, claimed %u\n",
2149 name, -truth, claim);
2150 } else if (fuzzy && (claim < truth))
2151 pandecode_msg("XXX: expected %s >= %u, claimed %u\n",
2152 name, truth, claim);
2153
2154 pandecode_log(".%s = %" PRId16, name, claim);
2155
2156 if (fuzzy)
2157 pandecode_log_cont(" /* %u used */", truth);
2158
2159 pandecode_log_cont(",\n");
2160 }
2161
2162 static void
2163 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
2164 bool is_bifrost, unsigned gpu_id)
2165 {
2166 struct midgard_disasm_stats stats =
2167 pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
2168
2169 bool has_texture = (stats.texture_count > 0);
2170 bool has_sampler = (stats.sampler_count > 0);
2171 bool has_attribute = (stats.attribute_count > 0);
2172 bool has_varying = (stats.varying_count > 0);
2173 bool has_uniform = (stats.uniform_count > 0);
2174 bool has_ubo = (stats.uniform_buffer_count > 0);
2175
2176 if (has_texture || has_sampler)
2177 pandecode_msg("XXX: blend shader accessing textures\n");
2178
2179 if (has_attribute || has_varying)
2180 pandecode_msg("XXX: blend shader accessing interstage\n");
2181
2182 if (has_uniform || has_ubo)
2183 pandecode_msg("XXX: blend shader accessing uniforms\n");
2184 }
2185
2186 static void
2187 pandecode_vertex_tiler_postfix_pre(
2188 const struct mali_vertex_tiler_postfix *p,
2189 int job_no, enum mali_job_type job_type,
2190 char *suffix, bool is_bifrost, unsigned gpu_id)
2191 {
2192 struct pandecode_mapped_memory *attr_mem;
2193
2194 /* On Bifrost, since the tiler heap (for tiler jobs) and the scratchpad
2195 * are the only things actually needed from the FBD, vertex/tiler jobs
2196 * no longer reference the FBD -- instead, this field points to some
2197 * info about the scratchpad.
2198 */
2199
2200 struct pandecode_fbd fbd_info = {
2201 /* Default for Bifrost */
2202 .rt_count = 1
2203 };
2204
2205 if (is_bifrost) {
2206 pandecode_log_cont("\t/* %X %/\n", p->shared_memory & 1);
2207 pandecode_compute_fbd(p->shared_memory & ~1, job_no);
2208 } else if (p->shared_memory & MALI_MFBD)
2209 fbd_info = pandecode_mfbd_bfr((u64) ((uintptr_t) p->shared_memory) & FBD_MASK, job_no, false, job_type == JOB_TYPE_COMPUTE, false);
2210 else if (job_type == JOB_TYPE_COMPUTE)
2211 pandecode_compute_fbd((u64) (uintptr_t) p->shared_memory, job_no);
2212 else
2213 fbd_info = pandecode_sfbd((u64) (uintptr_t) p->shared_memory, job_no, false, gpu_id);
2214
2215 int varying_count = 0, attribute_count = 0, uniform_count = 0, uniform_buffer_count = 0;
2216 int texture_count = 0, sampler_count = 0;
2217
2218 if (p->shader) {
2219 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->shader);
2220 struct mali_shader_meta *PANDECODE_PTR_VAR(s, smem, p->shader);
2221
2222 /* Disassemble ahead-of-time to get stats. Initialize with
2223 * stats for the missing-shader case so we get validation
2224 * there, too */
2225
2226 struct midgard_disasm_stats info = {
2227 .texture_count = 0,
2228 .sampler_count = 0,
2229 .attribute_count = 0,
2230 .varying_count = 0,
2231 .work_count = 1,
2232
2233 .uniform_count = -128,
2234 .uniform_buffer_count = 0
2235 };
2236
2237 if (s->shader & ~0xF)
2238 info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
2239
2240 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
2241 pandecode_indent++;
2242
2243 /* Save for dumps */
2244 attribute_count = s->attribute_count;
2245 varying_count = s->varying_count;
2246 texture_count = s->texture_count;
2247 sampler_count = s->sampler_count;
2248
2249 if (is_bifrost) {
2250 uniform_count = s->bifrost2.uniform_count;
2251 uniform_buffer_count = s->bifrost1.uniform_buffer_count;
2252 } else {
2253 uniform_count = s->midgard1.uniform_count;
2254 uniform_buffer_count = s->midgard1.uniform_buffer_count;
2255 }
2256
2257 pandecode_shader_address("shader", s->shader);
2258
2259 pandecode_shader_prop("texture_count", s->texture_count, info.texture_count, false);
2260 pandecode_shader_prop("sampler_count", s->sampler_count, info.sampler_count, false);
2261 pandecode_shader_prop("attribute_count", s->attribute_count, info.attribute_count, false);
2262 pandecode_shader_prop("varying_count", s->varying_count, info.varying_count, false);
2263 pandecode_shader_prop("uniform_buffer_count",
2264 uniform_buffer_count,
2265 info.uniform_buffer_count, true);
2266
2267 if (!is_bifrost) {
2268 pandecode_shader_prop("uniform_count",
2269 uniform_count,
2270 info.uniform_count, false);
2271
2272 pandecode_shader_prop("work_count",
2273 s->midgard1.work_count, info.work_count, false);
2274 }
2275
2276 if (is_bifrost) {
2277 pandecode_prop("bifrost1.unk1 = 0x%" PRIx32, s->bifrost1.unk1);
2278 } else {
2279 bool helpers = s->midgard1.flags_lo & MALI_HELPER_INVOCATIONS;
2280 s->midgard1.flags_lo &= ~MALI_HELPER_INVOCATIONS;
2281
2282 if (helpers != info.helper_invocations) {
2283 pandecode_msg("XXX: expected helpers %u but got %u\n",
2284 info.helper_invocations, helpers);
2285 }
2286
2287 pandecode_log(".midgard1.flags_lo = ");
2288 pandecode_log_decoded_flags(shader_midgard1_flag_lo_info, s->midgard1.flags_lo);
2289 pandecode_log_cont(",\n");
2290
2291 pandecode_log(".midgard1.flags_hi = ");
2292 pandecode_log_decoded_flags(shader_midgard1_flag_hi_info, s->midgard1.flags_hi);
2293 pandecode_log_cont(",\n");
2294 }
2295
2296 if (s->depth_units || s->depth_factor) {
2297 pandecode_prop("depth_factor = %f", s->depth_factor);
2298 pandecode_prop("depth_units = %f", s->depth_units);
2299 }
2300
2301 if (s->alpha_coverage) {
2302 bool invert_alpha_coverage = s->alpha_coverage & 0xFFF0;
2303 uint16_t inverted_coverage = invert_alpha_coverage ? ~s->alpha_coverage : s->alpha_coverage;
2304
2305 pandecode_prop("alpha_coverage = %sMALI_ALPHA_COVERAGE(%f)",
2306 invert_alpha_coverage ? "~" : "",
2307 MALI_GET_ALPHA_COVERAGE(inverted_coverage));
2308 }
2309
2310 if (s->unknown2_3 || s->unknown2_4) {
2311 pandecode_log(".unknown2_3 = ");
2312
2313 int unknown2_3 = s->unknown2_3;
2314 int unknown2_4 = s->unknown2_4;
2315
2316 /* We're not quite sure what these flags mean without the depth test, if anything */
2317
2318 if (unknown2_3 & (MALI_DEPTH_WRITEMASK | MALI_DEPTH_FUNC_MASK)) {
2319 const char *func = pandecode_func(MALI_GET_DEPTH_FUNC(unknown2_3));
2320 unknown2_3 &= ~MALI_DEPTH_FUNC_MASK;
2321
2322 pandecode_log_cont("MALI_DEPTH_FUNC(%s) | ", func);
2323 }
2324
2325 pandecode_log_decoded_flags(u3_flag_info, unknown2_3);
2326 pandecode_log_cont(",\n");
2327
2328 pandecode_log(".unknown2_4 = ");
2329 pandecode_log_decoded_flags(u4_flag_info, unknown2_4);
2330 pandecode_log_cont(",\n");
2331 }
2332
2333 if (s->stencil_mask_front || s->stencil_mask_back) {
2334 pandecode_prop("stencil_mask_front = 0x%02X", s->stencil_mask_front);
2335 pandecode_prop("stencil_mask_back = 0x%02X", s->stencil_mask_back);
2336 }
2337
2338 pandecode_stencil("front", &s->stencil_front);
2339 pandecode_stencil("back", &s->stencil_back);
2340
2341 if (is_bifrost) {
2342 pandecode_log(".bifrost2 = {\n");
2343 pandecode_indent++;
2344
2345 pandecode_prop("unk3 = 0x%" PRIx32, s->bifrost2.unk3);
2346 pandecode_prop("preload_regs = 0x%" PRIx32, s->bifrost2.preload_regs);
2347 pandecode_prop("uniform_count = %" PRId32, s->bifrost2.uniform_count);
2348 pandecode_prop("unk4 = 0x%" PRIx32, s->bifrost2.unk4);
2349
2350 pandecode_indent--;
2351 pandecode_log("},\n");
2352 } else if (s->midgard2.unknown2_7) {
2353 pandecode_log(".midgard2 = {\n");
2354 pandecode_indent++;
2355
2356 pandecode_prop("unknown2_7 = 0x%" PRIx32, s->midgard2.unknown2_7);
2357 pandecode_indent--;
2358 pandecode_log("},\n");
2359 }
2360
2361 if (s->padding) {
2362 pandecode_msg("XXX: shader padding tripped\n");
2363 pandecode_prop("padding = 0x%" PRIx32, s->padding);
2364 }
2365
2366 if (!is_bifrost) {
2367 /* TODO: Blend shaders routing/disasm */
2368 union midgard_blend blend = s->blend;
2369 mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
2370 if (shader & ~0xF)
2371 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2372 }
2373
2374 pandecode_indent--;
2375 pandecode_log("};\n");
2376
2377 /* MRT blend fields are used whenever MFBD is used, with
2378 * per-RT descriptors */
2379
2380 if (job_type == JOB_TYPE_TILER && p->shared_memory & MALI_MFBD) {
2381 void* blend_base = (void *) (s + 1);
2382
2383 for (unsigned i = 0; i < fbd_info.rt_count; i++) {
2384 mali_ptr shader = 0;
2385
2386 if (is_bifrost)
2387 shader = pandecode_bifrost_blend(blend_base, job_no, i);
2388 else
2389 shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
2390
2391 if (shader & ~0xF)
2392 pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
2393
2394 }
2395 }
2396 } else
2397 pandecode_msg("XXX: missing shader descriptor\n");
2398
2399 if (p->viewport) {
2400 struct pandecode_mapped_memory *fmem = pandecode_find_mapped_gpu_mem_containing(p->viewport);
2401 struct mali_viewport *PANDECODE_PTR_VAR(f, fmem, p->viewport);
2402
2403 pandecode_log("struct mali_viewport viewport_%"PRIx64"_%d%s = {\n", p->viewport, job_no, suffix);
2404 pandecode_indent++;
2405
2406 pandecode_prop("clip_minx = %f", f->clip_minx);
2407 pandecode_prop("clip_miny = %f", f->clip_miny);
2408 pandecode_prop("clip_minz = %f", f->clip_minz);
2409 pandecode_prop("clip_maxx = %f", f->clip_maxx);
2410 pandecode_prop("clip_maxy = %f", f->clip_maxy);
2411 pandecode_prop("clip_maxz = %f", f->clip_maxz);
2412
2413 /* Only the higher coordinates are MALI_POSITIVE scaled */
2414
2415 pandecode_prop("viewport0 = { %d, %d }",
2416 f->viewport0[0], f->viewport0[1]);
2417
2418 pandecode_prop("viewport1 = { MALI_POSITIVE(%d), MALI_POSITIVE(%d) }",
2419 f->viewport1[0] + 1, f->viewport1[1] + 1);
2420
2421 pandecode_indent--;
2422 pandecode_log("};\n");
2423 }
2424
2425 unsigned max_attr_index = 0;
2426
2427 if (p->attribute_meta)
2428 max_attr_index = pandecode_attribute_meta(job_no, attribute_count, p, false, suffix);
2429
2430 if (p->attributes) {
2431 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->attributes);
2432 pandecode_attributes(attr_mem, p->attributes, job_no, suffix, max_attr_index, false, job_type);
2433 }
2434
2435 /* Varyings are encoded like attributes but not actually sent; we just
2436 * pass a zero buffer with the right stride/size set, (or whatever)
2437 * since the GPU will write to it itself */
2438
2439 if (p->varying_meta) {
2440 varying_count = pandecode_attribute_meta(job_no, varying_count, p, true, suffix);
2441 }
2442
2443 if (p->varyings) {
2444 attr_mem = pandecode_find_mapped_gpu_mem_containing(p->varyings);
2445
2446 /* Number of descriptors depends on whether there are
2447 * non-internal varyings */
2448
2449 pandecode_attributes(attr_mem, p->varyings, job_no, suffix, varying_count, true, job_type);
2450 }
2451
2452 if (p->uniform_buffers) {
2453 if (uniform_buffer_count)
2454 pandecode_uniform_buffers(p->uniform_buffers, uniform_buffer_count, job_no);
2455 else
2456 pandecode_msg("warn: UBOs specified but not referenced\n");
2457 } else if (uniform_buffer_count)
2458 pandecode_msg("XXX: UBOs referenced but not specified\n");
2459
2460 /* We don't want to actually dump uniforms, but we do need to validate
2461 * that the counts we were given are sane */
2462
2463 if (p->uniforms) {
2464 if (uniform_count)
2465 pandecode_uniforms(p->uniforms, uniform_count);
2466 else
2467 pandecode_msg("warn: Uniforms specified but not referenced\n");
2468 } else if (uniform_count)
2469 pandecode_msg("XXX: Uniforms referenced but not specified\n");
2470
2471 if (p->texture_trampoline) {
2472 struct pandecode_mapped_memory *mmem = pandecode_find_mapped_gpu_mem_containing(p->texture_trampoline);
2473
2474 if (mmem) {
2475 mali_ptr *PANDECODE_PTR_VAR(u, mmem, p->texture_trampoline);
2476
2477 pandecode_log("uint64_t texture_trampoline_%"PRIx64"_%d[] = {\n", p->texture_trampoline, job_no);
2478 pandecode_indent++;
2479
2480 for (int tex = 0; tex < texture_count; ++tex) {
2481 mali_ptr *PANDECODE_PTR_VAR(u, mmem, p->texture_trampoline + tex * sizeof(mali_ptr));
2482 char *a = pointer_as_memory_reference(*u);
2483 pandecode_log("%s,\n", a);
2484 free(a);
2485 }
2486
2487 pandecode_indent--;
2488 pandecode_log("};\n");
2489
2490 /* Now, finally, descend down into the texture descriptor */
2491 for (unsigned tex = 0; tex < texture_count; ++tex) {
2492 mali_ptr *PANDECODE_PTR_VAR(u, mmem, p->texture_trampoline + tex * sizeof(mali_ptr));
2493 struct pandecode_mapped_memory *tmem = pandecode_find_mapped_gpu_mem_containing(*u);
2494 if (tmem)
2495 pandecode_texture(*u, tmem, job_no, tex);
2496 }
2497 }
2498 }
2499
2500 if (p->sampler_descriptor) {
2501 struct pandecode_mapped_memory *smem = pandecode_find_mapped_gpu_mem_containing(p->sampler_descriptor);
2502
2503 if (smem) {
2504 struct mali_sampler_descriptor *s;
2505
2506 mali_ptr d = p->sampler_descriptor;
2507
2508 for (int i = 0; i < sampler_count; ++i) {
2509 s = pandecode_fetch_gpu_mem(smem, d + sizeof(*s) * i, sizeof(*s));
2510
2511 pandecode_log("struct mali_sampler_descriptor sampler_descriptor_%"PRIx64"_%d_%d = {\n", d + sizeof(*s) * i, job_no, i);
2512 pandecode_indent++;
2513
2514 pandecode_log(".filter_mode = ");
2515 pandecode_log_decoded_flags(sampler_flag_info, s->filter_mode);
2516 pandecode_log_cont(",\n");
2517
2518 pandecode_prop("min_lod = FIXED_16(%f)", DECODE_FIXED_16(s->min_lod));
2519 pandecode_prop("max_lod = FIXED_16(%f)", DECODE_FIXED_16(s->max_lod));
2520
2521 if (s->lod_bias)
2522 pandecode_prop("lod_bias = FIXED_16(%f)", DECODE_FIXED_16(s->lod_bias));
2523
2524 pandecode_prop("wrap_s = %s", pandecode_wrap_mode(s->wrap_s));
2525 pandecode_prop("wrap_t = %s", pandecode_wrap_mode(s->wrap_t));
2526 pandecode_prop("wrap_r = %s", pandecode_wrap_mode(s->wrap_r));
2527
2528 pandecode_prop("compare_func = %s", pandecode_func(s->compare_func));
2529
2530 if (s->zero || s->zero2) {
2531 pandecode_msg("XXX: sampler zero tripped\n");
2532 pandecode_prop("zero = 0x%X, 0x%X\n", s->zero, s->zero2);
2533 }
2534
2535 pandecode_prop("seamless_cube_map = %d", s->seamless_cube_map);
2536
2537 pandecode_prop("border_color = { %f, %f, %f, %f }",
2538 s->border_color[0],
2539 s->border_color[1],
2540 s->border_color[2],
2541 s->border_color[3]);
2542
2543 pandecode_indent--;
2544 pandecode_log("};\n");
2545 }
2546 }
2547 }
2548 }
2549
2550 static void
2551 pandecode_gl_enables(uint32_t gl_enables, int job_type)
2552 {
2553 pandecode_log(".gl_enables = ");
2554
2555 pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
2556
2557 pandecode_log_cont(",\n");
2558 }
2559
2560 static void
2561 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
2562 {
2563 if (p->shader & 0xF)
2564 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
2565
2566 pandecode_log(".postfix = {\n");
2567 pandecode_indent++;
2568
2569 pandecode_gl_enables(p->gl_enables, JOB_TYPE_TILER);
2570 pandecode_prop("instance_shift = 0x%x", p->instance_shift);
2571 pandecode_prop("instance_odd = 0x%x", p->instance_odd);
2572
2573 if (p->zero4) {
2574 pandecode_msg("XXX: vertex only zero tripped");
2575 pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
2576 }
2577
2578 pandecode_prop("offset_start = 0x%x", p->offset_start);
2579
2580 if (p->zero5) {
2581 pandecode_msg("XXX: vertex only zero tripped");
2582 pandecode_prop("zero5 = 0x%" PRIx32, p->zero5);
2583 }
2584
2585 MEMORY_PROP(p, position_varying);
2586 MEMORY_PROP(p, occlusion_counter);
2587
2588 pandecode_indent--;
2589 pandecode_log("},\n");
2590 }
2591
2592 static void
2593 pandecode_tiler_heap_meta(mali_ptr gpu_va, int job_no)
2594 {
2595
2596 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2597
2598 if (gpu_va == 0) {
2599 pandecode_msg("XXX: bifrost_tiler_heap_meta is NULL!!\n");
2600 return;
2601 }
2602
2603 const struct bifrost_tiler_heap_meta *PANDECODE_PTR_VAR(h, mem, gpu_va);
2604
2605 pandecode_log("struct mali_tiler_heap_meta tiler_heap_meta_%d = {\n", job_no);
2606 pandecode_indent++;
2607
2608 if (h->zero) {
2609 pandecode_msg("XXX: tiler heap zero tripped\n");
2610 pandecode_prop("zero = 0x%x", h->zero);
2611 }
2612
2613 for (int i = 0; i < 12; i++) {
2614 if (h->zeros[i] != 0) {
2615 pandecode_msg("XXX: tiler heap zero %d tripped, value %x\n",
2616 i, h->zeros[i]);
2617 }
2618 }
2619
2620 pandecode_prop("heap_size = 0x%x", h->heap_size);
2621 MEMORY_PROP(h, tiler_heap_start);
2622 MEMORY_PROP(h, tiler_heap_free);
2623
2624 /* this might point to the beginning of another buffer, when it's
2625 * really the end of the tiler heap buffer, so we have to be careful
2626 * here. but for zero length, we need the same pointer.
2627 */
2628
2629 if (h->tiler_heap_end == h->tiler_heap_start) {
2630 MEMORY_PROP(h, tiler_heap_start);
2631 } else {
2632 char *a = pointer_as_memory_reference(h->tiler_heap_end - 1);
2633 pandecode_prop("tiler_heap_end = %s + 1", a);
2634 free(a);
2635 }
2636
2637 pandecode_indent--;
2638 pandecode_log("};\n");
2639 }
2640
2641 static void
2642 pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
2643 {
2644 struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
2645 const struct bifrost_tiler_meta *PANDECODE_PTR_VAR(t, mem, gpu_va);
2646
2647 pandecode_tiler_heap_meta(t->tiler_heap_meta, job_no);
2648
2649 pandecode_log("struct bifrost_tiler_meta tiler_meta_%d = {\n", job_no);
2650 pandecode_indent++;
2651
2652 if (t->zero0 || t->zero1) {
2653 pandecode_msg("XXX: tiler meta zero tripped\n");
2654 pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
2655 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
2656 }
2657
2658 pandecode_prop("hierarchy_mask = 0x%" PRIx16, t->hierarchy_mask);
2659 pandecode_prop("flags = 0x%" PRIx16, t->flags);
2660
2661 pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
2662 pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
2663
2664 for (int i = 0; i < 12; i++) {
2665 if (t->zeros[i] != 0) {
2666 pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",
2667 i, t->zeros[i]);
2668 }
2669 }
2670
2671 pandecode_indent--;
2672 pandecode_log("};\n");
2673 }
2674
2675 static void
2676 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
2677 {
2678 if (u.pointer == 0x0)
2679 return;
2680
2681 pandecode_log(".primitive_size = {\n");
2682 pandecode_indent++;
2683
2684 if (constant) {
2685 pandecode_prop("constant = %f", u.constant);
2686 } else {
2687 MEMORY_PROP((&u), pointer);
2688 }
2689
2690 pandecode_indent--;
2691 pandecode_log("},\n");
2692 }
2693
2694 static void
2695 pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
2696 {
2697 pandecode_log_cont("{\n");
2698 pandecode_indent++;
2699
2700 /* TODO: gl_PointSize on Bifrost */
2701 pandecode_primitive_size(t->primitive_size, true);
2702
2703 if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
2704 || t->zero6) {
2705 pandecode_msg("XXX: tiler only zero tripped\n");
2706 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
2707 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
2708 pandecode_prop("zero3 = 0x%" PRIx64, t->zero3);
2709 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
2710 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
2711 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
2712 }
2713
2714 pandecode_indent--;
2715 pandecode_log("},\n");
2716 }
2717
2718 static int
2719 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
2720 const struct pandecode_mapped_memory *mem,
2721 mali_ptr payload, int job_no, unsigned gpu_id)
2722 {
2723 struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
2724
2725 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
2726
2727 pandecode_log("struct bifrost_payload_vertex payload_%"PRIx64"_%d = {\n", payload, job_no);
2728 pandecode_indent++;
2729
2730 pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
2731 pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
2732
2733 pandecode_indent--;
2734 pandecode_log("};\n");
2735
2736 return sizeof(*v);
2737 }
2738
2739 static int
2740 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
2741 const struct pandecode_mapped_memory *mem,
2742 mali_ptr payload, int job_no, unsigned gpu_id)
2743 {
2744 struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
2745
2746 pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
2747 pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
2748
2749 pandecode_log("struct bifrost_payload_tiler payload_%d = {\n", job_no);
2750 pandecode_indent++;
2751
2752 pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
2753
2754 pandecode_log(".tiler = ");
2755 pandecode_tiler_only_bfr(&t->tiler, job_no);
2756
2757 pandecode_vertex_tiler_postfix(&t->postfix, job_no, true);
2758
2759 pandecode_indent--;
2760 pandecode_log("};\n");
2761
2762 return sizeof(*t);
2763 }
2764
2765 static int
2766 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
2767 const struct pandecode_mapped_memory *mem,
2768 mali_ptr payload, int job_no, unsigned gpu_id)
2769 {
2770 struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
2771 bool is_graphics = (h->job_type == JOB_TYPE_VERTEX) || (h->job_type == JOB_TYPE_TILER);
2772
2773 pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
2774
2775 pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
2776 pandecode_indent++;
2777
2778 pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
2779 pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
2780
2781 bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
2782 pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
2783
2784 pandecode_indent--;
2785 pandecode_log("};\n");
2786
2787 return sizeof(*v);
2788 }
2789
2790 static int
2791 pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
2792 mali_ptr payload, int job_no,
2793 bool is_bifrost, unsigned gpu_id)
2794 {
2795 const struct mali_payload_fragment *PANDECODE_PTR_VAR(s, mem, payload);
2796
2797 bool is_mfbd = s->framebuffer & MALI_MFBD;
2798
2799 if (!is_mfbd && is_bifrost)
2800 pandecode_msg("XXX: Bifrost fragment must use MFBD\n");
2801
2802 struct pandecode_fbd info;
2803
2804 if (is_mfbd)
2805 info = pandecode_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true, false, is_bifrost);
2806 else
2807 info = pandecode_sfbd(s->framebuffer & FBD_MASK, job_no, true, gpu_id);
2808
2809 /* Compute the tag for the tagged pointer. This contains the type of
2810 * FBD (MFBD/SFBD), and in the case of an MFBD, information about which
2811 * additional structures follow the MFBD header (an extra payload or
2812 * not, as well as a count of render targets) */
2813
2814 unsigned expected_tag = is_mfbd ? MALI_MFBD : 0;
2815
2816 if (is_mfbd) {
2817 if (info.has_extra)
2818 expected_tag |= MALI_MFBD_TAG_EXTRA;
2819
2820 expected_tag |= (MALI_POSITIVE(info.rt_count) << 2);
2821 }
2822
2823 if ((s->min_tile_coord | s->max_tile_coord) & ~(MALI_X_COORD_MASK | MALI_Y_COORD_MASK)) {
2824 pandecode_msg("XXX: unexpected tile coordinate bits\n");
2825 pandecode_prop("min_tile_coord = 0x%X\n", s->min_tile_coord);
2826 pandecode_prop("max_tile_coord = 0x%X\n", s->min_tile_coord);
2827 }
2828
2829 /* Extract tile coordinates */
2830
2831 unsigned min_x = MALI_TILE_COORD_X(s->min_tile_coord) << MALI_TILE_SHIFT;
2832 unsigned min_y = MALI_TILE_COORD_Y(s->min_tile_coord) << MALI_TILE_SHIFT;
2833
2834 unsigned max_x = (MALI_TILE_COORD_X(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2835 unsigned max_y = (MALI_TILE_COORD_Y(s->max_tile_coord) + 1) << MALI_TILE_SHIFT;
2836
2837 /* For the max, we also want the floored (rather than ceiled) version for checking */
2838
2839 unsigned max_x_f = (MALI_TILE_COORD_X(s->max_tile_coord)) << MALI_TILE_SHIFT;
2840 unsigned max_y_f = (MALI_TILE_COORD_Y(s->max_tile_coord)) << MALI_TILE_SHIFT;
2841
2842 /* Validate the coordinates are well-ordered */
2843
2844 if (min_x == max_x)
2845 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2846 else if (min_x > max_x)
2847 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2848
2849 if (min_y == max_y)
2850 pandecode_msg("XXX: empty X coordinates (%u = %u)\n", min_x, max_x);
2851 else if (min_y > max_y)
2852 pandecode_msg("XXX: misordered X coordinates (%u > %u)\n", min_x, max_x);
2853
2854 /* Validate the coordinates fit inside the framebuffer. We use floor,
2855 * rather than ceil, for the max coordinates, since the tile
2856 * coordinates for something like an 800x600 framebuffer will actually
2857 * resolve to 800x608, which would otherwise trigger a Y-overflow */
2858
2859 if ((min_x > info.width) || (max_x_f > info.width))
2860 pandecode_msg("XXX: tile coordinates overflow in X direction\n");
2861
2862 if ((min_y > info.height) || (max_y_f > info.height))
2863 pandecode_msg("XXX: tile coordinates overflow in Y direction\n");
2864
2865 /* After validation, we print */
2866
2867 pandecode_log("fragment (%u, %u) ... (%u, %u)\n\n", min_x, min_y, max_x, max_y);
2868
2869 /* The FBD is a tagged pointer */
2870
2871 unsigned tag = (s->framebuffer & ~FBD_MASK);
2872
2873 if (tag != expected_tag)
2874 pandecode_msg("XXX: expected FBD tag %X but got %X\n", expected_tag, tag);
2875
2876 return sizeof(*s);
2877 }
2878
2879 /* Entrypoint to start tracing. jc_gpu_va is the GPU address for the first job
2880 * in the chain; later jobs are found by walking the chain. Bifrost is, well,
2881 * if it's bifrost or not. GPU ID is the more finegrained ID (at some point, we
2882 * might wish to combine this with the bifrost parameter) because some details
2883 * are model-specific even within a particular architecture. Minimal traces
2884 * *only* examine the job descriptors, skipping printing entirely if there is
2885 * no faults, and only descends into the payload if there are faults. This is
2886 * useful for looking for faults without the overhead of invasive traces. */
2887
2888 void
2889 pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id, bool minimal)
2890 {
2891 struct mali_job_descriptor_header *h;
2892 unsigned job_descriptor_number = 0;
2893
2894 do {
2895 struct pandecode_mapped_memory *mem =
2896 pandecode_find_mapped_gpu_mem_containing(jc_gpu_va);
2897
2898 void *payload;
2899
2900 h = PANDECODE_PTR(mem, jc_gpu_va, struct mali_job_descriptor_header);
2901
2902 /* On Midgard, for 32-bit jobs except for fragment jobs, the
2903 * high 32-bits of the 64-bit pointer are reused to store
2904 * something else.
2905 */
2906 int offset = h->job_descriptor_size == MALI_JOB_32 &&
2907 h->job_type != JOB_TYPE_FRAGMENT ? 4 : 0;
2908 mali_ptr payload_ptr = jc_gpu_va + sizeof(*h) - offset;
2909
2910 payload = pandecode_fetch_gpu_mem(mem, payload_ptr, 256);
2911
2912 int job_no = job_descriptor_number++;
2913
2914 /* If the job is good to go, skip it in minimal mode */
2915 if (minimal && (h->exception_status == 0x0 || h->exception_status == 0x1))
2916 continue;
2917
2918 pandecode_log("struct mali_job_descriptor_header job_%"PRIx64"_%d = {\n", jc_gpu_va, job_no);
2919 pandecode_indent++;
2920
2921 pandecode_prop("job_type = %s", pandecode_job_type(h->job_type));
2922
2923 if (h->job_descriptor_size)
2924 pandecode_prop("job_descriptor_size = %d", h->job_descriptor_size);
2925
2926 if (h->exception_status && h->exception_status != 0x1)
2927 pandecode_prop("exception_status = %x (source ID: 0x%x access: %s exception: 0x%x)",
2928 h->exception_status,
2929 (h->exception_status >> 16) & 0xFFFF,
2930 pandecode_exception_access((h->exception_status >> 8) & 0x3),
2931 h->exception_status & 0xFF);
2932
2933 if (h->first_incomplete_task)
2934 pandecode_prop("first_incomplete_task = %d", h->first_incomplete_task);
2935
2936 if (h->fault_pointer)
2937 pandecode_prop("fault_pointer = 0x%" PRIx64, h->fault_pointer);
2938
2939 if (h->job_barrier)
2940 pandecode_prop("job_barrier = %d", h->job_barrier);
2941
2942 pandecode_prop("job_index = %d", h->job_index);
2943
2944 if (h->unknown_flags)
2945 pandecode_prop("unknown_flags = %d", h->unknown_flags);
2946
2947 if (h->job_dependency_index_1)
2948 pandecode_prop("job_dependency_index_1 = %d", h->job_dependency_index_1);
2949
2950 if (h->job_dependency_index_2)
2951 pandecode_prop("job_dependency_index_2 = %d", h->job_dependency_index_2);
2952
2953 pandecode_indent--;
2954 pandecode_log("};\n");
2955
2956 switch (h->job_type) {
2957 case JOB_TYPE_WRITE_VALUE: {
2958 struct mali_payload_write_value *s = payload;
2959 pandecode_log("struct mali_payload_write_value payload_%"PRIx64"_%d = {\n", payload_ptr, job_no);
2960 pandecode_indent++;
2961 MEMORY_PROP(s, address);
2962
2963 if (s->value_descriptor != MALI_WRITE_VALUE_ZERO) {
2964 pandecode_msg("XXX: unknown value descriptor\n");
2965 pandecode_prop("value_descriptor = 0x%" PRIX32, s->value_descriptor);
2966 }
2967
2968 if (s->reserved) {
2969 pandecode_msg("XXX: set value tripped\n");
2970 pandecode_prop("reserved = 0x%" PRIX32, s->reserved);
2971 }
2972
2973 pandecode_prop("immediate = 0x%" PRIX64, s->immediate);
2974 pandecode_indent--;
2975 pandecode_log("};\n");
2976
2977 break;
2978 }
2979
2980 case JOB_TYPE_TILER:
2981 case JOB_TYPE_VERTEX:
2982 case JOB_TYPE_COMPUTE:
2983 if (bifrost) {
2984 if (h->job_type == JOB_TYPE_TILER)
2985 pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2986 else
2987 pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
2988 } else
2989 pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
2990
2991 break;
2992
2993 case JOB_TYPE_FRAGMENT:
2994 pandecode_fragment_job(mem, payload_ptr, job_no, bifrost, gpu_id);
2995 break;
2996
2997 default:
2998 break;
2999 }
3000 } while ((jc_gpu_va = h->next_job));
3001 }