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freedreno/a6xx: Document the bit for the magic 32bit-uniforms-as-16b mode.
[mesa.git] / src / freedreno / .gitlab-ci / reference / fd-clouds.log
diff --git a/src/freedreno/.gitlab-ci/reference/fd-clouds.log b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
index afb8e7f899d74c6a3c96286a19d67819cbe31333..949862982f057f29aebc86f3a33ef46e09582cc6 100644 (file)
--- a/src/freedreno/.gitlab-ci/reference/fd-clouds.log
+++ b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
@@ -66,8 +66,8 @@ t4            write UCHE_CLIENT_PF (0e19)
 t4             write RB_UNKNOWN_8E01 (8e01)
                        RB_UNKNOWN_8E01: 0x1
 0000000001d9109c:              0000: 408e0101 00000001
 t4             write RB_UNKNOWN_8E01 (8e01)
                        RB_UNKNOWN_8E01: 0x1
 0000000001d9109c:              0000: 408e0101 00000001
-t4             write SP_UNKNOWN_AB00 (ab00)
-                       SP_UNKNOWN_AB00: 0x5
+t4             write SP_MODE_CONTROL (ab00)
+                       SP_MODE_CONTROL: { CONSTANT_DEMOTION_ENABLE | 0x4 }
 0000000001d910a4:              0000: 40ab0001 00000005
 t4             write VFD_ADD_OFFSET (a009)
                        VFD_ADD_OFFSET: { VERTEX }
 0000000001d910a4:              0000: 40ab0001 00000005
 t4             write VFD_ADD_OFFSET (a009)
                        VFD_ADD_OFFSET: { VERTEX }
@@ -612,8 +612,8 @@ t4                                  write SP_FS_PREFETCH_CNTL (a99e)
 t4                                     write SP_UNKNOWN_A9A8 (a9a8)
                                                SP_UNKNOWN_A9A8: 0
 0000000001121010:                                      0000: 40a9a801 00000000
 t4                                     write SP_UNKNOWN_A9A8 (a9a8)
                                                SP_UNKNOWN_A9A8: 0
 0000000001121010:                                      0000: 40a9a801 00000000
-t4                                     write SP_UNKNOWN_AB00 (ab00)
-                                               SP_UNKNOWN_AB00: 0x5
+t4                                     write SP_MODE_CONTROL (ab00)
+                                               SP_MODE_CONTROL: { CONSTANT_DEMOTION_ENABLE | 0x4 }
 0000000001121018:                                      0000: 40ab0001 00000005
 t4                                     write SP_FS_OUTPUT_CNTL0 (a98c)
                                                SP_FS_OUTPUT_CNTL0: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
 0000000001121018:                                      0000: 40ab0001 00000005
 t4                                     write SP_FS_OUTPUT_CNTL0 (a98c)
                                                SP_FS_OUTPUT_CNTL0: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -1140,7 +1140,7 @@ t7                        opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
 !+     00000031                        SP_FS_MRT[0].REG: { COLOR_FORMAT = FMT6_8_8_8_X8_UNORM }
 !+     00007fc0                        SP_FS_PREFETCH_CNTL: { COUNT = 0 | UNK4 = r63.x | 0x7000 }
  +     00000000                        SP_UNKNOWN_A9A8: 0
 !+     00000031                        SP_FS_MRT[0].REG: { COLOR_FORMAT = FMT6_8_8_8_X8_UNORM }
 !+     00007fc0                        SP_FS_PREFETCH_CNTL: { COUNT = 0 | UNK4 = r63.x | 0x7000 }
  +     00000000                        SP_UNKNOWN_A9A8: 0
-!+     00000005                        SP_UNKNOWN_AB00: 0x5
+!+     00000005                        SP_MODE_CONTROL: { CONSTANT_DEMOTION_ENABLE | 0x4 }
 !+     00000100                        SP_FS_CONFIG: { ENABLED | NTEX = 0 | NSAMP = 0 | NIBO = 0 }
  +     00000000                        SP_IBO_COUNT: 0
  +     00000000                        SP_UNKNOWN_AE00: 0
 !+     00000100                        SP_FS_CONFIG: { ENABLED | NTEX = 0 | NSAMP = 0 | NIBO = 0 }
  +     00000000                        SP_IBO_COUNT: 0
  +     00000000                        SP_UNKNOWN_AE00: 0
@@ -1927,8 +1927,8 @@ t4                                        write SP_FS_PREFETCH_CNTL (a99e)
 t4                                     write SP_UNKNOWN_A9A8 (a9a8)
                                                SP_UNKNOWN_A9A8: 0
 0000000001120010:                                      0000: 40a9a801 00000000
 t4                                     write SP_UNKNOWN_A9A8 (a9a8)
                                                SP_UNKNOWN_A9A8: 0
 0000000001120010:                                      0000: 40a9a801 00000000
-t4                                     write SP_UNKNOWN_AB00 (ab00)
-                                               SP_UNKNOWN_AB00: 0x5
+t4                                     write SP_MODE_CONTROL (ab00)
+                                               SP_MODE_CONTROL: { CONSTANT_DEMOTION_ENABLE | 0x4 }
 0000000001120018:                                      0000: 40ab0001 00000005
 t4                                     write SP_FS_OUTPUT_CNTL0 (a98c)
                                                SP_FS_OUTPUT_CNTL0: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
 0000000001120018:                                      0000: 40ab0001 00000005
 t4                                     write SP_FS_OUTPUT_CNTL0 (a98c)
                                                SP_FS_OUTPUT_CNTL0: { DEPTH_REGID = r63.x | SAMPMASK_REGID = r63.x | STENCILREF_REGID = r63.x }
@@ -6792,7 +6792,7 @@ t7                        opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
 !+     00000004                        SP_FS_OUTPUT[0x7].REG: { REGID = r1.x }
  +     00007fc0                        SP_FS_PREFETCH_CNTL: { COUNT = 0 | UNK4 = r63.x | 0x7000 }
  +     00000000                        SP_UNKNOWN_A9A8: 0
 !+     00000004                        SP_FS_OUTPUT[0x7].REG: { REGID = r1.x }
  +     00007fc0                        SP_FS_PREFETCH_CNTL: { COUNT = 0 | UNK4 = r63.x | 0x7000 }
  +     00000000                        SP_UNKNOWN_A9A8: 0
- +     00000005                        SP_UNKNOWN_AB00: 0x5
+ +     00000005                        SP_MODE_CONTROL: { CONSTANT_DEMOTION_ENABLE | 0x4 }
  +     00000100                        SP_FS_CONFIG: { ENABLED | NTEX = 0 | NSAMP = 0 | NIBO = 0 }
 !+     00000058                        SP_FS_INSTRLEN: 88
 !+     011160a0                        SP_IBO_LO: 0x11160a0            base=1116000, offset=160, size=388
  +     00000100                        SP_FS_CONFIG: { ENABLED | NTEX = 0 | NSAMP = 0 | NIBO = 0 }
 !+     00000058                        SP_FS_INSTRLEN: 88
 !+     011160a0                        SP_IBO_LO: 0x11160a0            base=1116000, offset=160, size=388