radeonsi/gfx10: set cache control registers
authorMarek Olšák <marek.olsak@amd.com>
Thu, 6 Jun 2019 04:25:40 +0000 (00:25 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 3 Jul 2019 19:51:13 +0000 (15:51 -0400)
commit09a905d93075da9b2f46d15c9fb77040353f7f80
tree1e6bfa36fb2d2eca4194b602ab9db3ef802ee262
parentb680f723f8c2edd3382631d3481bfcb58d2952a5
radeonsi/gfx10: set cache control registers

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/gallium/drivers/radeonsi/si_state.c