+static void
+radv_pipeline_init_shader_stages_state(struct radv_pipeline *pipeline)
+{
+ struct radv_device *device = pipeline->device;
+
+ for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
+ pipeline->user_data_0[i] =
+ radv_pipeline_stage_to_user_data_0(pipeline, i,
+ device->physical_device->rad_info.chip_class);
+
+ if (pipeline->shaders[i]) {
+ pipeline->need_indirect_descriptor_sets |= pipeline->shaders[i]->info.need_indirect_descriptor_sets;
+ }
+ }
+
+ struct radv_userdata_info *loc = radv_lookup_user_sgpr(pipeline, MESA_SHADER_VERTEX,
+ AC_UD_VS_BASE_VERTEX_START_INSTANCE);
+ if (loc->sgpr_idx != -1) {
+ pipeline->graphics.vtx_base_sgpr = pipeline->user_data_0[MESA_SHADER_VERTEX];
+ pipeline->graphics.vtx_base_sgpr += loc->sgpr_idx * 4;
+ if (radv_get_shader(pipeline, MESA_SHADER_VERTEX)->info.vs.needs_draw_id)
+ pipeline->graphics.vtx_emit_num = 3;
+ else
+ pipeline->graphics.vtx_emit_num = 2;
+ }
+}
+