Merge ../mesa into vulkan

diff --combined src/mesa/drivers/dri/i965/brw_compiler.h
index 0e25ae78a690a4af485ae029b23214b1579f3751,514788c2174d9b79561ffc2102b19d581279eb6b..17a95c6a5bb0b34de63b8fb34bb45649c027d9bd
--- 1/src/mesa/drivers/dri/i965/brw_compiler.h
--- 2/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@@ -94,9 -94,6 +94,9 @@@ struct brw_compiler 
     struct gl_shader_compiler_options glsl_compiler_options[MESA_SHADER_STAGES];
  };
  
 +struct brw_compiler *
 +brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo);
 +
  
  /**
   * Program key structures.
@@@ -704,6 -701,9 +704,9 @@@ brw_compile_cs(const struct brw_compile
                 unsigned *final_assembly_size,
                 char **error_str);
  
+ /**
+  * Fill out local id payload for compute shader according to cs_prog_data.
+  */
  void
  brw_cs_fill_local_id_payload(const struct brw_cs_prog_data *cs_prog_data,
                               void *buffer, uint32_t threads, uint32_t stride);

diff --combined src/mesa/drivers/dri/i965/brw_fs.cpp
index 8dc260c51b96c1b0df5b7d494cbdefcce4df1ac0,c833ef0be3bd2b7f82dd1501638ea2b6bac768cd..cbc2f2fbf4b4c62fd524bd810900d813c1cef9ed
--- 1/src/mesa/drivers/dri/i965/brw_fs.cpp
--- 2/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@@ -510,7 -510,6 +510,7 @@@ type_size_scalar(const struct glsl_typ
     case GLSL_TYPE_ERROR:
     case GLSL_TYPE_INTERFACE:
     case GLSL_TYPE_DOUBLE:
 +   case GLSL_TYPE_FUNCTION:
        unreachable("not reached");
     }
  
@@@ -740,15 -739,15 +740,15 @@@ fs_inst::components_read(unsigned i) co
     case SHADER_OPCODE_LOD_LOGICAL:
     case SHADER_OPCODE_TG4_LOGICAL:
     case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
 -      assert(src[8].file == IMM && src[9].file == IMM);
 +      assert(src[9].file == IMM && src[10].file == IMM);
        /* Texture coordinates. */
        if (i == 0)
 -         return src[8].ud;
 +         return src[9].ud;
        /* Texture derivatives. */
        else if ((i == 2 || i == 3) && opcode == SHADER_OPCODE_TXD_LOGICAL)
 -         return src[9].ud;
 +         return src[10].ud;
        /* Texture offset. */
 -      else if (i == 7)
 +      else if (i == 8)
           return 2;
        /* MCS */
        else if (i == 5 && opcode == SHADER_OPCODE_TXF_CMS_W_LOGICAL)
@@@ -2781,23 -2780,10 +2781,23 @@@ fs_visitor::emit_repclear_shader(
     brw_wm_prog_key *key = (brw_wm_prog_key*) this->key;
     int base_mrf = 1;
     int color_mrf = base_mrf + 2;
 +   fs_inst *mov;
  
 -   fs_inst *mov = bld.exec_all().group(4, 0)
 -                     .MOV(brw_message_reg(color_mrf),
 -                          fs_reg(UNIFORM, 0, BRW_REGISTER_TYPE_F));
 +   if (uniforms == 1) {
 +      mov = bld.exec_all().group(4, 0)
 +               .MOV(brw_message_reg(color_mrf),
 +                    fs_reg(UNIFORM, 0, BRW_REGISTER_TYPE_F));
 +   } else {
 +      struct brw_reg reg =
 +         brw_reg(BRW_GENERAL_REGISTER_FILE,
 +                 2, 3, 0, 0, BRW_REGISTER_TYPE_F,
 +                 BRW_VERTICAL_STRIDE_8,
 +                 BRW_WIDTH_2,
 +                 BRW_HORIZONTAL_STRIDE_4, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
 +
 +      mov = bld.exec_all().group(4, 0)
 +               .MOV(vec4(brw_message_reg(color_mrf)), fs_reg(reg));
 +   }
  
     fs_inst *write;
     if (key->nr_color_regions == 1) {
@@@ -2826,10 -2812,8 +2826,10 @@@
     assign_curb_setup();
  
     /* Now that we have the uniform assigned, go ahead and force it to a vec4. */
 -   assert(mov->src[0].file == FIXED_GRF);
 -   mov->src[0] = brw_vec4_grf(mov->src[0].nr, 0);
 +   if (uniforms == 1) {
 +      assert(mov->src[0].file == FIXED_GRF);
 +      mov->src[0] = brw_vec4_grf(mov->src[0].nr, 0);
 +   }
  }
  
  /**
@@@ -3656,7 -3640,6 +3656,7 @@@ lower_sampler_logical_send_gen4(const f
                                  const fs_reg &coordinate,
                                  const fs_reg &shadow_c,
                                  const fs_reg &lod, const fs_reg &lod2,
 +                                const fs_reg &surface,
                                  const fs_reg &sampler,
                                  unsigned coord_components,
                                  unsigned grad_components)
@@@ -3749,9 -3732,8 +3749,9 @@@
  
     inst->opcode = op;
     inst->src[0] = reg_undef;
 -   inst->src[1] = sampler;
 -   inst->resize_sources(2);
 +   inst->src[1] = surface;
 +   inst->src[2] = sampler;
 +   inst->resize_sources(3);
     inst->base_mrf = msg_begin.nr;
     inst->mlen = msg_end.nr - msg_begin.nr;
     inst->header_size = 1;
@@@ -3763,7 -3745,6 +3763,7 @@@ lower_sampler_logical_send_gen5(const f
                                  const fs_reg &shadow_c,
                                  fs_reg lod, fs_reg lod2,
                                  const fs_reg &sample_index,
 +                                const fs_reg &surface,
                                  const fs_reg &sampler,
                                  const fs_reg &offset_value,
                                  unsigned coord_components,
@@@ -3846,9 -3827,8 +3846,9 @@@
  
     inst->opcode = op;
     inst->src[0] = reg_undef;
 -   inst->src[1] = sampler;
 -   inst->resize_sources(2);
 +   inst->src[1] = surface;
 +   inst->src[2] = sampler;
 +   inst->resize_sources(3);
     inst->base_mrf = message.nr;
     inst->mlen = msg_end.nr - message.nr;
     inst->header_size = header_size;
@@@ -3872,9 -3852,7 +3872,9 @@@ lower_sampler_logical_send_gen7(const f
                                  const fs_reg &shadow_c,
                                  fs_reg lod, fs_reg lod2,
                                  const fs_reg &sample_index,
 -                                const fs_reg &mcs, const fs_reg &sampler,
 +                                const fs_reg &mcs,
 +                                const fs_reg &surface,
 +                                const fs_reg &sampler,
                                  fs_reg offset_value,
                                  unsigned coord_components,
                                  unsigned grad_components)
@@@ -4077,9 -4055,8 +4077,9 @@@
     /* Generate the SEND. */
     inst->opcode = op;
     inst->src[0] = src_payload;
 -   inst->src[1] = sampler;
 -   inst->resize_sources(2);
 +   inst->src[1] = surface;
 +   inst->src[2] = sampler;
 +   inst->resize_sources(3);
     inst->base_mrf = -1;
     inst->mlen = mlen;
     inst->header_size = header_size;
@@@ -4098,27 -4075,25 +4098,27 @@@ lower_sampler_logical_send(const fs_bui
     const fs_reg &lod2 = inst->src[3];
     const fs_reg &sample_index = inst->src[4];
     const fs_reg &mcs = inst->src[5];
 -   const fs_reg &sampler = inst->src[6];
 -   const fs_reg &offset_value = inst->src[7];
 -   assert(inst->src[8].file == IMM && inst->src[9].file == IMM);
 -   const unsigned coord_components = inst->src[8].ud;
 -   const unsigned grad_components = inst->src[9].ud;
 +   const fs_reg &surface = inst->src[6];
 +   const fs_reg &sampler = inst->src[7];
 +   const fs_reg &offset_value = inst->src[8];
 +   assert(inst->src[9].file == IMM && inst->src[10].file == IMM);
 +   const unsigned coord_components = inst->src[9].ud;
 +   const unsigned grad_components = inst->src[10].ud;
  
     if (devinfo->gen >= 7) {
        lower_sampler_logical_send_gen7(bld, inst, op, coordinate,
                                        shadow_c, lod, lod2, sample_index,
 -                                      mcs, sampler, offset_value,
 +                                      mcs, surface, sampler, offset_value,
                                        coord_components, grad_components);
     } else if (devinfo->gen >= 5) {
        lower_sampler_logical_send_gen5(bld, inst, op, coordinate,
                                        shadow_c, lod, lod2, sample_index,
 -                                      sampler, offset_value,
 +                                      surface, sampler, offset_value,
                                        coord_components, grad_components);
     } else {
        lower_sampler_logical_send_gen4(bld, inst, op, coordinate,
 -                                      shadow_c, lod, lod2, sampler,
 +                                      shadow_c, lod, lod2,
 +                                      surface, sampler,
                                        coord_components, grad_components);
     }
  }
@@@ -5715,3 -5690,39 +5715,39 @@@ brw_compile_cs(const struct brw_compile
  
     return g.get_assembly(final_assembly_size);
  }
+ 
+ void
+ brw_cs_fill_local_id_payload(const struct brw_cs_prog_data *prog_data,
+                              void *buffer, uint32_t threads, uint32_t stride)
+ {
+    if (prog_data->local_invocation_id_regs == 0)
+       return;
+ 
+    /* 'stride' should be an integer number of registers, that is, a multiple
+     * of 32 bytes.
+     */
+    assert(stride % 32 == 0);
+ 
+    unsigned x = 0, y = 0, z = 0;
+    for (unsigned t = 0; t < threads; t++) {
+       uint32_t *param = (uint32_t *) buffer + stride * t / 4;
+ 
+       for (unsigned i = 0; i < prog_data->simd_size; i++) {
+          param[0 * prog_data->simd_size + i] = x;
+          param[1 * prog_data->simd_size + i] = y;
+          param[2 * prog_data->simd_size + i] = z;
+ 
+          x++;
+          if (x == prog_data->local_size[0]) {
+             x = 0;
+             y++;
+             if (y == prog_data->local_size[1]) {
+                y = 0;
+                z++;
+                if (z == prog_data->local_size[2])
+                   z = 0;
+             }
+          }
+       }
+    }
+ }