* IN THE SOFTWARE.
*/
+#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include "gen_device_info.h"
#include "compiler/shader_enums.h"
+#include "util/macros.h"
static const struct gen_device_info gen_device_info_i965 = {
.gen = 4,
.has_negative_rhw_bug = true,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 4,
.max_vs_threads = 16,
.max_gs_threads = 2,
.has_surface_tile_offset = true,
.is_g4x = true,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 5,
.max_vs_threads = 32,
.max_gs_threads = 2,
.has_compr4 = true,
.has_surface_tile_offset = true,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 6,
.max_vs_threads = 72,
.max_gs_threads = 32,
.has_surface_tile_offset = true,
.needs_unlit_centroid_workaround = true,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 6, /* Not confirmed */
.max_vs_threads = 24,
.max_gs_threads = 21, /* conservative; 24 if rendering disabled. */
.has_surface_tile_offset = true,
.needs_unlit_centroid_workaround = true,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 6, /* Not confirmed */
.max_vs_threads = 60,
.max_gs_threads = 60,
static const struct gen_device_info gen_device_info_ivb_gt1 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 6,
.l3_banks = 2,
.max_vs_threads = 36,
static const struct gen_device_info gen_device_info_ivb_gt2 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 8, /* Not sure why this isn't a multiple of
* @max_wm_threads ... */
.l3_banks = 4,
static const struct gen_device_info gen_device_info_byt = {
GEN7_FEATURES, .is_baytrail = true, .gt = 1,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 8,
.l3_banks = 1,
.has_llc = false,
static const struct gen_device_info gen_device_info_hsw_gt1 = {
HSW_FEATURES, .gt = 1,
.num_slices = 1,
+ .num_subslices = { 1, },
.num_thread_per_eu = 7,
.l3_banks = 2,
.max_vs_threads = 70,
static const struct gen_device_info gen_device_info_hsw_gt2 = {
HSW_FEATURES, .gt = 2,
.num_slices = 1,
+ .num_subslices = { 2, },
.num_thread_per_eu = 7,
.l3_banks = 4,
.max_vs_threads = 280,
static const struct gen_device_info gen_device_info_hsw_gt3 = {
HSW_FEATURES, .gt = 3,
.num_slices = 2,
+ .num_subslices = { 2, },
.num_thread_per_eu = 7,
.l3_banks = 8,
.max_vs_threads = 280,
GEN8_FEATURES, .gt = 1,
.is_broadwell = true,
.num_slices = 1,
+ .num_subslices = { 2, },
.num_thread_per_eu = 7,
.l3_banks = 2,
.max_cs_threads = 42,
GEN8_FEATURES, .gt = 2,
.is_broadwell = true,
.num_slices = 1,
+ .num_subslices = { 3, },
.num_thread_per_eu = 7,
.l3_banks = 4,
.max_cs_threads = 56,
GEN8_FEATURES, .gt = 3,
.is_broadwell = true,
.num_slices = 2,
+ .num_subslices = { 3, 3, },
.num_thread_per_eu = 7,
.l3_banks = 8,
.max_cs_threads = 56,
GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
.has_llc = false,
.num_slices = 1,
+ .num_subslices = { 2, },
.num_thread_per_eu = 7,
.l3_banks = 2,
.max_vs_threads = 80,
}, \
}
+#define GEN9_LP_FEATURES_3X6 \
+ GEN9_LP_FEATURES, \
+ .num_subslices = { 3, }
+
#define GEN9_LP_FEATURES_2X6 \
GEN9_LP_FEATURES, \
+ .num_subslices = { 2, }, \
.max_vs_threads = 56, \
.max_tcs_threads = 56, \
.max_tes_threads = 56, \
GEN9_FEATURES, .gt = 1,
.is_skylake = true,
.num_slices = 1,
+ .num_subslices = { 2, },
.l3_banks = 2,
.urb.size = 192,
};
GEN9_FEATURES, .gt = 2,
.is_skylake = true,
.num_slices = 1,
+ .num_subslices = { 3, },
.l3_banks = 4,
};
GEN9_FEATURES, .gt = 3,
.is_skylake = true,
.num_slices = 2,
+ .num_subslices = { 3, 3, },
.l3_banks = 8,
};
GEN9_FEATURES, .gt = 4,
.is_skylake = true,
.num_slices = 3,
+ .num_subslices = { 3, 3, 3, },
.l3_banks = 12,
/* From the "L3 Allocation and Programming" documentation:
*
};
static const struct gen_device_info gen_device_info_bxt = {
- GEN9_LP_FEATURES,
+ GEN9_LP_FEATURES_3X6,
.is_broxton = true,
.l3_banks = 2,
};
.max_cs_threads = 7 * 6,
.urb.size = 192,
.num_slices = 1,
+ .num_subslices = { 2, },
.l3_banks = 2,
};
.max_cs_threads = 7 * 6,
.num_slices = 1,
+ .num_subslices = { 3, },
.l3_banks = 4,
};
.gt = 2,
.num_slices = 1,
+ .num_subslices = { 3, },
.l3_banks = 4,
};
.gt = 3,
.num_slices = 2,
+ .num_subslices = { 3, 3, },
.l3_banks = 8,
};
*/
.urb.size = 1008 / 3,
.num_slices = 3,
+ .num_subslices = { 3, 3, 3, },
.l3_banks = 12,
};
static const struct gen_device_info gen_device_info_glk = {
- GEN9_LP_FEATURES,
+ GEN9_LP_FEATURES_3X6,
.is_geminilake = true,
.l3_banks = 2,
};
.gt = 1,
.num_slices = 1,
+ .num_subslices = { 2, },
.l3_banks = 2,
};
static const struct gen_device_info gen_device_info_cfl_gt2 = {
.gt = 2,
.num_slices = 1,
+ .num_subslices = { 3, },
.l3_banks = 4,
};
.gt = 3,
.num_slices = 2,
+ .num_subslices = { 3, 3, },
.l3_banks = 8,
};
}, \
}
-#define GEN10_FEATURES(_gt, _slices, _l3) \
+#define subslices(args...) { args, }
+
+#define GEN10_FEATURES(_gt, _slices, _subslices, _l3) \
GEN8_FEATURES, \
GEN10_HW_INFO, \
- .gt = _gt, .num_slices = _slices, .l3_banks = _l3
+ .gt = _gt, \
+ .num_slices = _slices, \
+ .num_subslices = _subslices, \
+ .l3_banks = _l3
static const struct gen_device_info gen_device_info_cnl_2x8 = {
/* GT0.5 */
- GEN10_FEATURES(1, 1, 2),
+ GEN10_FEATURES(1, 1, subslices(2), 2),
.is_cannonlake = true,
};
static const struct gen_device_info gen_device_info_cnl_3x8 = {
/* GT1 */
- GEN10_FEATURES(1, 1, 3),
+ GEN10_FEATURES(1, 1, subslices(3), 3),
.is_cannonlake = true,
};
static const struct gen_device_info gen_device_info_cnl_4x8 = {
/* GT 1.5 */
- GEN10_FEATURES(1, 2, 6),
+ GEN10_FEATURES(1, 2, subslices(2, 2), 6),
.is_cannonlake = true,
};
static const struct gen_device_info gen_device_info_cnl_5x8 = {
/* GT2 */
- GEN10_FEATURES(2, 2, 6),
+ GEN10_FEATURES(2, 2, subslices(3, 2), 6),
.is_cannonlake = true,
};
* 4; /* effective subslices per slice */
}
+ assert(devinfo->num_slices <= ARRAY_SIZE(devinfo->num_subslices));
+
return true;
}