Seems this isn't needed anymore on a6xx to control whether visibility
stream is used. And it would be hard to deal with if it was, for
disabling use of VSC stream in draw pass. So just remove it and
simplify things.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
#include "fd6_zsa.h"
static void
#include "fd6_zsa.h"
static void
-draw_emit_indirect(struct fd_batch *batch, struct fd_ringbuffer *ring,
+draw_emit_indirect(struct fd_ringbuffer *ring,
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
unsigned max_indicies = (idx->width0 - index_offset) / info->index_size;
OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
unsigned max_indicies = (idx->width0 - index_offset) / info->index_size;
OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RELOC(ring, fd_resource(idx)->bo,
index_offset, 0, 0);
OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
} else {
OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
OUT_RELOC(ring, fd_resource(idx)->bo,
index_offset, 0, 0);
OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
} else {
OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
}
}
static void
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
}
}
static void
-draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
+draw_emit(struct fd_ringbuffer *ring,
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
uint32_t idx_offset = index_offset + info->start * info->index_size;
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 7);
uint32_t idx_offset = index_offset + info->start * info->index_size;
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 7);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
OUT_RING(ring, 0x0); /* XXX */
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
OUT_RING(ring, 0x0); /* XXX */
OUT_RING (ring, idx_size);
} else {
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 3);
OUT_RING (ring, idx_size);
} else {
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 3);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
}
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
}
*/
uint32_t draw0 =
CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(primtype) |
*/
uint32_t draw0 =
CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(primtype) |
+ CP_DRAW_INDX_OFFSET_0_VIS_CULL(USE_VISIBILITY) |
0x2000;
if (info->index_size) {
0x2000;
if (info->index_size) {
- draw_emit_indirect(ctx->batch, ring, draw0, info, index_offset);
+ draw_emit_indirect(ring, draw0, info, index_offset);
- draw_emit(ctx->batch, ring, draw0, info, index_offset);
+ draw_emit(ring, draw0, info, index_offset);
util_dynarray_clear(&batch->fb_read_patches);
}
util_dynarray_clear(&batch->fb_read_patches);
}
-static void
-patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
-{
- unsigned i;
- for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) {
- struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
- *patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
- }
- util_dynarray_clear(&batch->draw_patches);
-}
-
static void
update_render_cntl(struct fd_batch *batch, struct pipe_framebuffer_state *pfb, bool binning)
{
static void
update_render_cntl(struct fd_batch *batch, struct pipe_framebuffer_state *pfb, bool binning)
{
A6XX_RB_BIN_CONTROL_BINNING_PASS | 0x6000000);
update_render_cntl(batch, pfb, true);
emit_binning_pass(batch);
A6XX_RB_BIN_CONTROL_BINNING_PASS | 0x6000000);
update_render_cntl(batch, pfb, true);
emit_binning_pass(batch);
- patch_draws(batch, USE_VISIBILITY);
set_bin_size(ring, gmem->bin_w, gmem->bin_h,
A6XX_RB_BIN_CONTROL_USE_VIZ | 0x6000000);
set_bin_size(ring, gmem->bin_w, gmem->bin_h,
A6XX_RB_BIN_CONTROL_USE_VIZ | 0x6000000);
OUT_RING(ring, 0x1);
} else {
set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000);
OUT_RING(ring, 0x1);
} else {
set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000);
- patch_draws(batch, IGNORE_VISIBILITY);
}
update_render_cntl(batch, pfb, false);
}
update_render_cntl(batch, pfb, false);
OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1);
OUT_RING(ring, 0x1);
OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1);
OUT_RING(ring, 0x1);
- patch_draws(batch, IGNORE_VISIBILITY);
-
emit_zs(ring, pfb->zsbuf, NULL);
emit_mrt(ring, pfb, NULL);
emit_msaa(ring, pfb->samples);
emit_zs(ring, pfb->zsbuf, NULL);
emit_mrt(ring, pfb, NULL);
emit_msaa(ring, pfb->samples);