radv/gfx10: do not use the fast depth or stencil clear bytes path

It causes issues on GFX10.

This fixes rendering issues with vkmark and Wreckfest at least.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index b93ba3e0b294045992c31de99a9c0fd8d216f3ab..8ddc2e38cd4bc54f54cd9bf12acb37194228319f 100644 (file)
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1005,7 +1005,7 @@ radv_can_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
        if (!view_mask && clear_rect->layerCount != iview->image->info.array_size)
                return false;
 
-       if (cmd_buffer->device->physical_device->rad_info.chip_class < GFX9 &&
+       if (cmd_buffer->device->physical_device->rad_info.chip_class != GFX9 &&
            (!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT) ||
            ((vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT) &&
             !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT))))
@@ -1048,7 +1048,8 @@ radv_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
                                              iview->image->planes[0].surface.htile_size, clear_word);
        } else {
                /* Only clear depth or stencil bytes in the HTILE buffer. */
-               assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9);
+               /* TODO: Implement that path for GFX10. */
+               assert(cmd_buffer->device->physical_device->rad_info.chip_class == GFX9);
                flush_bits = clear_htile_mask(cmd_buffer, iview->image->bo,
                                              iview->image->offset + iview->image->htile_offset,
                                              iview->image->planes[0].surface.htile_size, clear_word,