i965: Add new vtable entries for surface state updating functions.
authorKenneth Graunke <kenneth@whitecape.org>
Tue, 1 Nov 2011 21:30:26 +0000 (14:30 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Fri, 11 Nov 2011 06:51:18 +0000 (22:51 -0800)
Gen7+ SURFACE_STATE is different from Gen4-6, so we need separate
per-generation functions for creating and updating it.  However, the
usage is the same, and callers just want to utilize the appropriate
functions with minimal pain.  So, put them in the vtable.

Since these take a brw_context pointer and are only used on Gen4, just
add a forward declaration.  This is the simplest (if not cleanest)
solution.  It would be nicer to have a i965-specific vtable, but that's
a refactor for another day.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
src/mesa/drivers/dri/i965/brw_state.h
src/mesa/drivers/dri/i965/brw_vtbl.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
src/mesa/drivers/dri/intel/intel_context.h

index b23b1cfba4b02507d15c61652c88f4e3f9538bb5..d08a5ba4f1a6bdbc2536565b76f34f1adee4749b 100644 (file)
@@ -165,6 +165,7 @@ void *brw_state_batch(struct brw_context *brw,
                      uint32_t *out_offset);
 
 /* brw_wm_surface_state.c */
+void gen4_init_vtable_surface_functions(struct brw_context *brw);
 void brw_create_constant_surface(struct brw_context *brw,
                                 drm_intel_bo *bo,
                                 int width,
@@ -180,6 +181,7 @@ GLuint translate_tex_format(gl_format mesa_format,
                            GLenum srgb_decode);
 
 /* gen7_wm_surface_state.c */
+void gen7_init_vtable_surface_functions(struct brw_context *brw);
 void gen7_create_constant_surface(struct brw_context *brw,
                                  drm_intel_bo *bo,
                                  int width,
index ddf75c0ec79f03ccfbb24c96045cd7d99fd9a2c9..7c40f278b8a66342b86a0eda9c1e2c44ef3d561c 100644 (file)
@@ -268,4 +268,10 @@ void brwInitVtbl( struct brw_context *brw )
       brw->intel.vtbl.hiz_resolve_hizbuffer = brw_hiz_resolve_noop;
       brw->intel.vtbl.hiz_resolve_depthbuffer = brw_hiz_resolve_noop;
    }
+
+   if (brw->intel.gen >= 7) {
+      gen7_init_vtable_surface_functions(brw);
+   } else if (brw->intel.gen >= 4) {
+      gen4_init_vtable_surface_functions(brw);
+   }
 }
index 0a00ab9b1668e7e510a24bd5cf6b3d950bee0f52..def3ddc5bf5745a4374a625feb5d23701d1593e5 100644 (file)
@@ -677,3 +677,15 @@ const struct brw_tracked_state brw_wm_binding_table = {
    },
    .emit = brw_wm_upload_binding_table,
 };
+
+void
+gen4_init_vtable_surface_functions(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+
+   intel->vtbl.update_texture_surface = brw_update_texture_surface;
+   intel->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface;
+   intel->vtbl.update_null_renderbuffer_surface =
+      brw_update_null_renderbuffer_surface;
+   intel->vtbl.create_constant_surface = brw_create_constant_surface;
+}
index 69433c0f776b48d178b67eaf2d8623774d87546b..3ae9236a141db73de235bb9a6dd7ccea8b73ee1e 100644 (file)
@@ -368,3 +368,15 @@ const struct brw_tracked_state gen7_wm_surfaces = {
    },
    .emit = gen7_upload_wm_surfaces,
 };
+
+void
+gen7_init_vtable_surface_functions(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+
+   intel->vtbl.update_texture_surface = gen7_update_texture_surface;
+   intel->vtbl.update_renderbuffer_surface = gen7_update_renderbuffer_surface;
+   intel->vtbl.update_null_renderbuffer_surface =
+      gen7_update_null_renderbuffer_surface;
+   intel->vtbl.create_constant_surface = gen7_create_constant_surface;
+}
index 08c1692ad96934b6401dba8500be47791724a272..f2be597385108013f3c32400de0753cc43efab0d 100644 (file)
@@ -114,6 +114,8 @@ struct intel_sync_object {
    drm_intel_bo *bo;
 };
 
+struct brw_context;
+
 /**
  * intel_context is derived from Mesa's context class: struct gl_context.
  */
@@ -170,6 +172,21 @@ struct intel_context
                                    struct intel_region *depth_region);
       /** \} */
 
+      /**
+       * Surface state operations (i965+ only)
+       * \{
+       */
+      void (*update_texture_surface)(struct gl_context *ctx, unsigned unit);
+      void (*update_renderbuffer_surface)(struct brw_context *brw,
+                                         struct gl_renderbuffer *rb,
+                                         unsigned unit);
+      void (*update_null_renderbuffer_surface)(struct brw_context *brw,
+                                              unsigned unit);
+      void (*create_constant_surface)(struct brw_context *brw,
+                                     drm_intel_bo *bo,
+                                     int width,
+                                     uint32_t *out_offset);
+      /** \} */
    } vtbl;
 
    GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */