i965/msaa: Control multisampling behaviour via the visual.

Previously, we used the number of samples in draw buffer 0 to
determine whether to set up the 3D pipeline for multisampling.  Using
the visual is cleaner, and has the benefit of working properly when
there is no color buffer.

Fixes all piglit tests "EXT_framebuffer_multisample/no-color" on Gen7.
On Gen6, the "depth-computed" variants of these tests still fail; this
will be addresed in a later patch.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
index f0648c3fcc720f34c418a39f2865e0a24b267d2d..336e7c508a528ad03a414f8fb7b18ee18e593a13 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
@@ -83,20 +83,18 @@ static void upload_multisample_state(struct brw_context *brw)
 {
    struct intel_context *intel = &brw->intel;
    struct gl_context *ctx = &intel->ctx;
-   unsigned num_samples = 0;
    float coverage = 1.0;
    float coverage_invert = false;
 
+   /* _NEW_BUFFERS */
+   unsigned num_samples = ctx->DrawBuffer->Visual.samples;
+
    /* _NEW_MULTISAMPLE */
    if (ctx->Multisample._Enabled && ctx->Multisample.SampleCoverage) {
       coverage = ctx->Multisample.SampleCoverageValue;
       coverage_invert = ctx->Multisample.SampleCoverageInvert;
    }
 
-   /* _NEW_BUFFERS */
-   if (ctx->DrawBuffer->_ColorDrawBuffers[0])
-      num_samples = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples;
-
    /* 3DSTATE_MULTISAMPLE is nonpipelined. */
    intel_emit_post_sync_nonzero_flush(intel);
 

diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index aeed36981562a2c5a0358e9de81442defb4fae9c..736e83ae2b3de4da1ca9db78ad779f9113ba37c0 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -122,9 +122,7 @@ upload_sf_state(struct brw_context *brw)
    int i;
    /* _NEW_BUFFER */
    bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
-   bool multisampled_fbo = false;
-   if (ctx->DrawBuffer->_ColorDrawBuffers[0])
-      multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+   bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
 
    int attr = 0, input_index = 0;
    int urb_entry_read_offset = 1;

diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index fa83eced7a3ca865ab2fa7151e9ea7563239b316..05f4ab9d90c7450f4a1fcb702bb56eef88731508 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -98,11 +98,9 @@ upload_wm_state(struct brw_context *brw)
    const struct brw_fragment_program *fp =
       brw_fragment_program_const(brw->fragment_program);
    uint32_t dw2, dw4, dw5, dw6;
-   bool multisampled_fbo = false;
 
    /* _NEW_BUFFERS */
-   if (ctx->DrawBuffer->_ColorDrawBuffers[0])
-      multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+   bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
 
     /* CACHE_NEW_WM_PROG */
    if (brw->wm.prog_data->nr_params == 0) {

diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index b1fe65478a97a70e8a1c2cadeb9e665b18102529..2d258d2f1be19a007ab1384f7b914616d85a71ac 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -161,9 +161,7 @@ upload_sf_state(struct brw_context *brw)
    float point_size;
    /* _NEW_BUFFERS */
    bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
-   bool multisampled_fbo = false;
-   if (ctx->DrawBuffer->_ColorDrawBuffers[0])
-      multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+   bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
 
    dw1 = GEN6_SF_STATISTICS_ENABLE |
          GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;

diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 8e4417eb3f63816204861076ea9386f0185a15af..e60027ad5e278f1271065f1b3769b79948f1df41 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -39,12 +39,10 @@ upload_wm_state(struct brw_context *brw)
    const struct brw_fragment_program *fp =
       brw_fragment_program_const(brw->fragment_program);
    bool writes_depth = false;
-   bool multisampled_fbo = false;
    uint32_t dw1, dw2;
 
    /* _NEW_BUFFERS */
-   if (ctx->DrawBuffer->_ColorDrawBuffers[0])
-      multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+   bool multisampled_fbo = ctx->DrawBuffer->Visual.sampleBuffers;
 
    dw1 = dw2 = 0;
    dw1 |= GEN7_WM_STATISTICS_ENABLE;