i965: Upload binding table pointers on Ivybridge.

Ivybridge uses per-stage commands to update binding table pointers.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 3e35e54d35a2c3b3c18fc6ac2af446699233d84e..7f2b34611b5e018b03ef027b9f11d8d7eedf7c3d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -832,6 +832,10 @@
 # define GEN6_BINDING_TABLE_MODIFY_GS  (1 << 9)
 # define GEN6_BINDING_TABLE_MODIFY_PS  (1 << 12)
 
+#define _3DSTATE_BINDING_TABLE_POINTERS_VS     0x7826 /* GEN7+ */
+#define _3DSTATE_BINDING_TABLE_POINTERS_GS     0x7829 /* GEN7+ */
+#define _3DSTATE_BINDING_TABLE_POINTERS_PS     0x782A /* GEN7+ */
+
 #define _3DSTATE_SAMPLER_STATE_POINTERS                0x7802 /* GEN6+ */
 # define PS_SAMPLER_STATE_CHANGE                               (1 << 12)
 # define GS_SAMPLER_STATE_CHANGE                               (1 << 9)

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 6684cdc278bc33143dc8d5fa22b6b581b718ca10..25b2803b0cc57fb6373dbf314b09703474a8e501 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -220,8 +220,6 @@ const struct brw_tracked_state *gen7_atoms[] =
 
    &gen6_scissor_state,
 
-   &gen6_binding_table_pointers,
-
    &brw_depthbuffer,
 
    &brw_polygon_stipple,

diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 5697e90a8b8d3ce62c8dc7cc7a461edb836dcc36..6a7add8e562f7bd845496d2c43939931e92aa59a 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -35,6 +35,11 @@ upload_vs_state(struct brw_context *brw)
    struct intel_context *intel = &brw->intel;
    struct gl_context *ctx = &intel->ctx;
 
+   BEGIN_BATCH(2);
+   OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_VS << 16 | (2 - 2));
+   OUT_BATCH(brw->vs.bind_bo_offset);
+   ADVANCE_BATCH();
+
    if (brw->vs.push_const_size == 0) {
       /* Disable the push constant buffers. */
       BEGIN_BATCH(7);
@@ -86,6 +91,7 @@ const struct brw_tracked_state gen7_vs_state = {
                BRW_NEW_URB_FENCE |
                BRW_NEW_CONTEXT |
                BRW_NEW_VERTEX_PROGRAM |
+               BRW_NEW_VS_BINDING_TABLE |
                BRW_NEW_BATCH),
       .cache = CACHE_NEW_VS_PROG
    },

diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 9d5a71fda4e6d5e82240890cfc166f4dfbc57674..bae7f477a882178543d48b35c4bbccc04e706b89 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -155,6 +155,11 @@ upload_ps_state(struct brw_context *brw)
    struct intel_context *intel = &brw->intel;
    uint32_t dw2, dw4, dw5;
 
+   BEGIN_BATCH(2);
+   OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_PS << 16 | (2 - 2));
+   OUT_BATCH(brw->wm.bind_bo_offset);
+   ADVANCE_BATCH();
+
    /* CACHE_NEW_WM_PROG */
    if (brw->wm.prog_data->nr_params == 0) {
       /* Disable the push constant buffers. */
@@ -234,6 +239,7 @@ const struct brw_tracked_state gen7_ps_state = {
       .brw   = (BRW_NEW_CURBE_OFFSETS |
                BRW_NEW_FRAGMENT_PROGRAM |
                 BRW_NEW_NR_WM_SURFACES |
+               BRW_NEW_PS_BINDING_TABLE |
                BRW_NEW_URB_FENCE |
                BRW_NEW_BATCH),
       .cache = (CACHE_NEW_SAMPLER |