radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI
authorMarek Olšák <marek.olsak@amd.com>
Tue, 28 Aug 2018 19:49:31 +0000 (15:49 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Mon, 10 Sep 2018 19:19:56 +0000 (15:19 -0400)
VI uses addrlib so it's unaffected.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
src/gallium/drivers/radeonsi/si_texture.c

index e55fd81526478a8d52ae0a2b9a06b4ae0c251228..bcff226a5868ffdcc6f7e614d9ad205acc291a91 100644 (file)
@@ -931,8 +931,8 @@ static void si_texture_get_htile_size(struct si_screen *sscreen,
                return;
        }
 
-       width = align(tex->buffer.b.b.width0, cl_width * 8);
-       height = align(tex->buffer.b.b.height0, cl_height * 8);
+       width = align(tex->surface.u.legacy.level[0].nblk_x, cl_width * 8);
+       height = align(tex->surface.u.legacy.level[0].nblk_y, cl_height * 8);
 
        slice_elements = (width * height) / (8 * 8);
        slice_bytes = slice_elements * 4;