ac/nir: fix atomic compare-and-swap
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Mon, 2 Apr 2018 12:12:50 +0000 (14:12 +0200)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Fri, 20 Apr 2018 07:21:40 +0000 (09:21 +0200)
The LLVM instruction returns { i32, i1 }, where the i1 indicates success.
We're only interested in the first part, which is the loaded value.

Fixes dEQP-GLES31.functional.compute.shared_var.atomic.compswap.*

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
src/amd/common/ac_nir_to_llvm.c

index 45405d30fe8cd324d07742b6ab5c1fb0908954bd..6b519f78e0f25dd04fc9099330e21fd381c3bef9 100644 (file)
@@ -2631,6 +2631,7 @@ static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
                                                LLVMAtomicOrderingSequentiallyConsistent,
                                                LLVMAtomicOrderingSequentiallyConsistent,
                                                false);
+               result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
        } else {
                LLVMAtomicRMWBinOp op;
                switch (instr->intrinsic) {