nir/spirv: cast shift operand to u32
authorKarol Herbst <kherbst@redhat.com>
Thu, 26 Apr 2018 14:54:26 +0000 (16:54 +0200)
committerKarol Herbst <kherbst@redhat.com>
Wed, 14 Nov 2018 01:09:11 +0000 (02:09 +0100)
v2: fix for specialization constants as well

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Karol Herbst <kherbst@redhat.com>
src/compiler/spirv/spirv_to_nir.c
src/compiler/spirv/vtn_alu.c

index 96ff09c36597765da2d43f20beba096ef9aa6961..77ce0be369ef663799397468338a41ba12a9b6fd 100644 (file)
@@ -1811,6 +1811,26 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
             src[j] = src_val->constant->values[0];
          }
 
+         /* fix up fixed size sources */
+         switch (op) {
+         case nir_op_ishl:
+         case nir_op_ishr:
+         case nir_op_ushr: {
+            if (bit_size == 32)
+               break;
+            for (unsigned i = 0; i < num_components; ++i) {
+               switch (bit_size) {
+               case 64: src[1].u32[i] = src[1].u64[i]; break;
+               case 16: src[1].u32[i] = src[1].u16[i]; break;
+               case  8: src[1].u32[i] = src[1].u8[i];  break;
+               }
+            }
+            break;
+         }
+         default:
+            break;
+         }
+
          val->constant->values[0] =
             nir_eval_const_opcode(op, num_components, bit_size, src);
          break;
index 6860e7dc090f1299ad9b65a584782b64b5e3cdd8..a23f8c29b5c5551155ba06eef6671f2abfad660a 100644 (file)
@@ -696,6 +696,17 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
          src[1] = tmp;
       }
 
+      switch (op) {
+      case nir_op_ishl:
+      case nir_op_ishr:
+      case nir_op_ushr:
+         if (src[1]->bit_size != 32)
+            src[1] = nir_u2u32(&b->nb, src[1]);
+         break;
+      default:
+         break;
+      }
+
       val->ssa->def = nir_build_alu(&b->nb, op, src[0], src[1], src[2], src[3]);
       break;
    } /* default */