radeon: Don't check DCC on pipe buffers

Fixes segfaults in EG compute since:
commit 21de3be8e62b2b093569a99550e6356ed2f106b4
radeonsi: fix texture format reinterpretation with DCC

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 41fd94b24379757c072d6847617e692f8d601f05..d3a498fb35d9c3841b5b9b473c57d35823e01aa2 100644 (file)
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1788,9 +1788,10 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe,
        surface->base.u = templ->u;
        surface->level_info = &rtex->surface.level[templ->u.tex.level];
 
-       vi_dcc_disable_if_incompatible_format(rctx, texture,
-                                             templ->u.tex.level,
-                                             templ->format);
+       if (texture->target != PIPE_BUFFER)
+               vi_dcc_disable_if_incompatible_format(rctx, texture,
+                                                     templ->u.tex.level,
+                                                     templ->format);
 
        return &surface->base;
 }