r600g: Implement ARB_texture_view
authorGlenn Kennard <glenn.kennard@gmail.com>
Thu, 15 Oct 2015 23:53:47 +0000 (01:53 +0200)
committerDave Airlie <airlied@redhat.com>
Tue, 10 Nov 2015 22:36:08 +0000 (08:36 +1000)
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
docs/GL3.txt
docs/relnotes/11.1.0.html
src/gallium/drivers/r600/evergreen_state.c
src/gallium/drivers/r600/r600_pipe.c

index 7abdcd8dea14acaeac840ce852005a14e5650269..845672b07d525d37fcfea8e3c14db535ca3a5332 100644 (file)
@@ -169,7 +169,7 @@ GL 4.3, GLSL 4.30:
   GL_ARB_texture_buffer_range                          DONE (nv50, nvc0, i965, r600, radeonsi, llvmpipe)
   GL_ARB_texture_query_levels                          DONE (all drivers that support GLSL 1.30)
   GL_ARB_texture_storage_multisample                   DONE (all drivers that support GL_ARB_texture_multisample)
-  GL_ARB_texture_view                                  DONE (i965, nv50, nvc0, radeonsi, llvmpipe, softpipe)
+  GL_ARB_texture_view                                  DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
   GL_ARB_vertex_attrib_binding                         DONE (all drivers)
 
 
index 11fbdfff236e6584d8f81ae6b46d6aad72f42cab..14656fd97c9afe0707a398f4afb0f309de60af0a 100644 (file)
@@ -55,7 +55,7 @@ Note: some of the new features are only available with certain drivers.
 <li>GL_ARB_shader_texture_image_samples on i965, nv50, nvc0, r600, radeonsi</li>
 <li>GL_ARB_texture_barrier / GL_NV_texture_barrier on i965</li>
 <li>GL_ARB_texture_query_lod on softpipe</li>
-<li>GL_ARB_texture_view on radeonsi</li>
+<li>GL_ARB_texture_view on radeonsi and r600 (for evergeen and newer)</li>
 <li>GL_EXT_buffer_storage implemented for when ES 3.1 support is gained</li>
 <li>GL_EXT_draw_elements_base_vertex on all drivers</li>
 <li>GL_OES_draw_elements_base_vertex on all drivers</li>
index 96c6b115c980102ef3d0f8fdbc3fcf4afb05d955..30e902673d0abe04161c2ab54c6fed79b7ad2f41 100644 (file)
@@ -666,6 +666,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
        enum pipe_format pipe_format = state->format;
        struct radeon_surf_level *surflevel;
        unsigned base_level, first_level, last_level;
+       unsigned dim, last_layer;
        uint64_t va;
 
        if (view == NULL)
@@ -679,7 +680,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
        view->base.reference.count = 1;
        view->base.context = ctx;
 
-       if (texture->target == PIPE_BUFFER)
+       if (state->target == PIPE_BUFFER)
                return texture_buffer_sampler_view(rctx, view, width0, height0);
 
        swizzle[0] = state->swizzle_r;
@@ -773,12 +774,12 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
        }
        nbanks = eg_num_banks(rscreen->b.tiling_info.num_banks);
 
-       if (texture->target == PIPE_TEXTURE_1D_ARRAY) {
+       if (state->target == PIPE_TEXTURE_1D_ARRAY) {
                height = 1;
                depth = texture->array_size;
-       } else if (texture->target == PIPE_TEXTURE_2D_ARRAY) {
+       } else if (state->target == PIPE_TEXTURE_2D_ARRAY) {
                depth = texture->array_size;
-       } else if (texture->target == PIPE_TEXTURE_CUBE_ARRAY)
+       } else if (state->target == PIPE_TEXTURE_CUBE_ARRAY)
                depth = texture->array_size / 6;
 
        va = tmp->resource.gpu_address;
@@ -790,7 +791,13 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
                view->is_stencil_sampler = true;
 
        view->tex_resource = &tmp->resource;
-       view->tex_resource_words[0] = (S_030000_DIM(r600_tex_dim(texture->target, texture->nr_samples)) |
+
+       /* array type views and views into array types need to use layer offset */
+       dim = state->target;
+       if (state->target != PIPE_TEXTURE_CUBE)
+               dim = MAX2(state->target, texture->target);
+
+       view->tex_resource_words[0] = (S_030000_DIM(r600_tex_dim(dim, texture->nr_samples)) |
                                       S_030000_PITCH((pitch / 8) - 1) |
                                       S_030000_TEX_WIDTH(width - 1));
        if (rscreen->b.chip_class == CAYMAN)
@@ -818,10 +825,14 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
                view->tex_resource_words[3] = (surflevel[base_level].offset + va) >> 8;
        }
 
+       last_layer = state->u.tex.last_layer;
+       if (state->target != texture->target && depth == 1) {
+               last_layer = state->u.tex.first_layer;
+       }
        view->tex_resource_words[4] = (word4 |
                                       S_030010_ENDIAN_SWAP(endian));
        view->tex_resource_words[5] = S_030014_BASE_ARRAY(state->u.tex.first_layer) |
-                                     S_030014_LAST_ARRAY(state->u.tex.last_layer);
+                                     S_030014_LAST_ARRAY(last_layer);
        view->tex_resource_words[6] = S_030018_TILE_SPLIT(tile_split);
 
        if (texture->nr_samples > 1) {
index 9f4cda2c1420daf9305c3e7c2eb210179bd62fd4..29682390648114223d9046aded7f56b577482a55 100644 (file)
@@ -323,6 +323,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_GATHER_SM5:
        case PIPE_CAP_TEXTURE_QUERY_LOD:
        case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
+       case PIPE_CAP_SAMPLER_VIEW_TARGET:
                return family >= CHIP_CEDAR ? 1 : 0;
        case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
                return family >= CHIP_CEDAR ? 4 : 0;
@@ -338,7 +339,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_VERTEX_COLOR_CLAMPED:
        case PIPE_CAP_USER_VERTEX_BUFFERS:
        case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
-       case PIPE_CAP_SAMPLER_VIEW_TARGET:
        case PIPE_CAP_VERTEXID_NOBASE:
        case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
        case PIPE_CAP_DEPTH_BOUNDS_TEST: