radeon/uvd: uv pitch separation for stoney
authorBoyuan Zhang <boyuan.zhang@amd.com>
Thu, 12 Nov 2015 23:01:16 +0000 (18:01 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 23 Nov 2015 22:34:43 +0000 (17:34 -0500)
v2: set the behaviour default for future ASICs.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Cc: mesa-stable@lists.freedesktop.org
src/gallium/drivers/radeon/radeon_uvd.c
src/gallium/drivers/radeon/radeon_uvd.h

index 0c643e5cd594cf6b7142a7049b7d78758c96b2fc..6ea07be72fea3a082b428dc60b28a4da64a7069a 100644 (file)
@@ -958,6 +958,8 @@ static void ruvd_end_frame(struct pipe_video_codec *decoder,
        dec->msg->body.decode.db_pitch = dec->base.width;
 
        dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
+       if (((struct r600_common_screen*)dec->screen)->family >= CHIP_STONEY)
+               dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
 
        switch (u_reduce_video_profile(picture->profile)) {
        case PIPE_VIDEO_FORMAT_MPEG4_AVC:
index 9cc0a694c30a362d99601958090b8a53285cd6b3..88013bd56535ed348e4fd4c99b2a981b64ab03e4 100644 (file)
@@ -394,7 +394,10 @@ struct ruvd_msg {
                        uint32_t        dt_chroma_top_offset;
                        uint32_t        dt_chroma_bottom_offset;
                        uint32_t        dt_surf_tile_config;
-                       uint32_t        dt_reserved[3];
+                       uint32_t        dt_uv_surf_tile_config;
+                       // re-use dt_wa_chroma_top_offset as dt_ext_info for UV pitch in stoney
+                       uint32_t        dt_wa_chroma_top_offset;
+                       uint32_t        dt_wa_chroma_bottom_offset;
 
                        uint32_t        reserved[16];