gallium/radeon: emit relocations for query fences
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Fri, 30 Sep 2016 09:46:47 +0000 (11:46 +0200)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Fri, 30 Sep 2016 10:38:57 +0000 (12:38 +0200)
This is only needed for r600 which doesn't have ARB_query_buffer_object and
therefore wouldn't really need the fences, but let's be optimistic about
filling in this feature gap eventually.

Cc: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeon/r600_pipe_common.c
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeon/r600_query.c
src/gallium/drivers/radeonsi/si_perfcounter.c

index 5b1ce04277b7e4e0f48c019f835c3144ed1188c2..95950c36804d60ce2187d4619e0631896e69eb0d 100644 (file)
@@ -80,7 +80,7 @@ void radeon_shader_binary_clean(struct radeon_shader_binary *b)
  * pipe_context
  */
 
-void r600_gfx_write_fence(struct r600_common_context *ctx,
+void r600_gfx_write_fence(struct r600_common_context *ctx, struct r600_resource *buf,
                          uint64_t va, uint32_t old_value, uint32_t new_value)
 {
        struct radeon_winsys_cs *cs = ctx->gfx.cs;
@@ -106,6 +106,8 @@ void r600_gfx_write_fence(struct r600_common_context *ctx,
        radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1));
        radeon_emit(cs, new_value); /* immediate data */
        radeon_emit(cs, 0); /* unused */
+
+       r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
 }
 
 unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen)
@@ -115,6 +117,9 @@ unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen)
        if (screen->chip_class == CIK)
                dwords *= 2;
 
+       if (!screen->info.has_virtual_memory)
+               dwords += 2;
+
        return dwords;
 }
 
index f23f1c436a26caaa74ad64a74878ec63daf77173..c6669ccfec280d7a183d8492929eb305f2b9e89b 100644 (file)
@@ -700,7 +700,7 @@ r600_invalidate_resource(struct pipe_context *ctx,
                         struct pipe_resource *resource);
 
 /* r600_common_pipe.c */
-void r600_gfx_write_fence(struct r600_common_context *ctx,
+void r600_gfx_write_fence(struct r600_common_context *ctx, struct r600_resource *buf,
                          uint64_t va, uint32_t old_value, uint32_t new_value);
 unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen);
 void r600_gfx_wait_fence(struct r600_common_context *ctx,
index 429ea6a956528ef8f551dc8915fc8bae1c843cbb..4b6767dd38a7303693abc5491da5595d92c7d4a5 100644 (file)
@@ -616,6 +616,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
                                       uint64_t va)
 {
        struct radeon_winsys_cs *cs = ctx->gfx.cs;
+       uint64_t fence_va = 0;
 
        switch (query->b.type) {
        case PIPE_QUERY_OCCLUSION_COUNTER:
@@ -626,8 +627,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
                radeon_emit(cs, va);
                radeon_emit(cs, (va >> 32) & 0xFFFF);
 
-               va += ctx->max_db * 16 - 8;
-               r600_gfx_write_fence(ctx, va, 0, 0x80000000);
+               fence_va = va + ctx->max_db * 16 - 8;
                break;
        case PIPE_QUERY_PRIMITIVES_EMITTED:
        case PIPE_QUERY_PRIMITIVES_GENERATED:
@@ -650,8 +650,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
                radeon_emit(cs, 0);
                radeon_emit(cs, 0);
 
-               va += 8;
-               r600_gfx_write_fence(ctx, va, 0, 0x80000000);
+               fence_va = va + 8;
                break;
        case PIPE_QUERY_PIPELINE_STATISTICS: {
                unsigned sample_size = (query->result_size - 8) / 2;
@@ -662,8 +661,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
                radeon_emit(cs, va);
                radeon_emit(cs, (va >> 32) & 0xFFFF);
 
-               va += sample_size;
-               r600_gfx_write_fence(ctx, va, 0, 0x80000000);
+               fence_va = va + sample_size;
                break;
        }
        default:
@@ -671,6 +669,9 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
        }
        r600_emit_reloc(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
                        RADEON_PRIO_QUERY);
+
+       if (fence_va)
+               r600_gfx_write_fence(ctx, query->buffer.buf, fence_va, 0, 0x80000000);
 }
 
 static void r600_query_hw_emit_stop(struct r600_common_context *ctx,
index d0c5392b441e1e49a6b3b0c9fbab16d92a682c50..0f5c28ce0f602ef4bcfd43cb126b75a3a242b814 100644 (file)
@@ -591,7 +591,7 @@ static void si_pc_emit_stop(struct r600_common_context *ctx,
 {
        struct radeon_winsys_cs *cs = ctx->gfx.cs;
 
-       r600_gfx_write_fence(ctx, va, 1, 0);
+       r600_gfx_write_fence(ctx, buffer, va, 1, 0);
        r600_gfx_wait_fence(ctx, va, 0, 0xffffffff);
 
        radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));