mesa.git
4 years agovulkan/wsi/wayland: Use per-display event queue
Daniel Stone [Tue, 2 May 2017 09:04:33 +0000 (10:04 +0100)]
vulkan/wsi/wayland: Use per-display event queue

Calling random callbacks on the display's event queue is hostile, as
we may call into client code when it least expects it. Create our own
event queue, one per wsi_wl_display, and use that for the registry.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agovulkan/wsi/wayland: Remove roundtrip when creating image
Daniel Stone [Tue, 2 May 2017 08:51:40 +0000 (09:51 +0100)]
vulkan/wsi/wayland: Remove roundtrip when creating image

There's no need to call wl_display_roundtrip() after trying to create a
buffer through wl_drm; if it succeeds then everything is fine, and if it
fails, then we get a fatal protocol error so can't recover anyway.

Additionally, doing a roundtrip on the default / main application queue,
is destructive anyway, so would need to be its own queue.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agovulkan: Fix Wayland uninitialised registry
Daniel Stone [Fri, 28 Apr 2017 14:49:47 +0000 (16:49 +0200)]
vulkan: Fix Wayland uninitialised registry

Untangle the exit cleanup paths so we don't try to use the registry
variable before it's been initialised.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agoi965/formats: Update the three-channel DXT1 mappings
Nanley Chery [Thu, 11 May 2017 22:57:59 +0000 (15:57 -0700)]
i965/formats: Update the three-channel DXT1 mappings

The procedure for decompressing an opaque DXT1 OpenGL format is
dependant on the comparison of two colors stored in the first 32 bits of
the compressed block. Here's the specified OpenGL behavior for
reference:

   The RGB color for a texel at location (x,y) in the block is given by:

      RGB0,              if color0 > color1 and code(x,y) == 0
      RGB1,              if color0 > color1 and code(x,y) == 1
      (2*RGB0+RGB1)/3,   if color0 > color1 and code(x,y) == 2
      (RGB0+2*RGB1)/3,   if color0 > color1 and code(x,y) == 3

      RGB0,              if color0 <= color1 and code(x,y) == 0
      RGB1,              if color0 <= color1 and code(x,y) == 1
      (RGB0+RGB1)/2,     if color0 <= color1 and code(x,y) == 2
      BLACK,             if color0 <= color1 and code(x,y) == 3

The sampling operation performed on an opaque DXT1 Intel format essentially
hard-codes the comparison result of the two colors as color0 > color1.
This means that the behavior is incompatible with OpenGL. This is stated
in the SKL PRM, Vol 5: Memory Views:

   Opaque Textures (DXT1_RGB)
      Texture format DXT1_RGB is identical to DXT1, with the exception that the
      One-bit Alpha encoding is removed. Color 0 and Color 1 are not compared, and
      the resulting texel color is derived strictly from the Opaque Color Encoding.
      The alpha channel defaults to 1.0.

      Programming Note
      Context: Opaque Textures (DXT1_RGB)
      The behavior of this format is not compliant with the OGL spec.

The opaque and non-opaque DXT1 OpenGL formats are specified to be
decoded in exactly the same way except the BLACK value must have a
transparent alpha channel in the latter. Use the four-channel BC1 Intel
formats with the alpha set to 1 to provide the behavior required by the
spec. Note that the alpha is already set to 1 for RGB formats in
brw_get_texture_swizzle().

v2: Provide a more detailed commit message (Kenneth Graunke).
v3: Ensure the alpha channel is set to 1 for DXT1 formats.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100925
Cc: <mesa-stable@lists.freedesktop.org>
Acked-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
4 years agoanv/formats: Update the three-channel BC1 mappings
Nanley Chery [Thu, 11 May 2017 22:57:59 +0000 (15:57 -0700)]
anv/formats: Update the three-channel BC1 mappings

The procedure for decompressing an opaque BC1 Vulkan format is dependant on the
comparison of two colors stored in the first 32 bits of the compressed block.
Here's the specified OpenGL (and Vulkan) behavior for reference:

   The RGB color for a texel at location (x,y) in the block is given by:

      RGB0,              if color0 > color1 and code(x,y) == 0
      RGB1,              if color0 > color1 and code(x,y) == 1
      (2*RGB0+RGB1)/3,   if color0 > color1 and code(x,y) == 2
      (RGB0+2*RGB1)/3,   if color0 > color1 and code(x,y) == 3

      RGB0,              if color0 <= color1 and code(x,y) == 0
      RGB1,              if color0 <= color1 and code(x,y) == 1
      (RGB0+RGB1)/2,     if color0 <= color1 and code(x,y) == 2
      BLACK,             if color0 <= color1 and code(x,y) == 3

The sampling operation performed on an opaque DXT1 Intel format essentially
hard-codes the comparison result of the two colors as color0 > color1. This
means that the behavior is incompatible with OpenGL and Vulkan. This is stated
in the SKL PRM, Vol 5: Memory Views:

   Opaque Textures (DXT1_RGB)
      Texture format DXT1_RGB is identical to DXT1, with the exception that the
      One-bit Alpha encoding is removed. Color 0 and Color 1 are not compared, and
      the resulting texel color is derived strictly from the Opaque Color Encoding.
      The alpha channel defaults to 1.0.

      Programming Note
      Context: Opaque Textures (DXT1_RGB)
      The behavior of this format is not compliant with the OGL spec.

The opaque and non-opaque BC1 Vulkan formats are specified to be decoded in
exactly the same way except the BLACK value must have a transparent alpha
channel in the latter. Use the four-channel BC1 Intel formats with the alpha
set to 1 to provide the behavior required by the spec.

v2 (Kenneth Graunke):
- Provide a more detailed commit message.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100925
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
4 years agoanv: Add an option to abort on device loss
Jason Ekstrand [Thu, 18 May 2017 20:51:16 +0000 (13:51 -0700)]
anv: Add an option to abort on device loss

This is mostly for running in our CI system to prevent dEQP from
continuing on to the next test if we get a GPU hang.  As it currently
stands, dEQP uses the same VkDevice for almost all tests and if one of
the tests hangs, we set the anv_device::device_lost flag and report
VK_ERROR_DEVICE_LOST for all queue operations from that point forward
without sending anything to the GPU.  dEQP will happily continue trying
to run tests and reporting failures until it eventually gets crash that
forces the test runner to start over.  This circumvents the problem by
just aborting the process if we ever get a GPU hang.  Since this is not
the recommended behavior most of the time, we hide it behind an
environment variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoanv: Wrap the device lost error in vk_error in QueueSubmit
Jason Ekstrand [Thu, 18 May 2017 21:07:27 +0000 (14:07 -0700)]
anv: Wrap the device lost error in vk_error in QueueSubmit

We weren't wrapping this before because anv_cmd_buffer_execbuf may throw
a more meaningful error message.  However, we do change the error code
into VK_ERROR_DEVICE_LOST, so we should print a new message.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoradeonsi/gfx9: use CE RAM optimally
Marek Olšák [Wed, 17 May 2017 00:49:40 +0000 (02:49 +0200)]
radeonsi/gfx9: use CE RAM optimally

On GFX9 with only 4K CE RAM, define the range of slots that will be
allocated in CE RAM. All other slots will be uploaded directly. This will
switch dynamically according to which slots are used by current shaders.

GFX9 CE usage should now be similar to VI instead of being often disabled.

Tested on VI by taking the GFX9 CE allocation codepath and setting
num_ce_slots = 2 everywhere to get frequent switches between both modes.
CE is still disabled on GFX9.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: remove CE offset alignment restriction
Marek Olšák [Wed, 17 May 2017 00:45:25 +0000 (02:45 +0200)]
radeonsi: remove CE offset alignment restriction

This was only needed by LOAD_CONST_RAM, which is now only used to load
whole CE.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: only upload (dump to L2) those descriptors that are used by shaders
Marek Olšák [Mon, 15 May 2017 21:03:01 +0000 (23:03 +0200)]
radeonsi: only upload (dump to L2) those descriptors that are used by shaders

This decreases the size of CE RAM dumps to L2, or the size of descriptor
uploads without CE.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: record which descriptor slots are used by shaders
Marek Olšák [Mon, 15 May 2017 22:03:52 +0000 (00:03 +0200)]
radeonsi: record which descriptor slots are used by shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: update si_ce_needed_cs_space
Marek Olšák [Mon, 15 May 2017 21:57:37 +0000 (23:57 +0200)]
radeonsi: update si_ce_needed_cs_space

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: do only 1 big CE dump at end of IBs and one reload in the preamble
Marek Olšák [Mon, 15 May 2017 21:45:57 +0000 (23:45 +0200)]
radeonsi: do only 1 big CE dump at end of IBs and one reload in the preamble

A later commit will only upload descriptors used by shaders, so we won't do
full dumps anymore, so the only way to have a complete mirror of CE RAM
in memory is to do a separate dump after the last draw call.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: remove early return in si_upload_descriptors
Marek Olšák [Mon, 15 May 2017 17:59:41 +0000 (19:59 +0200)]
radeonsi: remove early return in si_upload_descriptors

All updates of descriptors_dirty also set dirty_mask, so the return is
unnecessary. The next commit will want this function to be executed
even if dirty_mask == 0.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: clamp indirect index to the number of declared shader resources
Marek Olšák [Wed, 17 May 2017 19:11:13 +0000 (21:11 +0200)]
radeonsi: clamp indirect index to the number of declared shader resources

We'll do partial uploads of descriptor arrays, so we need to clamp
against what shaders declare.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: merge sampler and image descriptor lists into one
Marek Olšák [Sat, 13 May 2017 15:16:27 +0000 (17:16 +0200)]
radeonsi: merge sampler and image descriptor lists into one

Sampler slots: slot[8], .. slot[39] (ascending)
Image slots: slot[7], .. slot[0] (descending)

Each image occupies 1/2 of each slot, so there are 16 images in total,
therefore the layout is: slot[15], .. slot[0]. (in 1/2 slot increments)

Updating image slot 2n+i (i <= 1) also dirties and re-uploads slot 2n+!i.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: merge constant and shader buffers descriptor lists into one
Marek Olšák [Sat, 13 May 2017 12:01:27 +0000 (14:01 +0200)]
radeonsi: merge constant and shader buffers descriptor lists into one

Constant buffers: slot[16], .. slot[31] (ascending)
Shader buffers: slot[15], .. slot[0] (descending)

The idea is that if we have 4 constant buffers and 2 shader buffers, we only
have to upload 6 slots. That optimization is left for a later commit.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/u_threaded: add a fast path for unbinding shader buffers
Marek Olšák [Fri, 12 May 2017 19:38:12 +0000 (21:38 +0200)]
gallium/u_threaded: add a fast path for unbinding shader buffers

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/u_threaded: add a fast path for unbinding shader images
Marek Olšák [Fri, 12 May 2017 19:38:12 +0000 (21:38 +0200)]
gallium/u_threaded: add a fast path for unbinding shader images

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agost/mesa: silence a valgrind warning in u_threaded_context due to st_draw_vbo
Marek Olšák [Tue, 16 May 2017 08:56:08 +0000 (10:56 +0200)]
st/mesa: silence a valgrind warning in u_threaded_context due to st_draw_vbo

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoglsl_to_tgsi: declare all SSBOs and atomics when indirect indexing is used
Marek Olšák [Tue, 16 May 2017 22:26:06 +0000 (00:26 +0200)]
glsl_to_tgsi: declare all SSBOs and atomics when indirect indexing is used

Only the first array element was declared, so tgsi_shader_info::
shader_buffers_declared didn't match what the shader was using.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: get the sampler view type from inst->Texture for TG4
Samuel Pitoiset [Wed, 17 May 2017 08:55:51 +0000 (10:55 +0200)]
radeonsi: get the sampler view type from inst->Texture for TG4

This will also magically fix this special lowering for
bindless samplers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agotgsi: store the sampler view type directly in the instruction
Samuel Pitoiset [Wed, 17 May 2017 08:51:59 +0000 (10:51 +0200)]
tgsi: store the sampler view type directly in the instruction

RadeonSI needs to do a special lowering for Gather4 with integer
formats, but with bindless samplers we just can't access the index.

Instead, store the return type in the instruction like the target.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agotgsi: remove some unused OPCODE macros
Samuel Pitoiset [Wed, 17 May 2017 08:27:33 +0000 (10:27 +0200)]
tgsi: remove some unused OPCODE macros

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallivm: Make sure module has the correct data layout when pass manager runs
Tom Stellard [Fri, 5 May 2017 01:07:00 +0000 (01:07 +0000)]
gallivm: Make sure module has the correct data layout when pass manager runs

The datalayout for modules was purposely not being set in order to work around
the fact that the ExecutionEngine requires that the module's datalayout
matches the datalayout of the TargetMachine that the ExecutionEngine is
using.

When the pass manager runs on a module with no datalayout, it uses
the default datalayout which is little-endian.  This causes problems
on big-endian targets, because some optimizations that are legal on
little-endian or illegal on big-endian.

To resolve this, we set the datalayout prior to running the pass
manager, and then clear it before creating the ExectionEngine.

This patch fixes a lot of piglit tests on big-endian ppc64.

Cc: mesa-stable@lists.freedesktop.org
4 years agoegl: Partially revert 23c86c74, fix eglMakeCurrent
Chad Versace [Fri, 12 May 2017 04:49:14 +0000 (21:49 -0700)]
egl: Partially revert 23c86c74, fix eglMakeCurrent

Fixes regressions in Android CtsVerifier.apk on Intel Chrome OS devices
due to incorrect error handling in eglMakeCurrent. See below on how to
confirm the regression is fixed.

This partially reverts

    commit 23c86c74cc450a23848b85cfe914376caede1cdf
    Author:  Chad Versace <chadversary@chromium.org>
    Subject: egl: Emit error when EGLSurface is lost

The problem with commit 23c86c74 is that, once an EGLSurface became
lost, the app could never unbind the bad surface. Each attempt to unbind
the bad surface with eglMakeCurrent failed with EGL_BAD_CURRENT_SURFACE.

Specificaly, the bad commit added the error handling below. #2 and #3
were right, but #1 was wrong.

    1. eglMakeCurrent emits EGL_BAD_CURRENT_SURFACE if the calling
       thread has unflushed commands and either previous surface is no
       longer valid.

    2. eglMakeCurrent emits EGL_BAD_NATIVE_WINDOW if either new surface
       is no longer valid.

    3. eglSwapBuffers emits EGL_BAD_NATIVE_WINDOW if the swapped surface
       is no longer valid.

Whe I wrote the bad commit, I misunderstood the EGL spec language
for #1. The correct behavior is, if I understand correctly now, is
below. This patch doesn't implement the correct behavior, though, it
just reverts the broken behavior.

    - Assume a bound EGLSurface is no longer valid.
    - Assume the bound EGLContext has unflushed commands.
    - The app calls eglMakeCurrent. The spec requires eglMakeCurrent to
      implicitly flush. After flushing, eglMakeCurrent emits
      EGL_BAD_CURRENT_SURFACE and does *not* alter the thread's
      current bindings.
    - If the app calls eglMakeCurrent again, and the app inserts no
      commands into the GL command stream between the two eglMakeCurrent
      calls, then this second eglMakeCurrent succeeds without emitting an
      error.

How to confirm this fixes the regression:

    Download android-cts-verifier-7.1_r5-linux_x86-x86.zip from
    source.android.com, unpack, and `adb install CtsVerifier.apk`.
    Run test "Projection Cube". Click the Pass button (a
    green checkmark). Then run test "Projection Widget". Confirm that
    widgets are visible and that logcat does not complain about
    eglMakeCurrent failure.

    Then confirm there are no regressions in the cts-traded module that
    commit 263243b1 fixed:

        cts-tf > run cts --skip-preconditions --skip-device-info \
                 -m CtsCameraTestCases \
                 -t android.hardware.camera2.cts.RobustnessTest

    Tested with Chrome OS board "reef".

Fixes: 23c86c74 (egl: Emit error when EGLSurface is lost)
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Nicolas Boichat <drinkcat@chromium.org>
Cc: Emil Velikov <emil.velikov@collabora.com>
4 years agoanv: fix multiview for clear commands
Iago Toral Quiroga [Thu, 18 May 2017 06:23:38 +0000 (08:23 +0200)]
anv: fix multiview for clear commands

According to the VK_KHX_multiview spec:

"Multiview causes all drawing and clear commands in the subpass to
behave as if they were broadcast to each view, where each view is
represented by one layer of the framebuffer attachments."

This adds support for multiview clears, which were missing in the
initial implementation.

v2 (Jason):
  - split multiview from regular case
  - Use for_each_bit() macro

Fixes new CTS multiview tests:
dEQP-VK.multiview.clear_attachments.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoac: add missing extern "C" guards
Nicolai Hähnle [Sat, 13 May 2017 20:59:19 +0000 (22:59 +0200)]
ac: add missing extern "C" guards

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac: add radeon_info::num_{sdma,compute}_rings
Nicolai Hähnle [Thu, 11 May 2017 23:04:56 +0000 (01:04 +0200)]
ac: add radeon_info::num_{sdma,compute}_rings

Vulkan needs them.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac: add radeon_surf::htile_slice_size
Nicolai Hähnle [Wed, 10 May 2017 20:52:27 +0000 (22:52 +0200)]
ac: add radeon_surf::htile_slice_size

Vulkan needs it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac_surface: use radeon_info from ac_gpu_info
Nicolai Hähnle [Thu, 11 May 2017 23:24:48 +0000 (01:24 +0200)]
ac_surface: use radeon_info from ac_gpu_info

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/radeonsi: move radeon_info initialization to amd/common
Nicolai Hähnle [Thu, 11 May 2017 12:14:06 +0000 (14:14 +0200)]
ac/radeonsi: move radeon_info initialization to amd/common

v2: update Android.common.mk (Emil)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/radeonsi: move struct radeon_info to ac_gpu_info.h
Nicolai Hähnle [Thu, 11 May 2017 08:19:26 +0000 (10:19 +0200)]
ac/radeonsi: move struct radeon_info to ac_gpu_info.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/radeonsi: move some aspects of sanity checking to ac_surface
Nicolai Hähnle [Wed, 10 May 2017 18:44:51 +0000 (20:44 +0200)]
ac/radeonsi: move some aspects of sanity checking to ac_surface

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/radeonsi: add ac_compute_surface to automatically switch gfx6 vs. gfx9
Nicolai Hähnle [Wed, 10 May 2017 18:40:14 +0000 (20:40 +0200)]
ac/radeonsi: add ac_compute_surface to automatically switch gfx6 vs. gfx9

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/radeonsi: move the bulk of gfx9_surface_init to ac_surface
Nicolai Hähnle [Wed, 10 May 2017 18:36:03 +0000 (20:36 +0200)]
ac/radeonsi: move the bulk of gfx9_surface_init to ac_surface

We can now merge the two *_surface_init functions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/radeonsi: move the bulk of gfx6_surface_init to ac_surface
Nicolai Hähnle [Wed, 10 May 2017 18:21:36 +0000 (20:21 +0200)]
ac/radeonsi: move the bulk of gfx6_surface_init to ac_surface

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/radeonsi: move amdgpu_addr_create to ac_surface
Nicolai Hähnle [Wed, 10 May 2017 15:35:25 +0000 (17:35 +0200)]
ac/radeonsi: move amdgpu_addr_create to ac_surface

v2:
- update Android.common.mk (Emil)
- rebase on top of Raven support

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
4 years agoac/radeonsi: move surface definitions to new header ac_surface.h
Nicolai Hähnle [Wed, 10 May 2017 12:56:22 +0000 (14:56 +0200)]
ac/radeonsi: move surface definitions to new header ac_surface.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agost/mesa: remove an incorrect assertion
Nicolai Hähnle [Wed, 17 May 2017 13:14:35 +0000 (15:14 +0200)]
st/mesa: remove an incorrect assertion

There is really no reason why the current DrawBuffer needs to be complete
at this point. In particular, the assertion gets hit on the X server side
in libglx when running .../piglit/bin/glx-get-current-display-ext -auto
(which uses indirect GLX rendering).

Fixes: 19b61799e3d0 ("st/mesa: don't cast the incomplete framebufer to st_framebuffer")
Reported-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoi965/vec4: load dvec3/4 uniforms first in the push constant buffer
Samuel Iglesias Gonsálvez [Wed, 19 Apr 2017 09:18:35 +0000 (11:18 +0200)]
i965/vec4: load dvec3/4 uniforms first in the push constant buffer

Reorder the uniforms to load first the dvec4-aligned variables in the
push constant buffer and then push the vec4-aligned ones. It takes
into account that the relocated uniforms should be aligned to their
channel size.

This fixes a bug were the dvec3/4 might be loaded one part on a GRF and
the rest in next GRF, so the region parameters to read that could break
the HW rules.

v2:
- Fix broken logic.
- Add a comment to explain what should be needed to optimise the usage
  of the push constant buffer slots, as this patch does not pack the
  uniforms.

v3:
- Implemented the push constant buffer usage optimization.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
4 years agoi965/vec4: fix swizzle and writemask when loading an uniform with constant offset
Samuel Iglesias Gonsálvez [Wed, 19 Apr 2017 08:35:07 +0000 (10:35 +0200)]
i965/vec4: fix swizzle and writemask when loading an uniform with constant offset

It was setting XYWZ swizzle and writemask to all uniforms, no matter if they
were a vector or scalar, so this can lead to problems when loading them
to the push constant buffer.

Moreover, 'shift' calculation was designed to calculate the offset in
DWORDS, but it doesn't take into account DFs, so the calculated swizzle
for the later ones was wrong.

The indirect case is not changed because MOV INDIRECT will write
to all components. Added an assert to verify that these uniforms
are aligned.

v2:
- Fix 'shift' calculation (Curro)
- Set both swizzle and writemask.
- Add assert(shift == 0) for the indirect case.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
4 years agoi965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visi...
Samuel Iglesias Gonsálvez [Fri, 5 May 2017 08:42:15 +0000 (10:42 +0200)]
i965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visitor execution

We are going to add a packing feature to reduce the usage of the push
constant buffer. One of the consequences is that 'nr_params' would be
modified by vec4_visitor's run call, so we need to restore it if one of
them failed before executing the fallback ones. Same thing happens to the
uniforms values that would be reordered afterwards.

Fixes GL45-CTS.arrays_of_arrays_gl.InteractionFunctionCalls2 when
the dvec4 alignment and packing patch is applied.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Francisco Jerez <currojerez@riseup.net>
4 years agovc4: Don't allocate new BOs to avoid synchronization when they're shared.
Eric Anholt [Wed, 17 May 2017 20:22:39 +0000 (13:22 -0700)]
vc4: Don't allocate new BOs to avoid synchronization when they're shared.

If X11 did a software fallback to the entire screen, we would throw out
the BO the screen is scanning out from and allocate a new one.

Cc: mesa-stable@lists.freedesktop.org
4 years agovc4: Drop pointless indirections around BO import/export.
Eric Anholt [Mon, 8 May 2017 23:46:59 +0000 (16:46 -0700)]
vc4: Drop pointless indirections around BO import/export.

I've since found them to be more confusing by adding indirections than
clarifying by screening off resources from the handle/fd import/export
process.

4 years agovc4: Drop the u_resource_vtbl no-op layer.
Eric Anholt [Mon, 8 May 2017 23:43:06 +0000 (16:43 -0700)]
vc4: Drop the u_resource_vtbl no-op layer.

We only ever attached one vtbl, so it was a waste of space and
indirections.

4 years agogallium/radeon: use a top-of-pipe timestamp for the start of TIME_ELAPSED
Marek Olšák [Mon, 15 May 2017 15:27:25 +0000 (17:27 +0200)]
gallium/radeon: use a top-of-pipe timestamp for the start of TIME_ELAPSED

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: don't check mapped buffers in every draw call if drivers allow it
Marek Olšák [Mon, 15 May 2017 14:34:06 +0000 (16:34 +0200)]
mesa: don't check mapped buffers in every draw call if drivers allow it

Before: DrawElements (16 VBOs) w/ no state change: 4.34 million/s
After:  DrawElements (16 VBOs) w/ no state change: 8.80 million/s

This inefficiency was uncovered by Timothy Arceri's no_error work.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add gl_constants::AllowMappedBuffersDuringExecution
Marek Olšák [Mon, 15 May 2017 14:30:30 +0000 (16:30 +0200)]
mesa: add gl_constants::AllowMappedBuffersDuringExecution

for skipping mapped-buffer checking in every GL draw call

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION
Marek Olšák [Mon, 15 May 2017 14:30:30 +0000 (16:30 +0200)]
gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION

for skipping mapped-buffer checking in every GL draw call

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoglxglvnddispatch: Add missing dispatch for GetDriverConfig
Hans de Goede [Mon, 20 Mar 2017 07:41:26 +0000 (08:41 +0100)]
glxglvnddispatch: Add missing dispatch for GetDriverConfig

Together with some fixes to xdriinfo this fixes xdriinfo not working
with glvnd.

Since apps (xdriinfo) expect GetDriverConfig to work without going to
need through the dance to setup a glxcontext (which is a reasonable
expectation IMHO), the dispatch for this ends up significantly different
then any other dispatch function.

This patch gets the job done, but I'm not really happy with how this
patch turned out, suggestions for a better fix are welcome.

Cc: Kyle Brenneman <kbrenneman@nvidia.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agoswr: don't use AttributeSet with llvm >= 5
Tim Rowley [Thu, 11 May 2017 15:56:20 +0000 (10:56 -0500)]
swr: don't use AttributeSet with llvm >= 5

This change fixes the build break with llvm-svn.

r301981 of llvm-svn made add/remove of function attributes
use AttrBuilder instead of AttributeList.

Tested with llvm-3.9, llvm-4.0, llvm-svn.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoAndroid: correct libz dependency
Chih-Wei Huang [Wed, 17 May 2017 05:10:02 +0000 (13:10 +0800)]
Android: correct libz dependency

Commit 6facb0c0 ("android: fix libz dynamic library dependencies")
unconditionally adds libz as a dependency to all shared libraries.
That is unnecessary.

Commit 85a9b1b5 introduced libz as a dependency to libmesa_util.
So only the shared libraries that use libmesa_util need libz.

Fix Android Lollipop build by adding the include path of zlib to
libmesa_util explicitly instead of getting the path implicitly
from zlib since it doesn't export the include path in Lollipop.

Fixes: 6facb0c0 "android: fix libz dynamic library dependencies"
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
4 years agomesa: add KHR_no_error support for glDispatchCompute*()
Timothy Arceri [Mon, 15 May 2017 02:28:08 +0000 (12:28 +1000)]
mesa: add KHR_no_error support for glDispatchCompute*()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add DispatchCompute* helpers
Timothy Arceri [Mon, 15 May 2017 02:13:01 +0000 (12:13 +1000)]
mesa: add DispatchCompute* helpers

These will be used to add KHR_no_error support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: move FLUSH_CURRENT() calls out of DispatchCompute*() validation
Timothy Arceri [Mon, 15 May 2017 01:22:25 +0000 (11:22 +1000)]
mesa: move FLUSH_CURRENT() calls out of DispatchCompute*() validation

This is required to add KHR_no_error support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: compute.c C99 tidy up
Timothy Arceri [Mon, 15 May 2017 01:12:13 +0000 (11:12 +1000)]
mesa: compute.c C99 tidy up

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: move DispatchCompute() validation to compute.c
Timothy Arceri [Mon, 15 May 2017 01:08:13 +0000 (11:08 +1000)]
mesa: move DispatchCompute() validation to compute.c

This is the only place it is used so there is no reason for it to be
in api_validate.c

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glBlendEquationSeparateiARB()
Timothy Arceri [Mon, 15 May 2017 00:51:34 +0000 (10:51 +1000)]
mesa: add KHR_no_error support for glBlendEquationSeparateiARB()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add blend_equation_separatei() helper
Timothy Arceri [Mon, 15 May 2017 00:48:17 +0000 (10:48 +1000)]
mesa: add blend_equation_separatei() helper

Will be used to add KHR_no_error support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glBlendFunc*iARB()
Timothy Arceri [Mon, 15 May 2017 00:41:23 +0000 (10:41 +1000)]
mesa: add KHR_no_error support for glBlendFunc*iARB()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add blend_func_separatei() helper
Timothy Arceri [Mon, 15 May 2017 00:31:38 +0000 (10:31 +1000)]
mesa: add blend_func_separatei() helper

This will be used to add KHR_no_error support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glBufferSubData()
Timothy Arceri [Fri, 12 May 2017 11:36:25 +0000 (21:36 +1000)]
mesa: add KHR_no_error support for glBufferSubData()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glNamedBufferSubData()
Timothy Arceri [Fri, 12 May 2017 11:29:11 +0000 (21:29 +1000)]
mesa: add KHR_no_error support for glNamedBufferSubData()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add buffer_sub_data() helper
Timothy Arceri [Fri, 12 May 2017 11:21:38 +0000 (21:21 +1000)]
mesa: add buffer_sub_data() helper

This will allow us to share code between the dsa, non-dsa and
no_error variants.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: create validate_buffer_sub_data() helper
Timothy Arceri [Fri, 12 May 2017 07:10:10 +0000 (17:10 +1000)]
mesa: create validate_buffer_sub_data() helper

This change assumes meta will always pass valid arguments to
_mesa_buffer_sub_data().

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glBufferStorage()
Timothy Arceri [Fri, 12 May 2017 06:51:24 +0000 (16:51 +1000)]
mesa: add KHR_no_error support for glBufferStorage()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glNamedBufferStorage()
Timothy Arceri [Fri, 12 May 2017 06:43:30 +0000 (16:43 +1000)]
mesa: add KHR_no_error support for glNamedBufferStorage()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add inlined_buffer_storage() helper
Timothy Arceri [Fri, 12 May 2017 06:31:01 +0000 (16:31 +1000)]
mesa: add inlined_buffer_storage() helper

This will allow us to share code between the dsa, non-dsa and
no_error variants.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add validate_buffer_storage() helper
Timothy Arceri [Fri, 12 May 2017 05:41:22 +0000 (15:41 +1000)]
mesa: add validate_buffer_storage() helper

This will allow use to add KHR_no_error support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glCompressedTex*SubImage3D()
Timothy Arceri [Fri, 12 May 2017 00:47:14 +0000 (10:47 +1000)]
mesa: add KHR_no_error support for glCompressedTex*SubImage3D()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add 3D support to compressed_tex_sub_image() helper
Timothy Arceri [Fri, 12 May 2017 00:36:54 +0000 (10:36 +1000)]
mesa: add 3D support to compressed_tex_sub_image() helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glCompressedTex*SubImage2D()
Timothy Arceri [Thu, 11 May 2017 12:16:07 +0000 (22:16 +1000)]
mesa: add KHR_no_error support for glCompressedTex*SubImage2D()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add 2D support to compressed_tex_sub_image() helper
Timothy Arceri [Thu, 11 May 2017 07:14:06 +0000 (17:14 +1000)]
mesa: add 2D support to compressed_tex_sub_image() helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for CompressedTex*SubImage1D()
Timothy Arceri [Wed, 10 May 2017 07:20:10 +0000 (17:20 +1000)]
mesa: add KHR_no_error support for CompressedTex*SubImage1D()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add compressed_tex_sub_image() helper
Timothy Arceri [Wed, 10 May 2017 07:07:32 +0000 (17:07 +1000)]
mesa: add compressed_tex_sub_image() helper

This reduces duplication between the dsa and non-dsa function
and will also be used in the following commit to add
KHR_no_error support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: make _mesa_compressed_texture_sub_image() static
Timothy Arceri [Wed, 10 May 2017 05:22:40 +0000 (15:22 +1000)]
mesa: make _mesa_compressed_texture_sub_image() static

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for NamedFramebufferTexture
Timothy Arceri [Mon, 8 May 2017 02:01:33 +0000 (12:01 +1000)]
mesa: add KHR_no_error support for NamedFramebufferTexture

V3: use frame_buffer_texture() helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for FramebufferTexture
Timothy Arceri [Mon, 8 May 2017 01:52:45 +0000 (11:52 +1000)]
mesa: add KHR_no_error support for FramebufferTexture

V3: use the frame_buffer_texture() helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add *FramebufferTexture() support to frame_buffer_texture helper
Timothy Arceri [Wed, 10 May 2017 01:44:54 +0000 (11:44 +1000)]
mesa: add *FramebufferTexture() support to frame_buffer_texture helper

V2: call check_layered_texture_target() even for no_error

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for NamedFramebufferTextureLayer
Timothy Arceri [Mon, 8 May 2017 01:37:33 +0000 (11:37 +1000)]
mesa: add KHR_no_error support for NamedFramebufferTextureLayer

v3: use frame_buffer_texture_layer() helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for FramebufferTextureLayer
Timothy Arceri [Mon, 8 May 2017 01:24:07 +0000 (11:24 +1000)]
mesa: add KHR_no_error support for FramebufferTextureLayer

V3: use frame_buffer_texture_layer() helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add no error support to frame_buffer_texture_layer() helper
Timothy Arceri [Thu, 11 May 2017 05:43:44 +0000 (15:43 +1000)]
mesa: add no error support to frame_buffer_texture_layer() helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add frame_buffer_texture_layer() helper
Timothy Arceri [Wed, 10 May 2017 01:22:47 +0000 (11:22 +1000)]
mesa: add frame_buffer_texture_layer() helper

To be used to add KHR_no_error support while sharing code between
the DSA and non-DSA OpenGL function.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: add KHR_no_error support for glUseProgram
Timothy Arceri [Wed, 3 May 2017 06:40:39 +0000 (16:40 +1000)]
mesa: add KHR_no_error support for glUseProgram

V3: use always_inline attribute (Suggested by Nicolai)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa: move use_program() inside _mesa_use_program()
Timothy Arceri [Thu, 11 May 2017 04:59:41 +0000 (14:59 +1000)]
mesa: move use_program() inside _mesa_use_program()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agointel/isl/gen6: Fix combined depth stencil alignment
Jason Ekstrand [Mon, 15 May 2017 20:51:13 +0000 (13:51 -0700)]
intel/isl/gen6: Fix combined depth stencil alignment

All combined depth stencil buffers (even those with just stencil)
require a 4x4 alignment on Sandy Bridge.  The only depth/stencil buffer
type that requires 4x2 is separate stencil.

Reviewed-by: Chad Versace <chadversary@chromium.org>
4 years agointel/isl: Refactor gen8_choose_image_alignment_el
Jason Ekstrand [Wed, 10 May 2017 19:29:04 +0000 (12:29 -0700)]
intel/isl: Refactor gen8_choose_image_alignment_el

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
4 years agointel/isl: Refactor gen6_choose_image_alignment_el
Jason Ekstrand [Wed, 10 May 2017 19:15:01 +0000 (12:15 -0700)]
intel/isl: Refactor gen6_choose_image_alignment_el

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
4 years agointel/isl: Refactor gen7_choose_image_alignment_el
Jason Ekstrand [Tue, 9 May 2017 16:50:21 +0000 (09:50 -0700)]
intel/isl: Refactor gen7_choose_image_alignment_el

The Ivy Bridge PRM provides a nice table that handles most of the
alignment cases in one place.  For standard color buffers we have a
little freedom of choice but for most depth, stencil and compressed it's
hard-coded.  Chad's original functions split halign and valign apart and
implemented them almost entirely based on restrictions and not the
table.  This makes things way more confusing than they need to be.  This
commit gets rid of the split and makes us implement the exact table
up-front.  If our surface isn't one of the ones in the table then we
have to make real choices.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
4 years agointel/isl/gen7: Use stencil vertical alignment of 8 instead of 4
Pohjolainen, Topi [Wed, 3 May 2017 09:22:50 +0000 (12:22 +0300)]
intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4

The reasoning Chad gave in the comment for choosing a valign of 4 is
entirely bunk.  The fact that you have to multiply pitch by 2 is
completely unrelated to the halign/valign parameters used for texture
layout.  (Not completely unrelated.  W-tiling is just Y-tiling with a
bit of extra swizzling which turns 8x8 W-tiled chunks into 16x4 y-tiled
chunks so it makes everything easier if miplevels are always aligned to
8x8.)  The fact that RENDER_SURFACE_STATE::SurfaceVerticalAlignmet
doesn't have a VALIGN_8 option doesn't matter since this is gen7 and you
can't do stencil texturing anyway.

v2 (Jason Ekstrand):
 - Delete most of Chad's comment and add a more descriptive commit
   message.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
4 years agofreedreno/gmem: fix hw binning hangs with large render targets
Rob Clark [Tue, 16 May 2017 12:37:50 +0000 (08:37 -0400)]
freedreno/gmem: fix hw binning hangs with large render targets

On all 3 gens, we have 4 bits for width and height in the VSC pipe
config.  And overflow results in setting width and/or height to zero
which causes hangs.

Signed-off-by: Rob Clark <robdclark@gmail.com>
4 years agofreedreno/ir3: fix crash with atomics
Rob Clark [Mon, 15 May 2017 20:42:15 +0000 (16:42 -0400)]
freedreno/ir3: fix crash with atomics

Atomics can have a result value.  And sometimes it is even used.

Signed-off-by: Rob Clark <robdclark@gmail.com>
4 years agomesa/st: fix yuv EGLImage's
Rob Clark [Tue, 16 May 2017 14:29:44 +0000 (10:29 -0400)]
mesa/st: fix yuv EGLImage's

Don't reject YUV formats that the driver doesn't handle natively, since
mesa/st already knows how to lower this in shader.

Reported-by: Nicolas Dechesne <ndec@linaro.org>
Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling")
Cc: 17.1 <mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@gmail.com>
Tested-by: Nicolas Dechesne <ndec@linaro.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agottn: fix dest size for some texture instructions
Rob Clark [Mon, 15 May 2017 17:31:44 +0000 (13:31 -0400)]
ttn: fix dest size for some texture instructions

Some, like lod, don't return 4 components.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agottn: fix txd src sizes
Rob Clark [Mon, 15 May 2017 17:24:34 +0000 (13:24 -0400)]
ttn: fix txd src sizes

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agottn: fix txs dest size
Rob Clark [Mon, 15 May 2017 17:03:44 +0000 (13:03 -0400)]
ttn: fix txs dest size

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agofreedreno/a5xx: remove unneeded assert
Rob Clark [Mon, 15 May 2017 18:08:16 +0000 (14:08 -0400)]
freedreno/a5xx: remove unneeded assert

Signed-off-by: Rob Clark <robdclark@gmail.com>
4 years agofreedreno/a5xx: fallback to slow-clear for z32
Rob Clark [Mon, 15 May 2017 16:36:24 +0000 (12:36 -0400)]
freedreno/a5xx: fallback to slow-clear for z32

We probably *could* do this with blit path, but I think it would involve
clobbering settings from batch->gmem (see emit_zs()).

Signed-off-by: Rob Clark <robdclark@gmail.com>
4 years agoetnaviv: increment the resource seqno in resource_changed
Philipp Zabel [Wed, 10 May 2017 16:01:08 +0000 (18:01 +0200)]
etnaviv: increment the resource seqno in resource_changed

Just increment the resource seqno instead of setting the texture
seqno to be lower by one than the resource seqno.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>