gallium: remove TGSI opcode BREAKC

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium: remove TGSI opcode XPD

use MUL+MAD+MOV instead.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium: remove TGSI opcode DPH

use DP4 or DP3 + ADD.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium: remove TGSI opcode DP2A

use DP3 instead.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium: remove TGSI_OPCODE_CALLNZ

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium: remove TGSI FENCE opcodes

use MEMBAR instead

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium: remove TGSI opcodes PUSHA, POPA, SAD, TXQ_LZ

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

radeonsi: emit VGT_REUSE_OFF in the right place

clip_regs aren't marked dirty when writes_viewport_index is changed.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add support for TGSI opcodes DCEIL, DFLR, DROUND, DSSG, DTRUNC

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use a faster version of PK2H

+ 4 piglit regressions, but it's correct accorcing to the GL spec and
performance is more important than piglit.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: don't decompress Z/S if there is no HTILE

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: add helpers for whether HTILE is enabled

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: don't flush L2 metadata for DB if not needed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: don't flush L2 metadata for CB if not needed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: don't flush TC L2 between rendering and texturing if not needed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: use correct TC flush flags when invalidating CB & DB

Now we can finally stop flushing L2 data.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/surface/gfx9: don't allow DCC for the smallest mipmap levels

This fixes garbage there if we don't flush TC L2 after rendering.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: don't use GS scenario A for VS writing ViewportIndex

Vulkan doesn't do it anymore.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: clean up EOP_DATA_SEL magic numbers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: set 'not a query' for r600_gfx_write_event_eop correctly

0 is PIPE_QUERY_OCCLUSION_COUNTER, which is not what we want.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: prevent shader-db crashes

- don't precompile LS and ES (they don't exist on GFX9), compile as VS instead
- don't precompile HS and GS (we don't have LS and ES parts)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: properly handle imported textures with unexpected swizzle mode

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove Constant Engine support

We have come to the conclusion that it doesn't improve performance.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add a temporary workaround for a tessellation driver bug

The workaround will do for now. The root cause is still unknown.

This fixes new piglit: 16in-1out

Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl_to_tgsi: clean up opcode translation

An island of beauty in the middle of chaos.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: pass ctx to add_uniform_to_shader constructor

Fixes: 4c2422067b5c ("glsl: pass UseSTD430AsDefaultPacking to where it will be used")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

egl: deduplicate allocations of local buffer over each platform backend (v2)

platform_drm, platform_wayland and platform_android have similiar local buffer
allocation routines. For deduplicating, it unifies dri2_egl_surface's
local buffer allocation routines. And it polishes inconsistent indentations.

Note that as dri2_wl_get_buffers_with_format() have not make a __DRI_BUFFER_BACK_LEFT
attachment buffer for local_buffers, new helper function, dri2_egl_surface_free_local_buffers(),
will drop the __DRI_BUFFER_BACK_LEFT check.
So if other platforms use new helper functions, we have to ensure not to make
__DRI_BUFFER_BACK_LEFT attachment buffer for local_buffers.

v2: Fixes from Emil's review:
   a) Make local_buffers variable, dri2_egl_surface_alloc_local_buffer() and
      dri2_egl_surface_free_local_buffers() unconditionally.
   b) Preserve the original codeflow for error_path and normal_path.
   c) Add note on commit messages for dropping of __DRI_BUFFER_BACK_LEFT check.
   c) Rollback the unrelated whitespace changes.
   d) Add a missing blank line.

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>

mesa: only expose EXT_memory_object functions if the ext is supported

They should not be exposed when the extension is unsupported.
Note that ARB_direct_state_access is always exposed and
EXT_semaphore is not supported at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: only expose glImportMemoryFdEXT if the ext is supported

From the EXT_external_objects_fd spec:

   "If the GL_EXT_memory_object_fd string is reported, the following
    commands are added:

    void ImportMemoryFdEXT(uint memory,
                           uint64 size,
                           enum handleType,
                           int fd);"

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: try to re-use previously deleted bindless descriptor slots

Currently, when the array is full it is resized but it can grow
over and over because we don't try to re-use descriptor slots.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: use slot indexes for bindless handles

Using VRAM address as bindless handles is not a good idea because
we have to use LLVMIntToPTr and the LLVM CSE pass can't optimize
because it has no information about the pointer.

Instead, use slots indexes like the existing descriptors. Note
that we use fixed 16-dword slots for both samplers and images.
This doesn't really matter because no real apps use image handles.

This improves performance with DOW3 by +7%.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: add si_emit_global_shader_pointers() helper

To share common code between rw buffers and bindless descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: only initialize dirty_mask when CE is used

Looks like it's useless to initialize that field when CE is
unused. This will also allow to declare more than 64 elements
for the array of bindless descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: make some si_descriptors fields 32-bit

The number of bindless descriptors is dynamic and we definitely
have to support more than 256 slots.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: declare new user SGPR indices for bindless samplers/images

A new pair of user SGPR is needed for loading the bindless
descriptors from shaders. Because the descriptors are global for
all stages, there is no need to add separate indices for GFX9.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/util: add new module that allocate "numbers"

Will be used for allocating bindless descriptor slots for
RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi/gfx9: add performance counters

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: extract common code of si_upload_{graphics,compute}_shader_descriptors

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium: remove unused PIPE_DUMP_* defines

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ddebug: remove dd_draw_record::driver_state_log

It is no longer used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: emit string markers to log context

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: log decompress blits

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: log draw and compute state into log context

Also add missing trace emits and CS logging for compute launches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: print saved CS to the log context

Use the auto logger facility, so that CS chunks will be interleaved
with other log info.

v2:
- fix some crashes when not using CE
- fix skipping "previous" chunks of current (unflushed) IB
- fix error handling in si_begin_cs_debug

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: start using u_log_context for debugging

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: re-order debug state dumping

Keep together the parts that won't use the deferred logging mechanism.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: make si_shader_selector_reference globally visible

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: add reference count to si_compute

To allow keep-alive for deferred logging.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: implement pipe_context::set_log_context

We'll add radeonsi-specific code to set_log_context in later patches,
but we may want to log from common code. Hence keep the log pointer
in r600_common_context.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

amd/common: split out ac_parse_ib_chunk from ac_parse_ib

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ddebug: add driver log to record dumps

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium: add pipe_context::set_log_context

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

util/log: add auto logger facility

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

util: add chunk logging module

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl/linker: Make several functions not static

copy_constant_to_storage, set_uniform_initializer,
populate_consumer_input_sets, and get_matching_input are all used by
tests in src/compiler/glsl/tests:

glsl/tests/varyings_test.o: In function `link_varyings_single_simple_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:131: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_gl_ClipDistance_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:159: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_gl_CullDistance_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:186: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_single_interface_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:208: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_one_interface_and_one_simple_input_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:241: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o:src/compiler/glsl/tests/varyings_test.cpp:272: more undefined references to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)' follow
glsl/tests/varyings_test.o: In function `link_varyings_interface_field_doesnt_match_noninterface_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:289: undefined reference to `linker::get_matching_input(void*, ir_variable const*, hash_table*, hash_table*, ir_variable**)'
glsl/tests/varyings_test.o: In function `link_varyings_interface_field_doesnt_match_noninterface_vice_versa_Test::TestBody()':
src/compiler/glsl/tests/varyings_test.cpp:314: undefined reference to `linker::populate_consumer_input_sets(void*, exec_list*, hash_table*, hash_table*, ir_variable**)'
src/compiler/glsl/tests/varyings_test.cpp:328: undefined reference to `linker::get_matching_input(void*, ir_variable const*, hash_table*, hash_table*, ir_variable**)'

Fixes: ca73c3358c91 ("glsl: Mark functions static")
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/clear: Quantize the depth clear value based on the format

In f9fd976e8adba733b08d we changed the clear value to be stored as an
isl_color_value.  This had the side-effect same clear value check is now
happening directly between the f32[0] field of the isl_color_value and
ctx->Depth.Clear.  This isn't what we want for two reasons.  One is that
the comparison happens in floating point even for Z16 and Z24 formats.
Worse than that, ctx->Depth.Clear is a double so, even for 32-bit float
formats, we were comparing as doubles and not floats.  This means that
the test basically always fails for anything other than 0.0f and 1.0f.
This caused a slight performance regression in Lightsmark 2008 because
it was using a depth clear value of 0.999 which can't be stored in a
32-bit float so we were doing unneeded resolves.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/101678
Cc: "17.2" <mesa-stable@lists.freedesktop.org>

mesa/st: simplify some UBO index logic

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

i965: enable STD430 packing by default on IVB+

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

glsl: pass UseSTD430AsDefaultPacking to where it will be used

Here we also make use of the UseSTD430AsDefaultPacking constant
and call the new get_internal_ifc_packing() helper.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: add get_internal_ifc_packing() type helper

This is used to avoid code duplication when selecting the
packing type for shared and packed layouts.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: add UseSTD430AsDefaultPacking constant

This will be used to enable the STD430 layout as the default for
UBOs and SSBOs with layouts of shared/packed rather than STD140.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

clover/device: Calculate CL_DEVICE_MEM_BASE_ADDR_ALIGN in device

The CL CTS queries CL_DEVICE_MEM_BASE_ADDR_ALIGN for a device and
then allocates user pointers aligned to that value for its tests.

The minimum value is defined as:
  the size (in bits) of the largest OpenCL built-in data type supported
  by the device (long16 in FULL profile, long16 or int16 in EMBEDDED
  profile) for devices that are not of type CL_DEVICE_TYPE_CUSTOM.

At the moment, all known devices that support user pointers require
CPU page alignment for buffers created from user pointers, so just
query that from sysconf.

v3: Use std::max instead of MAX2 (Francisco)
    Add missing unistd include
v2: Use system page size instead of a new pipe cap

Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by (v2): Jan Vesely <jan.vesely@rutgers.edu>

mesa: optimize _mesa_attr_zero_aliases_vertex()

After the context is initialized, the API and context flags won't
change.  So, we can compute whether vertex attribute 0 aliases
vertex position just once.

This should make the glVertexAttrib*() functions a little quicker.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

vbo: use new _is_vertex_position() helper in vbo_attrib_tmp.h

Makes the code a bit more understandable.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

vbo: make vbo_bind_arrays() static

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

svga: replace gotos with conditionals in array drawing code

No Piglit regressions.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

llvmpipe: add some whitespace between functions in lp_texture.c

Trivial.

mesa: formatting clean-up in syncobj.c

Line wrap to 78 columns, etc.  Trivial.

svga: whitespace clean-up in svga_draw_private.h

Trivial.

docs: remove link to MissingFunctionality wiki page

Outdated, features.txt is used instead.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

docs: remove MSVC testing/building from help wanted

We are using appveyor for Windows continuous integration.

https://ci.appveyor.com/project/mesa3d/mesa

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

docs: remove automatic testing from help wanted

Intel has a Jenkins setup and has made the various scripts and
documentation open source.

https://github.com/janesma/mesa_jenkins

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

docs: rename TODOs to Legacy Driver TODOs

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

docs: remove link to i915g TODOs

This is an unoffical unmaintained driver, we don't really want
people wasting effort trying to improve it.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

docs: remove link to radeonsi TODO wiki page

This page is deprecated.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

gallium/docs: remove old llvmpipe TODO

Features are already covered by features.txt like all the other
drivers.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

mesa: fix ES only draw if we have vertex positions

This code was separated from the validation code so it could
use used with KHR_no_error paths. The return values were inverted
to reflect the name of the helper, but here the condtion was
mistakenly inverted rather than the return value.

Fixes: 4df2931a87fe (mesa/vbo: move some Draw checks out of validation)
Reported-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: Add prototype for udivmod64()

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: Mark functions static

Cuts 3224 bytes of .text

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Mark functions static

Cuts 300 bytes of .text

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965/vec4: Use 'class' src_reg, rather than 'struct' src_reg

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965/vec4: Return float from spill_cost_for_type()

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

anv: Move clamp_int64() inside the IVB check

It's only used in the gen7_cmd_buffer_emit_scissor() function.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: Remove unused private fields

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

mesa: Don't compare unsigned for < 0

The INTEL_performance_query spec says

   "Performance counter id 0 is reserved as an invalid counter."

GLuint counterid_to_index(GLuint counterid) just returns counterid - 1,
so with unsigned overflow rules, it will generate 0xFFFFFFFF given an
input of 0. 0xFFFFFFFF will trigger the counterIndex >= queryNumCounters
check, so the code worked as is. It just contained a useless comparison.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

egl: Fix inclusion of egl.h+mesa_glinterop.h

Previously clang would warn about redefinition of typedef EGLDisplay. Avoid
this by adding preprocessor guards to mesa_glinterop.h and including it
after EGL.h is indirectly included.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

radeonsi: don't prefetch VBO descriptors if vertex elements == NULL

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: don't set up and don't call the fetch shader if there are no VS inputs

i965: Optimize reading the destination type

brw_hw_type_to_reg_type() needs to know only whether the file is
BRW_IMMEDIATE_VALUE or not, which is not a valid file for the
destination. gcc and clang will evaluate __builtin_strcmp() at compile
time, so we can use it to pass a constant file for the destination.

   text    data     bss     dec     hex filename
7816214  346248  420496 8582958  82f72e i965_dri.so before
7816070  346248  420496 8582814  82f69e i965_dri.so after

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Mark brw_hw_type_to_reg_type() as a pure function

   text    data     bss     dec     hex filename
7816886  346248  420496 8583630  82f9ce i965_dri.so before
7816214  346248  420496 8582958  82f72e i965_dri.so after

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Hide the register type hardware encodings

So we stop mixing them with the logical enum.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Stop using hardware register types directly

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Add brw_hw_reg_type_to_letters() and use it in brw_disasm.c

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Move brw_reg_type_letters() as well

And add "to_" to the name for consistency with the other functions in
this file.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Switch to using the logical register types

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Add functions to abstract access to register types

Previously the brw_inst{,_set}_{dst,src0,src1}_reg_type() functions
provided access to the hardware encodings for the register types. We
often mixed these with the logical BRW_REGISTER_TYPE_* enums (which
themselves used to be the hardware format!) with bad results.

With that functionality now available with the hw_ versions (see
previous commit), we now add functions that take the logical
BRW_REGISTER_TYPE_* enums and convert into the hardware format and vice
versa. To do the conversion we also have to provide the file.

Note the asymmetry between the two functions: the new getter reads the
file from the instruction word, and to ensure that is always set the
setter writes both the file and the type.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Rename brw_inst's functions that access the register type

Put hw_ in the name so that it's clear these are the hardware encodings.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Index brw_hw_reg_type_to_size()'s table by logical type

I'll be transitioning everything to use the logical types.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Add a brw_hw_type_to_reg_type() function

Will be used in later commits.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Use a common table to translate logical to hardware types

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>