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i965/skl: Add two missing device IDs
2016-02-18 Ben Widawskyi965/skl: Add two missing device IDs
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-02-15 Ben Widawskyi965/bxt: Production thread counts
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-02-13 Ben Widawskyi965: Rename optimizer debug 00 filename
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-02-11 Chris Forbesi965: ir: dump floats as %-g rather than %f, so we...
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-02-10 Ben Widawskyi965: Make sure we blit a full compressed block
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-02-02 Jordan Justeni965/gen8: Initialize aux_mode to GEN8_SURFACE_AUX_MODE_NONE
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-01-28 Ben Widawskyi965/skl: Utilize new 5th bit for gateway messages
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-01-25 Ben Widawskyi965/bxt: Fix conservative wm thread counts.
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-01-22 Ben Widawskyi965/fs: Remove unused count from vs urb setup
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2016-01-14 Ben Widawskyi965: Remove unused hw_must_use_separate_stencil
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-12-21 Ben Widawskyi965: Only apply CS stall workaround pre-SKL
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-11-20 Ben Widawskyi965/gen9: Support fast clears for 32b float
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2015-11-20 Ben WidawskyRevert "i965/gen9: Enable rep clears on gen9"
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2015-11-20 Ben WidawskyRevert "i965/gen9: Disable MCS for 1x color surfaces"
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2015-11-20 Ben Widawskyi965/meta/gen9: Individually fast clear color attachments
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2015-11-20 Ben Widawskyi965/skl: skip fast clears for certain surface formats
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2015-11-20 Ben Widawskyi965: Add lossless compression to surface format table
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-11-20 Ben Widawskyi965/skl: Add fast color clear infrastructure
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2015-11-17 Ben Widawskyi965: Add assertion for src_stencil payload size
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-11-12 Ben Widawskyi965/skl/gt4: Fix URB programming restriction.
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2015-11-04 Ben Widawskyi965/meta: Assert fast clears and rep clears never...
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2015-11-03 Ben Widawskyi965/gen8+: Extract color clear surface state
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2015-11-03 Ben Widawskyi965/gen8+: Remove redundant zeroing of surface state
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2015-11-03 Ben Widawskyi965/skl: PCI ID cleanup and brand strings
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-11-03 Ben Widawskyi965/skl: Add GT4 PCI IDs
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-10-24 Ben Widawskyi965: Remove unused devinfo revision
Author: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-10-22 Ben Widawskyi965: Advertise ARB_shader_stencil_export (gen9+)
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2015-10-22 Ben Widawskyi965: Implement ARB_shader_stencil_export (gen9+)
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2015-10-22 Ben Widawskyi965/fs: Enumerate logical fb writes arguments
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2015-10-21 Ben Widawskyi965: (trivial) rename computes stencil to gen9
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2015-10-21 Ben Widawskyi965: Correct the comment about fb write payload
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2015-09-21 Ben Widawskyi965/skl: Use larger URB size where available.
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2015-09-08 Ben Widawskyi965/gen8+: Skip depth stalls on state change
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2015-09-08 Ben Widawskyi965/skl: Use more compact hiz dimensions
Author: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-09-04 Ben Widawskyi965: Remove base miplevel from sampler state.
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2015-09-03 Ben Widawskyi965/gen9: Annotate input coverage mask change
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2015-08-23 Neil Robertsi965/bdw: Fix 3DSTATE_VF_INSTANCING when the edge flag...
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2015-08-23 Neil Robertsi965: Swap the order of the vertex ID and edge flag...
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2015-08-19 Neil Robertsi965/bdw: Fix setting the instancing state for the...
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2015-08-18 Neil RobertsAdd mesa.icd to the .gitignore
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2015-08-13 Ben Widawskyi965/skl: Remove early platform support
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2015-08-07 Ben Widawskyi965/skl: (trivial) Remove invalid comment about thread...
Author: Ben Widawsky <benjamin.widawsky@intel.com>
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2015-07-31 Ben Widawskyi965/gen9: Add hs, ds, and cs thread + urb info
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2015-07-31 Ben Widawskyi965/bxt: Use more conservative thread counts
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2015-07-31 Ben Widawskyi965/skl: Add production thread counts and URB size
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2015-07-29 Ben Widawskyi965/bxt: Support 3src simd16 instructions
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2015-07-17 Ben Widawskyi965: Push miptree tiling request into flags
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2015-07-16 Ben WidawskyRevert "i965: Push miptree tiling request into flags"
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2015-07-16 Ben Widawskyi965: Push miptree tiling request into flags
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2015-07-09 Ben Widawskyi965/hsw: Implement end of batch workaround
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2015-06-25 Ben Widawskyi965/skl: Use more compact hiz dimensions
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2015-06-24 Ben Widawskyi965/bxt: Add basic Broxton infrastructure
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2015-06-23 Ben Widawskyi965/gen9: Don't use encrypted MOCS
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2015-06-22 Ben Widawskyi965/gen9: Implement Push Constant Buffer workaround
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2015-06-19 Ben Widawskyi965/gen8: Use HALIGN_16 for single sample mcs buffers
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2015-06-13 Ben Widawskyi965/gen8+: Add aux buffer alignment assertions
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2015-06-13 Ben Widawskyi965/gen9: Set HALIGN_16 for all aux buffers
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2015-06-13 Ben Widawskyi965/gen8: Correct HALIGN for AUX surfaces
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2015-06-13 Ben Widawskyi965: Extract tiling from fast clear decision
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2015-06-13 Ben Widawskyi965/gen9: Only allow Y-Tiled MCS buffers
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2015-06-13 Ben Widawskyi965: Consolidate certain miptree params to flags
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2015-06-09 Ben Widawskyi965/gen9: Use raw PS invocation count for queries
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2015-06-05 Ben Widawskyi965: Add gen8 fast clear perf debug
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2015-06-05 Ben Widawskyi965: Add buffer sizes to perf debug of fast clears
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2015-05-29 Ben Widawskyi965: Disable compaction for EOT send messages
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2015-05-28 Ben Widawskyi965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)
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2015-05-18 Ben Widawskyi965: Add gen8 blend state
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2015-05-18 Ben Widawskyi965: Add renderbuffer surface indexes to debug
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2015-05-18 Ben Widawskyi965: Add Gen9 surface state decoding
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2015-05-18 Ben Widawskyi965: Add gen8 surface state debug info
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2015-05-18 Ben Widawskyi965: Add gen7+ sampler state to batch debug
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2015-05-18 Ben Widawskyi965: Add viewport extents (gen8) to batch decode
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2015-05-18 Ben Widawskyi965: Add all surface types to the batch decode
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2015-05-18 Ben Widawskyi965: Add string for surface format to table
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2015-04-14 Ben Widawskyi965/fs: Combine tex/fb_write operations (opt)
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2015-04-14 Ben Widawskyi965/fs: Only emit FS_OPCODE_PLACEHOLDER_HALT if there...
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2015-04-14 Ben Widawskyi965/fs: Create a has_side_effects for fs_inst
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2015-03-28 Ben Widawskyi965/skl: Don't use the PMA depth stall workaround
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2015-03-28 Ben Widawskyi965/skl: Disable partial resolve in VC
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2015-03-09 Ben Widawskymeta: Plug memory leak
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2015-03-03 Ben Widawskyi965: Fix assertion in brw_reg_type_letters
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2015-03-03 Ben Widawskyi965: Rename some PIPE_CONTROL flags
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2015-02-22 Ben Widawskyi965/skl: Use 1 register for uniform pull constant...
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2015-02-18 Ben Widawskyi965: implement ARB_pipeline_statistics_query
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2015-02-18 Ben Widawskymesa: Add support for the ARB_pipeline_statistics_query...
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2015-02-18 Jordan Justenmesa: Add _mesa_has_compute_shaders
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2015-02-16 Ben Widawskyi965/simd8vs: Fix SIMD8 atomics
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2015-02-12 Ben Widawskyi965/vs/skl: Use vec4 datatypes for message header
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2015-02-07 Ben Widawskyi965: Add more stringent blitter assertions
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2015-02-07 Ben Widawskyi965: Consolidate some of the intel_blit logic
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2015-02-07 Ben Widawskyi965/vec4: Correct MUL destination hazard
Author: Ben Widawsky <benjamin.widawsky@intel.com>
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2014-12-12 Ben Widawskyi965/gen8+: Remove false perf debug message about MOCS
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2014-12-12 Ben Widawskyi965/gen8: Check correct number of blitter dwords
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2014-12-05 Ben Widawskyi965/gs: Avoid DW * DW mul
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2014-12-03 Ben Widawskyi965/skl: Fix SBE state upload code.
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2014-11-21 Ben Widawskyi965/vec4/gen8: Handle the MUL dest hazard exception
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2014-11-21 Ben Widawskyi965/vec4: Extract depctrl hazards
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2014-11-20 Ben Widawskyi965/disasm: Properly decode branch_ctrl (gen8+)
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2014-11-13 Ben Widawskyi965: Always enable VF statistics
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2014-11-03 Ben Widawskyi965/chv: Increase VS and GS thread counts
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