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i965: Add and use a single miptree aux_buf field
2018-04-24 Nanley Cheryi965: Add and use a single miptree aux_buf field
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2018-04-24 Nanley Cheryi965: Add and use a getter for the miptree aux buffer
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2018-04-21 Nanley Cheryi965/miptree: Delete an unused function
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2018-04-21 Nanley Cheryi965/miptree: Don't leak the clear_color_bo
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2018-04-11 Nanley Cheryblorp: Silence unused function warnings
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2018-04-09 Nanley Cheryi965: Make the miptree clear color setter take a gl_color_union
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2018-04-09 Nanley Cheryi965/miptree: Move the clear color and value setter...
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2018-04-09 Nanley Cheryi965: Use the brw_context for the clear color and value...
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2017-12-04 Nanley Cheryi965/cnl: Avoid fast-clearing sRGB render buffers
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-10-31 Nanley Cheryi965: Check CCS_E compatibility for texture view rendering
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-10-31 Nanley Cheryintel/isl: Disable some gen10 CCS_E formats for now
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-07-07 Nanley CheryRevert "intel/isl: Only create a CCS buffer if the...
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2017-06-26 Nanley Cheryanv/gpu_memcpy: Rename the gpu_memcpy function
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryanv/blorp: Provide surface states for CCS resolves
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryanv/blorp: Add a surface-state-based CCS resolve function
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryblorp/clear: Add a binding-table-based CCS resolve...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryanv: Adjust params of color buffer transitioning functions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryanv/blorp: Remove 3D subresource transition workaround
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryanv/cmd_buffer: Adjust the image view reloc function
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryanv/cmd_buffer: Adjust layout transition aspect checking
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryanv: Add and use color auxiliary buffer helpers
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryintel/isl: Only create a CCS buffer if the image supports...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryintel/isl: Limit CCS to one level and layer on gen7
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryintel/blorp: Check for layer fast-clear restriction
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-06-26 Nanley Cheryintel/blorp: Assert levels and layers are in range
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-05-22 Nanley Cherydocs: Document ASTC extension support for SKL and BXT
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-05-22 Nanley Cheryi965: Enable ASTC HDR for Broxton
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-05-22 Nanley Cheryintel/isl: Add ASTC HDR to format lists and helpers
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-05-18 Nanley Cheryi965/formats: Update the three-channel DXT1 mappings
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-05-18 Nanley Cheryanv/formats: Update the three-channel BC1 mappings
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-04-24 Nanley Cheryisl/format: Update the R16G16B16X16_FLOAT entry
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-04-24 Nanley Cheryanv/pass: Delete anv_pass::subpass_attachments
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-04-17 Nanley Cheryanv/cmd_buffer: Disable CCS on BDW input attachments
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-20 Nanley Cheryintel: Correct the BDW surface state size
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/image: Allow HiZ on input attachment-capable depth...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/cmd_buffer: Centralize automatic layout transitions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/cmd_buffer: Add attachment transitioning functions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/blorp: Encapsulate subpass id querying
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/cmd_buffer: Enable render pass awareness
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/pass: Store subpass attachment reference list
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/pass: Fix size of anv_render_pass:subpass_attachments
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv: Store the user's VkAttachmentReference
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/cmd_buffer: Remove extra resolve for certain depth...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/cmd_buffer: Conditionally choose the sampled image...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/descriptor_set: Store aux usage of sampled image...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/image: Create an additional surface state for sampling
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/image: Simplify setup of HiZ sampler surface state
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/image: Remove extra dependency on HiZ-specific...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv: Update the HiZ sampling helper
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/cmd_buffer: Replace layout_to_hiz_usage()
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/image: Add anv_layout_to_aux_usage()
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-03-02 Nanley Cheryanv/pass: Avoid accessing attachment array out of bounds
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-02-03 Nanley Cheryanv/blorp: Disable resolves for transparent black clears
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-02-03 Nanley Cheryanv/cmd_buffer: Don't temporarily enable CCS_E within...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-02-02 Nanley Cheryanv/pass: Store the depth-stencil attachment's last...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-31 Nanley Cheryanv/cmd_buffer: Use the proper depth input attachment...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Avoid some resolves for samplable HiZ buffers
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Enable sampling from HiZ
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv/blorp: Don't fast depth clear samplable HiZ buffers...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Add a helper to determine sampling with HiZ
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryisl/surface_state: Handle ISL_AUX_USAGE_HIZ
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Perform HiZ resolves only on layout transitions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Disable HiZ for input attachments
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Avoid resolves incurred by fast depth clears
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Prepare for transitioning to the requested final...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Store depth stencil layouts
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Add helpers to handle depth buffer layout transitions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Delete anv's HiZ op emit function
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Use the gen8 BLORP HiZ resolving function
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv/blorp: Add a gen8 HiZ op resolve function
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Use gen8 BLORP HiZ clearing functions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryintel/blorp_clear: Add gen8 HiZ clearing functions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Enable HiZ support for multiple subpasses
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Use ::anv_attachment_state for toggling HiZ per...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv: Replace anv_image_has_hiz() with ISL_AUX_USAGE_HIZ
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryanv/blorp: Handle ISL_AUX_USAGE_HIZ
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-13 Nanley Cheryintel/blorp: Add the BDW+ optimized HZ_OP sequence...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-12 Nanley Cheryanv/image: Disable HiZ for depth buffer arrays
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-12 Nanley Cheryanv/cmd_buffer: Fix programmed HiZ qpitch
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2017-01-12 Nanley Cheryanv/cmd_buffer: Fix arrayed depth/stencil attachments
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-12-06 Nanley Cheryanv/TODO: Document sampling from HiZ
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2016-11-18 Nanley Cheryanv/cmd_buffer: Enable stencil-only HZ clears
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-11-18 Nanley Cheryanv/cmd_buffer: Manage Anv state around HZ op emission
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-11-18 Nanley Cheryanv/cmd_buffer: Clarify HZ rectangle behavior
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-11-18 Nanley Cherymesa/fbobject: Update CubeMapFace when reusing textures
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-11-03 Nanley Cheryisl: Only allow Y-tiling for ASTC textures
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-11-03 Nanley Cheryanv/blorp: Don't create linear ASTC surfaces for buffers
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-11-03 Nanley Cheryanv/formats: Disallow linear ASTC textures
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-11-03 Nanley Cheryanv/formats: Disallow 1D compressed textures
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-31 Nanley Cheryi965: Move gen8_disable_stages to brw_upload_initial_gpu_state
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-31 Nanley Cheryi965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant...
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-24 Nanley Cheryisl/format: Correct ASTC entries of format info table
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Nanley Cheryanv/TODO: Update the HiZ task
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Nanley Cheryanv: Enable fast depth clears
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Chad Versaceanv/cmd_buffer: Enable rendering to HiZ
Nanley Chery:
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Nanley Cheryanv/cmd_buffer: Add code for performing HZ operations
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Jason Ekstrandanv/image: Memset hiz surfaces to 0 when binding memory
Nanley Chery (amend):
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Jason Ekstrandanv: Move BindImageMemory to anv_image.c
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Chad Versaceanv: Allocate hiz surface
Nanley Chery:
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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2016-10-07 Chad Versaceanv: Add func anv_image_has_hiz()
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
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