bd43ecc39135f99a40a6b544431fa837faf33aef
[openpower-isa.git] / src / openpower / test / alu / alu_cases.py
1 import random
2 from openpower.test.common import TestAccumulatorBase
3 from openpower.endian import bigendian
4 from openpower.simulator.program import Program
5 from openpower.decoder.selectable_int import SelectableInt
6 from openpower.decoder.power_enums import XER_bits
7 from openpower.decoder.isa.caller import special_sprs
8 from openpower.test.state import ExpectedState
9 import unittest
10
11
12 class ALUTestCase(TestAccumulatorBase):
13
14 def case_1_regression(self):
15 lst = [f"extsw 3, 1"]
16 initial_regs = [0] * 32
17 initial_regs[1] = 0xb6a1fc6c8576af91
18 e = ExpectedState(pc=4)
19 e.intregs[1] = 0xb6a1fc6c8576af91
20 e.intregs[3] = 0xffffffff8576af91
21 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
22 lst = [f"subf 3, 1, 2"]
23 initial_regs = [0] * 32
24 initial_regs[1] = 0x3d7f3f7ca24bac7b
25 initial_regs[2] = 0xf6b2ac5e13ee15c2
26 e = ExpectedState(pc=4)
27 e.intregs[1] = 0x3d7f3f7ca24bac7b
28 e.intregs[2] = 0xf6b2ac5e13ee15c2
29 e.intregs[3] = 0xb9336ce171a26947
30 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
31 lst = [f"subf 3, 1, 2"]
32 initial_regs = [0] * 32
33 initial_regs[1] = 0x833652d96c7c0058
34 initial_regs[2] = 0x1c27ecff8a086c1a
35 e = ExpectedState(pc=4)
36 e.intregs[1] = 0x833652d96c7c0058
37 e.intregs[2] = 0x1c27ecff8a086c1a
38 e.intregs[3] = 0x98f19a261d8c6bc2
39 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
40 lst = [f"extsb 3, 1"]
41 initial_regs = [0] * 32
42 initial_regs[1] = 0x7f9497aaff900ea0
43 e = ExpectedState(pc=4)
44 e.intregs[1] = 0x7f9497aaff900ea0
45 e.intregs[3] = 0xffffffffffffffa0
46 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
47 lst = [f"add. 3, 1, 2"]
48 initial_regs = [0] * 32
49 initial_regs[1] = 0xc523e996a8ff6215
50 initial_regs[2] = 0xe1e5b9cc9864c4a8
51 self.add_case(Program(lst, bigendian), initial_regs)
52 lst = [f"add 3, 1, 2"]
53 initial_regs = [0] * 32
54 initial_regs[1] = 0x2e08ae202742baf8
55 initial_regs[2] = 0x86c43ece9efe5baa
56 self.add_case(Program(lst, bigendian), initial_regs)
57
58 def case_rand(self):
59 insns = ["add", "add.", "subf"]
60 for i in range(40):
61 choice = random.choice(insns)
62 lst = [f"{choice} 3, 1, 2"]
63 initial_regs = [0] * 32
64 initial_regs[1] = random.randint(0, (1 << 64)-1)
65 initial_regs[2] = random.randint(0, (1 << 64)-1)
66 self.add_case(Program(lst, bigendian), initial_regs)
67
68 def case_addme_ca_0(self):
69 insns = ["addme", "addme.", "addmeo", "addmeo."]
70 for choice in insns:
71 lst = [f"{choice} 6, 16"]
72 for value in [0x7ffffffff,
73 0xffff80000]:
74 initial_regs = [0] * 32
75 initial_regs[16] = value
76 initial_sprs = {}
77 xer = SelectableInt(0, 64)
78 xer[XER_bits['CA']] = 0
79 initial_sprs[special_sprs['XER']] = xer
80 self.add_case(Program(lst, bigendian),
81 initial_regs, initial_sprs)
82
83 def case_addme_ca_1(self):
84 insns = ["addme", "addme.", "addmeo", "addmeo."]
85 for choice in insns:
86 lst = [f"{choice} 6, 16"]
87 for value in [0x7ffffffff, # fails, bug #476
88 0xffff80000]:
89 initial_regs = [0] * 32
90 initial_regs[16] = value
91 initial_sprs = {}
92 xer = SelectableInt(0, 64)
93 xer[XER_bits['CA']] = 1
94 initial_sprs[special_sprs['XER']] = xer
95 self.add_case(Program(lst, bigendian),
96 initial_regs, initial_sprs)
97
98 def case_addme_ca_so_3(self):
99 """bug where SO does not get passed through to CR0
100 """
101 lst = ["addme. 6, 16"]
102 initial_regs = [0] * 32
103 initial_regs[16] = 0x7ffffffff
104 initial_sprs = {}
105 xer = SelectableInt(0, 64)
106 xer[XER_bits['CA']] = 1
107 xer[XER_bits['SO']] = 1
108 initial_sprs[special_sprs['XER']] = xer
109 self.add_case(Program(lst, bigendian),
110 initial_regs, initial_sprs)
111
112 def case_addze(self):
113 insns = ["addze", "addze.", "addzeo", "addzeo."]
114 for choice in insns:
115 lst = [f"{choice} 6, 16"]
116 initial_regs = [0] * 32
117 initial_regs[16] = 0x00ff00ff00ff0080
118 self.add_case(Program(lst, bigendian), initial_regs)
119
120 self.add_case(Program(lst, bigendian), initial_regs)
121
122 def case_addis_nonzero_r0_regression(self):
123 lst = [f"addis 3, 0, 1"]
124 print(lst)
125 initial_regs = [0] * 32
126 initial_regs[0] = 5
127 e = ExpectedState(initial_regs, pc=4)
128 e.intregs[3] = 0x10000
129 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
130
131 def case_addis_nonzero_r0(self):
132 for i in range(10):
133 imm = random.randint(-(1 << 15), (1 << 15)-1)
134 lst = [f"addis 3, 0, {imm}"]
135 print(lst)
136 initial_regs = [0] * 32
137 initial_regs[0] = random.randint(0, (1 << 64)-1)
138 self.add_case(Program(lst, bigendian), initial_regs)
139
140 def case_rand_imm(self):
141 insns = ["addi", "addis", "subfic"]
142 for i in range(10):
143 choice = random.choice(insns)
144 imm = random.randint(-(1 << 15), (1 << 15)-1)
145 lst = [f"{choice} 3, 1, {imm}"]
146 print(lst)
147 initial_regs = [0] * 32
148 initial_regs[1] = random.randint(0, (1 << 64)-1)
149 self.add_case(Program(lst, bigendian), initial_regs)
150
151 def case_0_adde(self):
152 lst = ["adde. 5, 6, 7"]
153 for i in range(10):
154 initial_regs = [0] * 32
155 initial_regs[6] = random.randint(0, (1 << 64)-1)
156 initial_regs[7] = random.randint(0, (1 << 64)-1)
157 initial_sprs = {}
158 xer = SelectableInt(0, 64)
159 xer[XER_bits['CA']] = 1
160 initial_sprs[special_sprs['XER']] = xer
161 self.add_case(Program(lst, bigendian),
162 initial_regs, initial_sprs)
163
164 def case_cmp(self):
165 lst = ["subf. 1, 6, 7",
166 "cmp cr2, 1, 6, 7"]
167 initial_regs = [0] * 32
168 initial_regs[6] = 0x10
169 initial_regs[7] = 0x05
170 self.add_case(Program(lst, bigendian), initial_regs, {})
171
172 def case_cmp2(self):
173 lst = ["cmp cr2, 0, 2, 3"]
174 initial_regs = [0] * 32
175 initial_regs[2] = 0xffffffffaaaaaaaa
176 initial_regs[3] = 0x00000000aaaaaaaa
177 self.add_case(Program(lst, bigendian), initial_regs, {})
178
179 lst = ["cmp cr2, 0, 4, 5"]
180 initial_regs = [0] * 32
181 initial_regs[4] = 0x00000000aaaaaaaa
182 initial_regs[5] = 0xffffffffaaaaaaaa
183 self.add_case(Program(lst, bigendian), initial_regs, {})
184
185 def case_cmp3(self):
186 lst = ["cmp cr2, 1, 2, 3"]
187 initial_regs = [0] * 32
188 initial_regs[2] = 0xffffffffaaaaaaaa
189 initial_regs[3] = 0x00000000aaaaaaaa
190 self.add_case(Program(lst, bigendian), initial_regs, {})
191
192 lst = ["cmp cr2, 1, 4, 5"]
193 initial_regs = [0] * 32
194 initial_regs[4] = 0x00000000aaaaaaaa
195 initial_regs[5] = 0xffffffffaaaaaaaa
196 self.add_case(Program(lst, bigendian), initial_regs, {})
197
198 def case_cmpl_microwatt_0(self):
199 """microwatt 1.bin:
200 115b8: 40 50 d1 7c .long 0x7cd15040 # cmpl 6, 0, 17, 10
201 register_file.vhdl: Reading GPR 11 000000000001C026
202 register_file.vhdl: Reading GPR 0A FEDF3FFF0001C025
203 cr_file.vhdl: Reading CR 35055050
204 cr_file.vhdl: Writing 35055058 to CR mask 01 35055058
205 """
206
207 lst = ["cmpl 6, 0, 17, 10"]
208 initial_regs = [0] * 32
209 initial_regs[0x11] = 0x1c026
210 initial_regs[0xa] = 0xFEDF3FFF0001C025
211 XER = 0xe00c0000
212 CR = 0x35055050
213
214 self.add_case(Program(lst, bigendian), initial_regs,
215 initial_sprs = {'XER': XER},
216 initial_cr = CR)
217
218 def case_cmpl_microwatt_0_disasm(self):
219 """microwatt 1.bin: disassembled version
220 115b8: 40 50 d1 7c .long 0x7cd15040 # cmpl 6, 0, 17, 10
221 register_file.vhdl: Reading GPR 11 000000000001C026
222 register_file.vhdl: Reading GPR 0A FEDF3FFF0001C025
223 cr_file.vhdl: Reading CR 35055050
224 cr_file.vhdl: Writing 35055058 to CR mask 01 35055058
225 """
226
227 dis = ["cmpl 6, 0, 17, 10"]
228 lst = bytes([0x40, 0x50, 0xd1, 0x7c]) # 0x7cd15040
229 initial_regs = [0] * 32
230 initial_regs[0x11] = 0x1c026
231 initial_regs[0xa] = 0xFEDF3FFF0001C025
232 XER = 0xe00c0000
233 CR = 0x35055050
234
235 p = Program(lst, bigendian)
236 p.assembly = '\n'.join(dis)+'\n'
237 self.add_case(p, initial_regs,
238 initial_sprs = {'XER': XER},
239 initial_cr = CR)
240
241 def case_cmplw_microwatt_1(self):
242 """microwatt 1.bin:
243 10d94: 40 20 96 7c cmplw cr1,r22,r4
244 gpr: 00000000ffff6dc1 <- r4
245 gpr: 0000000000000000 <- r22
246 """
247
248 lst = ["cmpl 1, 0, 22, 4"]
249 initial_regs = [0] * 32
250 initial_regs[4] = 0xffff6dc1
251 initial_regs[22] = 0
252 XER = 0xe00c0000
253 CR = 0x50759999
254
255 self.add_case(Program(lst, bigendian), initial_regs,
256 initial_sprs = {'XER': XER},
257 initial_cr = CR)
258
259 def case_cmpli_microwatt(self):
260 """microwatt 1.bin: cmpli
261 123ac: 9c 79 8d 2a cmpli cr5,0,r13,31132
262 gpr: 00000000301fc7a7 <- r13
263 cr : 0000000090215393
264 xer: so 1 ca 0 32 0 ov 0 32 0
265
266 """
267
268 lst = ["cmpli 5, 0, 13, 31132"]
269 initial_regs = [0] * 32
270 initial_regs[13] = 0x301fc7a7
271 XER = 0xe00c0000
272 CR = 0x90215393
273
274 self.add_case(Program(lst, bigendian), initial_regs,
275 initial_sprs = {'XER': XER},
276 initial_cr = CR)
277
278 def case_extsb(self):
279 insns = ["extsb", "extsh", "extsw"]
280 for i in range(10):
281 choice = random.choice(insns)
282 lst = [f"{choice} 3, 1"]
283 print(lst)
284 initial_regs = [0] * 32
285 initial_regs[1] = random.randint(0, (1 << 64)-1)
286 self.add_case(Program(lst, bigendian), initial_regs)
287
288 def case_cmpeqb(self):
289 lst = ["cmpeqb cr1, 1, 2"]
290 for i in range(20):
291 initial_regs = [0] * 32
292 initial_regs[1] = i
293 initial_regs[2] = 0x0001030507090b0f
294 self.add_case(Program(lst, bigendian), initial_regs, {})
295