Add dummy custom debug registers, to test OpenOCD. (#233)
[riscv-isa-sim.git] / riscv / debug_module.h
index 3aa3f0f7d724c8afa7b4c467cb7f4496a8914d0f..5b43ed628c52b5cb4745b9872cdebbb91885c318 100644 (file)
@@ -115,6 +115,9 @@ class debug_module_t : public abstract_device_t
 
     static const unsigned debug_abstract_size = 5;
     unsigned debug_abstract_start;
+    // R/W this through custom registers, to allow debuggers to test that
+    // functionality.
+    unsigned custom_base;
 
     // We only support 1024 harts currently. More requires at least resizing
     // the arrays below, and their corresponding special memory regions.