Fix using the uninitialized disassemble object. (#220)

[riscv-isa-sim.git] / riscv / processor.cc

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 9fc5d5f63a6558c1e8258a7f705fa638d7be9d0c..52f69c1d460778519bf34f8020c4c6b73b9dd3cb 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -24,11 +24,11 @@ processor_t::processor_t(const char* isa, simif_t* sim, uint32_t id,
   : debug(false), halt_request(false), sim(sim), ext(NULL), id(id),
   halt_on_reset(halt_on_reset), last_pc(1), executions(1)
 {
+  disassembler = new disassembler_t(max_xlen);
   parse_isa_string(isa);
   register_base_instructions();
 
   mmu = new mmu_t(sim, this);
-  disassembler = new disassembler_t(max_xlen);
 
   reset();
 }