Add test case for `riscv expose_custom`.

[riscv-tests.git] / debug / targets / RISC-V / spike32.py

diff --git a/debug/targets/RISC-V/spike32.py b/debug/targets/RISC-V/spike32.py
index 809463cb697c065d365eabd6505d4f042ae07c12..a831ecbb2af2ae63d9e5a0cbcfbe870885cefa0b 100644 (file)
--- a/debug/targets/RISC-V/spike32.py
+++ b/debug/targets/RISC-V/spike32.py
@@ -13,6 +13,8 @@ class spike32(targets.Target):
     harts = [spike32_hart()]
     openocd_config_path = "spike-1.cfg"
     timeout_sec = 30
+    implements_custom_test = True
 
     def create(self):
-        return testlib.Spike(self)
+        # 64-bit FPRs on 32-bit target
+        return testlib.Spike(self, isa="RV32IMAFDC")