Update to new privileged spec

[riscv-tests.git] / isa / rv32si / scall.S

diff --git a/isa/rv32si/scall.S b/isa/rv32si/scall.S
index 608596dff14f38781bb78eec6f811093fddd6952..c5cc3ac98ce7b68d3865b53db928c1f8ac796b3b 100644 (file)
--- a/isa/rv32si/scall.S
+++ b/isa/rv32si/scall.S
@@ -1,3 +1,5 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # scall.S
 #-----------------------------------------------------------------------------
@@ -11,8 +13,8 @@
 RVTEST_RV32S
 RVTEST_CODE_BEGIN
 
-  la t0, evec
-  csrw evec, t0
+  la t0, stvec
+  csrw stvec, t0
 
   li TESTNUM, 2
   scall
@@ -22,13 +24,13 @@ RVTEST_CODE_BEGIN
 
   TEST_PASSFAIL
 
-evec:
-  li t1, CAUSE_SYSCALL
-  csrr t0, cause
+stvec:
+  li t1, CAUSE_SCALL
+  csrr t0, scause
   bne t0, t1, fail
-  csrr t0, epc
+  csrr t0, sepc
   addi t0, t0, 8
-  csrw epc, t0
+  csrw sepc, t0
   sret
 
 RVTEST_CODE_END