Add LICENSE

[riscv-tests.git] / isa / rv64sv / illegal_cfg_nfpr.S

diff --git a/isa/rv64sv/illegal_cfg_nfpr.S b/isa/rv64sv/illegal_cfg_nfpr.S
index b27126807cd3ef3ced1f5e5121486cb20177073d..e42dacda5e3aa83f998590d283275ea1f9cee212 100644 (file)
--- a/isa/rv64sv/illegal_cfg_nfpr.S
+++ b/isa/rv64sv/illegal_cfg_nfpr.S
@@ -1,3 +1,5 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # illegal_tvec_cmd.S
 #-----------------------------------------------------------------------------
@@ -11,16 +13,17 @@
 RVTEST_RV64S
 RVTEST_CODE_BEGIN
 
-  setpcr status, SR_EI # enable interrupt
+  li a0, SR_EA | SR_EI
+  csrs status, a0
 
   la a3,handler
-  mtpcr a3,evec # set exception handler
+  csrw evec,a3 # set exception handler
 
-  mfpcr a3,status
+  csrr a3,status
   li a4,(1 << IRQ_COP)
   slli a4,a4,SR_IM_SHIFT
   or a3,a3,a4 # enable IM[COP]
-  mtpcr a3,status
+  csrw status,a3
 
   li a0,33
   slli a0,a0,6
@@ -33,7 +36,7 @@ vtcode2:
 handler:
   vxcptkill
 
-  li x28,2
+  li TESTNUM,2
 
   # check cause
   vxcptcause a3
@@ -62,16 +65,16 @@ handler:
 
   ld a1,0(a5)
   li a2,5
-  li x28,2
+  li TESTNUM,2
   bne a1,a2,fail
   ld a1,8(a5)
-  li x28,3
+  li TESTNUM,3
   bne a1,a2,fail
   ld a1,16(a5)
-  li x28,4
+  li TESTNUM,4
   bne a1,a2,fail
   ld a1,24(a5)
-  li x28,5
+  li TESTNUM,5
   bne a1,a2,fail
 
   TEST_PASSFAIL