src/main/scala/devices/gpio/GPIOPeriphery.scala

   1 // See LICENSE for license details.
   2 package sifive.blocks.devices.gpio
   3
   4 import Chisel._
   5 import config.Field
   6 import diplomacy.LazyModule
   7 import rocketchip.{
   8   HasTopLevelNetworks,
   9   HasTopLevelNetworksBundle,
  10   HasTopLevelNetworksModule
  11 }
  12 import uncore.tilelink2.TLFragmenter
  13 import util.HeterogeneousBag
  14
  15 case object PeripheryGPIOKey extends Field[Seq[GPIOParams]]
  16
  17 trait HasPeripheryGPIO extends HasTopLevelNetworks {
  18   val gpioParams = p(PeripheryGPIOKey)
  19   val gpio = gpioParams map {params =>
  20     val gpio = LazyModule(new TLGPIO(peripheryBusBytes, params))
  21     gpio.node := TLFragmenter(peripheryBusBytes, cacheBlockBytes)(peripheryBus.node)
  22     intBus.intnode := gpio.intnode
  23     gpio
  24   }
  25 }
  26
  27 trait HasPeripheryGPIOBundle extends HasTopLevelNetworksBundle {
  28   val outer: HasPeripheryGPIO
  29   val gpio = HeterogeneousBag(outer.gpioParams.map(new GPIOPortIO(_)))
  30 }
  31
  32 trait HasPeripheryGPIOModule extends HasTopLevelNetworksModule {
  33   val outer: HasPeripheryGPIO
  34   val io: HasPeripheryGPIOBundle
  35   (io.gpio zip outer.gpio) foreach { case (io, device) =>
  36     io <> device.module.io.port
  37   }
  38 }