cpu/vexriscv/mem_map_linux: move main_ram to allow up to 1GB.
[litex.git] / MANIFEST.in
1 graft litex/build/sim
2 graft litex/soc/software
3 graft litex/soc/cores/cpu/lm32/verilog
4 graft litex/soc/cores/cpu/minerva/verilog
5 graft litex/soc/cores/cpu/mor1kx/verilog
6 graft litex/soc/cores/cpu/picorv32/verilog
7 graft litex/soc/cores/cpu/rocket/verilog
8 graft litex/soc/cores/cpu/vexriscv/verilog