README

   1                        __   _ __      _  __
   2                       / /  (_) /____ | |/_/
   3                      / /__/ / __/ -_)>  <
   4                     /____/_/\__/\__/_/|_|
   5                          Migen inside
   6
   7                 Build your hardware, easily!
   8               Copyright 2012-2018 / EnjoyDigital
   9
  10 [> Intro
  11 --------
  12 LiteX is an alternative to MiSoC maintained and used by Enjoy-Digital to build
  13 our cores, integrate them in complete SoC and load/flash them to the hardware
  14 and experiment new features. (structure is kept close to MiSoC to ease
  15 collaboration)
  16
  17 Typical LiteX design flow:
  18 --------------------------
  19
  20                         +---------------+
  21                         |FPGA toolchains|
  22                         +----^-----+----+
  23                              |     |
  24                           +--+-----v--+
  25          +-------+        |           |
  26          | Migen +-------->           |
  27          +-------+        |           |        Your design
  28                           |   LiteX   +---> ready to be used!
  29                           |           |
  30 +----------------------+  |           |
  31 |LiteX Cores Ecosystem +-->           |
  32 +----------------------+  +-^-------^-+
  33  (Eth, SATA, DRAM, USB,     |       |
  34   PCIe, Video, etc...)      +       +
  35                            board   target
  36                            file    file
  37
  38
  39 LiteX already supports various softcores CPUs: LM32, Mor1kx, PicoRV32, VexRiscv
  40 and is compatible with the LiteX's Cores Ecosystem:
  41
  42 - LiteDRAM: https://github.com/enjoy-digital/litedram
  43 - LiteEth: https://github.com/enjoy-digital/liteeth
  44 - LitePCIe: https://github.com/enjoy-digital/litepcie
  45 - LiteSATA: https://github.com/enjoy-digital/litesata
  46 - LiteUSB: https://github.com/enjoy-digital/litesata
  47 - LiteSDCard: https://github.com/enjoy-digital/litesdcard
  48 - LiteICLink: https://github.com/enjoy-digital/liteiclink
  49 - LiteJESD204B: https://github.com/enjoy-digital/litejesd204b
  50 - LiteVideo: https://github.com/enjoy-digital/litevideo
  51 - LiteScope: https://github.com/enjoy-digital/litescope
  52
  53
  54 [> Sub-packages
  55 ---------------
  56 gen:
  57   Provides specific or experimental modules to generate HDL that are not integrated
  58   in Migen.
  59
  60 build:
  61   Provides tools to build FPGA bitstreams (interface to vendor toolchains) and to
  62   simulate HDL code or full SoCs.
  63
  64 soc:
  65   Provides definitions/modules to build cores (bus, bank, flow), cores and tools
  66   to build a SoC from such cores.
  67
  68 boards:
  69   Provides platforms and targets for the supported boards. All Migen's platforms
  70   can also be used in LiteX.
  71
  72 [> Very Quick start guide (for newcomers)
  73 -----------------------------------------
  74 TimVideos.us has done an awesome job for setting up a LiteX environment easily in
  75 the litex-buildenv repo: https://github.com/timvideos/litex-buildenv
  76
  77 It's recommended for newcomers to go this way. Various FPGA boards are supported
  78 and multiple examples provided! You can even run Linux on your FPGA using LiteX
  79 very easily!
  80
  81 Migen documentation can be found here: https://m-labs.hk/migen/manual
  82
  83 FPGA lessons/tutorials can be found at: https://github.com/enjoy-digital/fpga_101
  84
  85 [> Medium Quick start guide with Conda
  86 -----------------------------------------
  87
  88 0. Get miniconda by following instructions at https://conda.io/miniconda.html
  89
  90 1. Clone LiteX
  91   git clone --recurse-submodules https://github.com/enjoy-digital/litex.git
  92
  93 2. Create a LiteX environment from environment.yml
  94   conda env create -f environment.yml
  95
  96 3. Enter conda environment
  97   conda activate litex
  98
  99 4. Build the target of your board...:
 100   Go to boards/targets and execute the target you want to build
 101
 102
 103 [> Quick start guide (for advanced users)
 104 -----------------------------------------
 105 0. If cloned from Git without the --recursive option, get the submodules:
 106   git submodule update --init
 107
 108 1. Install Python 3.5, Migen and FPGA vendor's development tools.
 109    Get Migen from: https://github.com/m-labs/migen
 110
 111 2. Compile and install binutils. Take the latest version from GNU.
 112   mkdir build && cd build
 113   ../configure --target=lm32-elf
 114   make
 115   make install
 116
 117 3. (Optional, only if you want to use a lm32 CPU in you SoC)
 118   Compile and install GCC. Take gcc-core and gcc-g++ from GNU
 119   (version 4.5 or >=4.9).
 120   rm -rf libstdc++-v3
 121   mkdir build && cd build
 122   ../configure --target=lm32-elf --enable-languages="c,c++" --disable-libgcc \
 123     --disable-libssp
 124   make
 125   make install
 126
 127 4. Build the target of your board...:
 128   Go to boards/targets and execute the target you want to build
 129
 130 5. ... and/or install Verilator and test LiteX on your computer:
 131   Download and install Verilator: http://www.veripool.org/
 132   Install libevent-devel / json-c-devel packages
 133   Go to boards/targets
 134   ./sim.py
 135
 136 6. Run a terminal program on the board's serial port at 115200 8-N-1.
 137   You should get the BIOS prompt.
 138
 139 [> Contact
 140 ----------
 141 E-mail: florent [AT] enjoy-digital.fr