README

   1                        __   _ __      _  __
   2                       / /  (_) /____ | |/_/
   3                      / /__/ / __/ -_)>  <
   4                     /____/_/\__/\__/_/|_|
   5                          Migen inside
   6
   7                 Build your hardware, easily!
   8              Copyright 2012-2016 Enjoy-Digital
   9
  10 [> Intro
  11 --------
  12 LiteX is an alternative to Migen/MiSoC maintained and used by Enjoy-Digital
  13 to build our cores, integrate them in complete SoC and load/flash them to
  14 the hardware and experiment new features.
  15
  16 The structure of LiteX is kept close to Migen/MiSoC to ease collaboration
  17 between projects and efforts are made to keep cores developed with LiteX
  18 compatible with Migen/MiSoC.
  19
  20 [> License
  21 ----------
  22 LiteX is Copyright (c) 2012-2015 Enjoy-Digital under BSD Lisense.
  23 Since it is based on Migen/MiSoC, please also refer to LICENSE file in gen/soc
  24 directory or git history to get correct copyrights.
  25
  26 [> Sub-packages
  27 ---------------
  28 gen:
  29   Provides specific or experimentatl modules to generate HDL that are not integrated
  30   in Migen.
  31
  32 build:
  33   Provides tools to build FPGA bitstreams (interface to vendor toolchains) and to
  34   simulate HDL code or full SoCs.
  35
  36 soc:
  37   Provides definitions/modules to build cores (bus, bank, flow), cores and tools
  38   to build a SoC from such cores.
  39
  40 boards:
  41   Provides platforms and targets for the supported boards.
  42
  43 [> Quick start guide
  44 --------------------
  45 0. If cloned from Git without the --recursive option, get the submodules:
  46   git submodule update --init
  47
  48 1. Install Python 3.3+, Migen and FPGA vendor's development tools and JTAG tools.
  49   Get Migen from: https://github.com/m-labs/migen
  50
  51 2. Compile and install binutils. Take the latest version from GNU.
  52   mkdir build && cd build
  53   ../configure --target=lm32-elf
  54   make
  55   make install
  56
  57 3. (Optional, only if you want to use a lm32 CPU in you SoC)
  58   Compile and install GCC. Take gcc-core and gcc-g++ from GNU
  59   (version 4.5 or >=4.9).
  60   rm -rf libstdc++-v3
  61   mkdir build && cd build
  62   ../configure --target=lm32-elf --enable-languages="c,c++" --disable-libgcc \
  63     --disable-libssp
  64   make
  65   make install
  66
  67 4. Build the target of your board...:
  68   Go to boards/targets and execute the target you want to build
  69
  70 5. ... and/or install Verilator and test LiteX on your computer:
  71   Download and install Verilator: http://www.veripool.org/
  72   Go to boards/targets
  73   ./sim.py
  74
  75 6. Run a terminal program on the board's serial port at 115200 8-N-1.
  76   You should get the BIOS prompt.
  77
  78 [> Contact
  79 ----------
  80 E-mail: florent [AT] enjoy-digital.fr