README

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   6
   7        Copyright 2012-2014 / Florent Kermarrec / florent@enjoy-digital.fr
   8
   9                                  Miscope
  10 --------------------------------------------------------------------------------
  11
  12 [> Miscope
  13 ------------
  14
  15 Miscope is a small logic analyzer to embed in an FPGA.
  16
  17 While free vendor toolchains are generally used by beginners or for prototyping
  18 (situations where having a logic analyzer in the design is generally helpful)
  19 free toolchains are always provided without the proprietary logic analyzer
  20 solution... :(
  21
  22 Baseid on Migen, Miscope aims to provide a free, portable and flexible
  23 alternatve to vendor's solutions!
  24
  25 [> Specification:
  26
  27 Miscope provides Migen cores to embed in the design and Python drivers to control
  28 the logic analyzer from the Host. Miscope automatically interconnects all cores
  29 to a CSR bus. When using Python on the Host, no needs to worry about cores register
  30 mapping, importing miscope project gives you direct access to all the cores!
  31
  32 Miscope produces .vcd output files to be analyzed in your favorite waveform viewer.
  33
  34 Since Miscope also provides an Uart2Wishbone bridge, you only need 2 external Rx/Tx
  35 pins to be ready to debug!
  36
  37 [> Status:
  38 MiIo & Mila working on board with standard term.
  39 RLE working on board.
  40 RangeDetector and EdgeDector terms not tested.
  41
  42 [> Examples:
  43 Have a look at http://github.com/Florent-Kermarrec/misoc-de0nano
  44 miio.py : Led & Switch Test controlled by Python Host.
  45 mila.py : Logic Analyzer controlled by Python Host.
  46
  47 [> Contact
  48 E-mail: florent@enjoy-digital.fr