coldboot/coldboot.c

   1 #include <stdint.h>
   2 #include <stdbool.h>
   3
   4 #include "console.h"
   5
   6 #include <stdlib.h>
   7 #include <stdint.h>
   8 #include <gram.h>
   9
  10 static inline uint32_t read32(const void *addr)
  11 {
  12         return *(volatile uint32_t *)addr;
  13 }
  14
  15 static inline void write32(void *addr, uint32_t value)
  16 {
  17         *(volatile uint32_t *)addr = value;
  18 }
  19
  20 struct uart_regs {
  21         uint32_t divisor;
  22         uint32_t rx_data;
  23         uint32_t rx_rdy;
  24         uint32_t rx_err;
  25         uint32_t tx_data;
  26         uint32_t tx_rdy;
  27         uint32_t zero0; // reserved
  28         uint32_t zero1; // reserved
  29         uint32_t ev_status;
  30         uint32_t ev_pending;
  31         uint32_t ev_enable;
  32 };
  33
  34 void memcpy(void *dest, void *src, size_t n) {
  35    int i;
  36    //cast src and dest to char*
  37    char *src_char = (char *)src;
  38    char *dest_char = (char *)dest;
  39    for (i=0; i<n; i++)
  40           dest_char[i] = src_char[i]; //copy contents byte by byte
  41 }
  42
  43 void uart_writeuint32(uint32_t val) {
  44         const char lut[] = { '0', '1', '2', '3', '4', '5', '6', '7',
  45                          '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
  46         uint8_t *val_arr = &val;
  47         size_t i;
  48
  49         for (i = 0; i < 4; i++) {
  50                 putchar(lut[(val_arr[3-i] >> 4) & 0xF]);
  51                 putchar(lut[val_arr[3-i] & 0xF]);
  52         }
  53 }
  54
  55 void isr(void) {
  56
  57 }
  58
  59 int main(void) {
  60         const int kNumIterations = 65536;
  61         int res, failcnt = 0;
  62         uint32_t tmp;
  63         volatile uint32_t *ram = 0x10000000;
  64         console_init();
  65         puts("Firmware launched...\n");
  66
  67         puts("DRAM init... ");
  68         struct gramCtx ctx;
  69         struct gramProfile profile = {
  70                 .mode_registers = {
  71                         0x320, 0x6, 0x200, 0x0
  72                 },
  73                 .rdly_p0 = 2,
  74                 .rdly_p1 = 2,
  75         };
  76         struct gramProfile profile2;
  77         gram_init(&ctx, &profile, (void*)0x10000000,
  78                               (void*)0x00009000,
  79                               (void*)0x00008000);
  80         puts("done\n");
  81
  82         puts("Rdly\np0: ");
  83         for (size_t i = 0; i < 8; i++) {
  84                 profile2.rdly_p0 = i;
  85                 gram_load_calibration(&ctx, &profile2);
  86                 gram_reset_burstdet(&ctx);
  87                 for (size_t j = 0; j < 128; j++) {
  88                         tmp = ram[j];
  89                 }
  90                 if (gram_read_burstdet(&ctx, 0)) {
  91                         puts("1");
  92                 } else {
  93                         puts("0");
  94                 }
  95         }
  96         puts("\n");
  97
  98         puts("Rdly\np1: ");
  99         for (size_t i = 0; i < 8; i++) {
 100                 profile2.rdly_p1 = i;
 101                 gram_load_calibration(&ctx, &profile2);
 102                 gram_reset_burstdet(&ctx);
 103                 for (size_t j = 0; j < 128; j++) {
 104                         tmp = ram[j];
 105                 }
 106                 if (gram_read_burstdet(&ctx, 1)) {
 107                         puts("1");
 108                 } else {
 109                         puts("0");
 110                 }
 111         }
 112         puts("\n");
 113
 114         puts("Auto calibrating... ");
 115         res = gram_generate_calibration(&ctx, &profile2);
 116         if (res != GRAM_ERR_NONE) {
 117                 puts("failed\n");
 118                 gram_load_calibration(&ctx, &profile);
 119         } else {
 120                 gram_load_calibration(&ctx, &profile2);
 121         }
 122         puts("done\n");
 123
 124         puts("Auto calibration profile:");
 125         puts("p0 rdly:");
 126         uart_writeuint32(profile2.rdly_p0);
 127         puts(" p1 rdly:");
 128         uart_writeuint32(profile2.rdly_p1);
 129         puts("\n");
 130
 131         puts("DRAM test... \n");
 132         for (size_t i = 0; i < kNumIterations; i++) {
 133                 ram[i] = 0xDEAF0000 | i*4;
 134         }
 135
 136         for (size_t i = 0; i < kNumIterations; i++) {
 137                 if (ram[i] != (0xDEAF0000 | i*4)) {
 138                         puts("fail : *(0x");
 139                         uart_writeuint32(&ram[i]);
 140                         puts(") = ");
 141                         uart_writeuint32(ram[i]);
 142                         putchar('\n');
 143                         failcnt++;
 144
 145                         if (failcnt > 10) {
 146                                 puts("Test canceled (more than 10 errors)\n");
 147                                 break;
 148                         }
 149                 }
 150         }
 151         puts("done\n");
 152
 153         while (1);
 154
 155         return 0;
 156 }
 157