ls2: add support for the Nexys Video board
[ls2.git] / hyperram_model / README.txt
1 1) download the Cypress HyperRAM Model
2 http://www.cypress.com/verilog/s27kl0641-verilog
3 2) download the Winbond HyperRAM Model
4 https://www.winbond.com/resource-files/W956x8MBY_verilog_p.zip
5 3) install icarus verilog
6 4) run ./runhyperramsim.sh
7
8 Cypress HyperRAM Model files are
9 Copyright (C) 2015 Spansion, LLC.
10 (no explicit license found, but they are available publicly for download)
11
12 Winbond HyperRAM Model files are
13 Copyright C 2019 Winbond Electronics Corp. All rights reserved.
14 (no explicit license found, but they are available publicly for download)
15
16 hbc_*.v files from https://github.com/gtjennings1/HyperBUS are
17 Copyright 2017 Gnarly Grey LLC and have been released under this
18 license by Gnarly Grey:
19
20 // Permission is hereby granted, free of charge, to any person obtaining a
21 // copy of this software and associated documentation files (the
22 // "Software"), to deal in the Software without restriction, including
23 // without limitation the rights to use, copy, modify, merge, publish,
24 // distribute, sublicense, and/or sell copies of the Software, and to
25 // permit persons to whom the Software is furnished to do so, subject to
26 // the following conditions:
27
28 // The above copyright notice and this permission notice shall be included
29 // in all copies or substantial portions of the Software.
30
31 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
32 // OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
33 // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
34 // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
35 // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
36 // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
37 // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.