1 from liteeth
.common
import *
2 from liteeth
.generic
.depacketizer
import LiteEthDepacketizer
3 from liteeth
.generic
.packetizer
import LiteEthPacketizer
5 class LiteEthIPV4Depacketizer(LiteEthDepacketizer
):
7 LiteEthDepacketizer
.__init
__(self
,
8 eth_mac_description(8),
9 eth_ipv4_description(8),
13 class LiteEthIPV4Packetizer(LiteEthPacketizer
):
15 LiteEthPacketizer
.__init
__(self
,
16 eth_ipv4_description(8),
17 eth_mac_description(8),
21 class LiteEthIPTX(Module
):
22 def __init__(self
, ip_address
, arp_table
):
23 self
.sink
= sink
= Sink(eth_ipv4_description(8))
24 self
.source
= Source(eth_mac_description(8))
26 packetizer
= LiteEthIPV4Packetizer()
27 self
.submodules
+= packetizer
28 source
= packetizer
.sink
30 fsm
= FSM(reset_state
="IDLE")
31 self
.submodules
+= fsm
34 If(sink
.stb
& sink
.sop
,
36 NextState("SEND_MAC_ADDRESS_REQUEST")
39 fsm
.act("SEND_MAC_ADDRESS_REQUEST",
40 arp_table
.request
.stb
.eq(1),
41 arp_table
.request
.ip_address
.eq(sink
.destination_ip_address
),
42 If(arp_table
.request
.stb
& arp_table
.request
.ack
,
43 NextState("WAIT_MAC_ADDRESS_RESPONSE")
46 fsm
.act("WAIT_MAC_ADDRESS_RESPONSE",
48 If(arp_table
.response
.stb
,
54 Record
.connect(packetizer
.source
, self
.source
),
55 # XXX compute check sum
58 If(arp_table
.response
.stb
,
64 class LiteEthIPRX(Module
):
65 def __init__(self
, ip_address
):
66 self
.sink
= Sink(eth_mac_description(8))
67 self
.source
= source
= Source(eth_ipv4_description(8))
69 depacketizer
= LiteEthIPV4Depacketizer()
70 self
.submodules
+= depacketizer
71 self
.comb
+= Record
.connect(self
.sink
, depacketizer
.sink
)
72 sink
= depacketizer
.source
74 fsm
= FSM(reset_state
="IDLE")
75 self
.submodules
+= fsm
78 If(sink
.stb
& sink
.sop
,
84 self
.comb
+= valid
.eq(1) # XXX FIXME
93 Record
.connect(sink
, source
),
94 If(source
.stb
& source
.eop
& source
.ack
,
100 If(source
.stb
& source
.eop
& source
.ack
,
105 class LiteEthIP(Module
):
106 def __init__(self
, ip_address
, arp_table
):
107 self
.submodules
.tx
= LiteEthIPTX(ip_address
, arp_table
)
108 self
.submodules
.rx
= LiteEthIPRX(ip_address
)
109 self
.sink
, self
.source
= self
.rx
.sink
, self
.tx
.source