litex/boards/platforms/versaecp55g.py

   1 # This file is Copyright (c) 2017 Serge 'q3k' Bazanski <serge@bazanski.pl>
   2 # License: BSD
   3
   4 from litex.build.generic_platform import *
   5 from litex.build.lattice import LatticePlatform
   6 from litex.build.lattice.programmer import LatticeProgrammer
   7
   8
   9 _io = [
  10     ("clk100", 0, Pins("P3"), IOStandard("LVDS")),
  11     ("rst_n", 0, Pins("T1"), IOStandard("LVCMOS33")),
  12
  13     ("user_led", 0, Pins("E16"), IOStandard("LVCMOS25")),
  14     ("user_led", 1, Pins("D17"), IOStandard("LVCMOS25")),
  15     ("user_led", 2, Pins("D18"), IOStandard("LVCMOS25")),
  16     ("user_led", 3, Pins("E18"), IOStandard("LVCMOS25")),
  17     ("user_led", 4, Pins("F17"), IOStandard("LVCMOS25")),
  18     ("user_led", 5, Pins("F18"), IOStandard("LVCMOS25")),
  19     ("user_led", 6, Pins("E17"), IOStandard("LVCMOS25")),
  20     ("user_led", 7, Pins("F16"), IOStandard("LVCMOS25")),
  21
  22     ("user_dip_btn", 0, Pins("H2"), IOStandard("LVCMOS15")),
  23     ("user_dip_btn", 1, Pins("K3"), IOStandard("LVCMOS15")),
  24     ("user_dip_btn", 2, Pins("G3"), IOStandard("LVCMOS15")),
  25     ("user_dip_btn", 3, Pins("F2"), IOStandard("LVCMOS15")),
  26     ("user_dip_btn", 4, Pins("J18"), IOStandard("LVCMOS25")),
  27     ("user_dip_btn", 5, Pins("K18"), IOStandard("LVCMOS25")),
  28     ("user_dip_btn", 6, Pins("K19"), IOStandard("LVCMOS25")),
  29     ("user_dip_btn", 7, Pins("K20"), IOStandard("LVCMOS25")),
  30
  31     ("serial", 0,
  32         Subsignal("rx", Pins("C11"), IOStandard("LVCMOS33")),
  33         Subsignal("tx", Pins("A11"), IOStandard("LVCMOS33")),
  34     ),
  35
  36
  37     ("eth_clocks", 0,
  38         Subsignal("tx", Pins("P19")),
  39         Subsignal("rx", Pins("L20")),
  40         IOStandard("LVCMOS25")
  41     ),
  42     ("eth", 0,
  43         Subsignal("rst_n", Pins("U17")),
  44         Subsignal("mdio", Pins("U18")),
  45         Subsignal("mdc", Pins("T18")),
  46         Subsignal("rx_ctl", Pins("U19")),
  47         Subsignal("rx_data", Pins("T20 U20 T19 R18")),
  48         Subsignal("tx_ctl", Pins("R20")),
  49         Subsignal("tx_data", Pins("N19 N20 P18 P20")),
  50         IOStandard("LVCMOS25")
  51     ),
  52
  53     ("eth_clocks", 1,
  54         Subsignal("tx", Pins("C20")),
  55         Subsignal("rx", Pins("J19")),
  56         IOStandard("LVCMOS25")
  57     ),
  58     ("eth", 1,
  59         Subsignal("rst_n", Pins("F20")),
  60         Subsignal("mdio", Pins("H20")),
  61         Subsignal("mdc", Pins("G19")),
  62         Subsignal("rx_ctl", Pins("F19")),
  63         Subsignal("rx_data", Pins("G18 G16 H18 H17")),
  64         Subsignal("tx_ctl", Pins("E19")),
  65         Subsignal("tx_data", Pins("J17 J16 D19 D20")),
  66         IOStandard("LVCMOS25")
  67     ),
  68 ]
  69
  70
  71 class Platform(LatticePlatform):
  72     default_clk_name = "clk100"
  73     default_clk_period = 10
  74
  75     def __init__(self, **kwargs):
  76         LatticePlatform.__init__(self, "LFE5UM5G-45F-8BG381C", _io, **kwargs)
  77
  78     def do_finalize(self, fragment):
  79         LatticePlatform.do_finalize(self, fragment)
  80         try:
  81             self.add_period_constraint(self.lookup_request("eth_clocks", 0).rx, 8.0)
  82         except ConstraintError:
  83             pass
  84         try:
  85             self.add_period_constraint(self.lookup_request("eth_clocks", 1).rx, 8.0)
  86         except ConstraintError:
  87             pass
  88
  89     def create_programmer(self):
  90         _xcf_template = """
  91 <?xml version='1.0' encoding='utf-8' ?>
  92 <!DOCTYPE        ispXCF    SYSTEM    "IspXCF.dtd" >
  93 <ispXCF version="3.4.1">
  94     <Comment></Comment>
  95     <Chain>
  96         <Comm>JTAG</Comm>
  97         <Device>
  98             <SelectedProg value="TRUE"/>
  99             <Pos>1</Pos>
 100             <Vendor>Lattice</Vendor>
 101             <Family>ECP5UM5G</Family>
 102             <Name>LFE5UM5G-45F</Name>
 103             <IDCode>0x81112043</IDCode>
 104             <File>{bitstream_file}</File>
 105             <Operation>Fast Program</Operation>
 106         </Device>
 107         <Device>
 108             <SelectedProg value="FALSE"/>
 109             <Pos>2</Pos>
 110             <Vendor>Lattice</Vendor>
 111             <Family>ispCLOCK</Family>
 112             <Name>ispPAC-CLK5406D</Name>
 113             <IDCode>0x00191043</IDCode>
 114             <Operation>Erase,Program,Verify</Operation>
 115             <Bypass>
 116                 <InstrLen>8</InstrLen>
 117                 <InstrVal>11111111</InstrVal>
 118                 <BScanLen>1</BScanLen>
 119                 <BScanVal>0</BScanVal>
 120             </Bypass>
 121         </Device>
 122     </Chain>
 123     <ProjectOptions>
 124         <Program>SEQUENTIAL</Program>
 125         <Process>ENTIRED CHAIN</Process>
 126         <OperationOverride>No Override</OperationOverride>
 127         <StartTAP>TLR</StartTAP>
 128         <EndTAP>TLR</EndTAP>
 129         <VerifyUsercode value="FALSE"/>
 130     </ProjectOptions>
 131     <CableOptions>
 132         <CableName>USB2</CableName>
 133         <PortAdd>FTUSB-0</PortAdd>
 134         <USBID>LATTICE ECP5_5G VERSA BOARD A Location 0000 Serial Lattice ECP5_5G VERSA Board A</USBID>
 135     </CableOptions>
 136 </ispXCF>
 137 """
 138
 139         return LatticeProgrammer(_xcf_template)