litex: reorganize things, first work working version
[litex.git] / litex / soc / cores / gpio.py
1 from litex.gen import *
2 from litex.gen.genlib.cdc import MultiReg
3
4 from litex.soc.interconnect.csr import *
5
6
7 class GPIOIn(Module, AutoCSR):
8 def __init__(self, signal):
9 self._in = CSRStatus(len(signal))
10 self.specials += MultiReg(signal, self._in.status)
11
12
13 class GPIOOut(Module, AutoCSR):
14 def __init__(self, signal):
15 self._out = CSRStorage(len(signal))
16 self.comb += signal.eq(self._out.storage)
17
18
19 class GPIOInOut(Module):
20 def __init__(self, in_signal, out_signal):
21 self.submodules.gpio_in = GPIOIn(in_signal)
22 self.submodules.gpio_out = GPIOOut(out_signal)
23
24 def get_csrs(self):
25 return self.gpio_in.get_csrs() + self.gpio_out.get_csrs()
26
27
28 class Blinker(Module):
29 def __init__(self, signal, divbits=26):
30 counter = Signal(divbits)
31 self.comb += signal.eq(counter[divbits-1])
32 self.sync += counter.eq(counter + 1)