cores/dma: add stream.last support on WishboneDMAReader.
[litex.git] / litex / soc / cores / identifier.py
1 # This file is Copyright (c) 2013-2015 Sebastien Bourdeauducq <sb@m-labs.hk>
2 # License: BSD
3
4 from migen import *
5
6 # Identifier ---------------------------------------------------------------------------------------
7
8 class Identifier(Module):
9 def __init__(self, ident):
10 contents = list(ident.encode())
11 l = len(contents)
12 if l > 255:
13 raise ValueError("Identifier string must be 255 characters or less")
14 contents.append(0)
15 self.mem = Memory(8, len(contents), init=contents)
16
17 def get_memories(self):
18 return [(True, self.mem)]