import migen in litex/gen
[litex.git] / litex / soc / misoc / cores / framebuffer / core.py
1 from migen import *
2 from migen.flow.network import *
3 from migen.flow import plumbing
4 from migen.bank.description import AutoCSR
5 from migen.actorlib import structuring, misc
6
7 from misoc.mem.sdram.frontend import dma_lasmi
8 from misoc.framebuffer.format import bpp, pixel_layout, FrameInitiator, VTG
9 from misoc.framebuffer.phy import Driver
10
11
12 class Framebuffer(Module, AutoCSR):
13 def __init__(self, pads_vga, pads_dvi, lasmim):
14 pack_factor = lasmim.dw//bpp
15
16 g = DataFlowGraph()
17
18 self.fi = FrameInitiator(lasmim.aw, pack_factor)
19
20 intseq = misc.IntSequence(lasmim.aw, lasmim.aw)
21 dma_out = AbstractActor(plumbing.Buffer)
22 g.add_connection(self.fi, intseq, source_subr=self.fi.dma_subr())
23 g.add_pipeline(intseq, AbstractActor(plumbing.Buffer), dma_lasmi.Reader(lasmim), dma_out)
24
25 cast = structuring.Cast(lasmim.dw, pixel_layout(pack_factor), reverse_to=True)
26 vtg = VTG(pack_factor)
27 self.driver = Driver(pack_factor, pads_vga, pads_dvi)
28
29 g.add_connection(self.fi, vtg, source_subr=self.fi.timing_subr, sink_ep="timing")
30 g.add_connection(dma_out, cast)
31 g.add_connection(cast, vtg, sink_ep="pixels")
32 g.add_connection(vtg, self.driver)
33 self.submodules += CompositeActor(g)