litesata/kc705: use FMC pin names
[litex.git] / make.py
1 #!/usr/bin/env python3
2
3 import sys, os, argparse, subprocess, struct
4
5 from mibuild.tools import write_to_file
6 from migen.util.misc import autotype
7 from migen.fhdl import simplify
8
9 from misoclib.soc import cpuif
10 from misoclib.cpu import CPU
11 from misoclib.mem.sdram.phy import initsequence
12
13 from misoc_import import misoc_import
14
15 def _get_args():
16 parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter,
17 description="""\
18 MiSoC - a high performance and small footprint SoC based on Migen.
19
20 This program builds and/or loads MiSoC components.
21 One or several actions can be specified:
22
23 clean delete previous build(s).
24 build-bitstream build FPGA bitstream. Implies build-bios on targets with
25 integrated BIOS.
26 build-headers build software header files with CPU/CSR/IRQ/SDRAM_PHY definitions.
27 build-csr-csv save CSR map into CSV file.
28 build-bios build BIOS. Implies build-header.
29
30 load-bitstream load bitstream into volatile storage.
31 flash-bitstream load bitstream into non-volatile storage.
32 flash-bios load BIOS into non-volatile storage.
33
34 all clean, build-bitstream, build-bios, flash-bitstream, flash-bios.
35
36 Load/flash actions use the existing outputs, and do not trigger new builds.
37 """)
38
39 parser.add_argument("-t", "--target", default="mlabs_video", help="SoC type to build")
40 parser.add_argument("-s", "--sub-target", default="", help="variant of the SoC type to build")
41 parser.add_argument("-p", "--platform", default=None, help="platform to build for")
42 parser.add_argument("-Ot", "--target-option", default=[], nargs=2, action="append", help="set target-specific option")
43 parser.add_argument("-Op", "--platform-option", default=[], nargs=2, action="append", help="set platform-specific option")
44 parser.add_argument("-X", "--external", default="", help="use external directory for targets, platforms and imports")
45 parser.add_argument("--csr_csv", default="csr.csv", help="CSV file to save the CSR map into")
46
47 parser.add_argument("-d", "--decorate", default=[], action="append", help="apply simplification decorator to top-level")
48 parser.add_argument("-Ob", "--build-option", default=[], nargs=2, action="append", help="set build option")
49 parser.add_argument("-f", "--flash-proxy-dir", default=None, help="set search directory for flash proxy bitstreams")
50
51 parser.add_argument("action", nargs="+", help="specify an action")
52
53 return parser.parse_args()
54
55 if __name__ == "__main__":
56 args = _get_args()
57
58 external_target = ""
59 external_platform = ""
60 if args.external:
61 external_target = os.path.join(args.external, "targets")
62 external_platform = os.path.join(args.external, "platforms")
63 sys.path.insert(1, os.path.abspath(args.external))
64
65 # create top-level SoC object
66 target_module = misoc_import("targets", external_target, args.target)
67 if args.sub_target:
68 top_class = getattr(target_module, args.sub_target)
69 else:
70 top_class = target_module.default_subtarget
71
72 if args.platform is None:
73 if hasattr(top_class, "default_platform"):
74 platform_name = top_class.default_platform
75 else:
76 raise ValueError("Target has no default platform, specify a platform with -p your_platform")
77 else:
78 platform_name = args.platform
79 platform_module = misoc_import("mibuild.platforms", external_platform, platform_name)
80 platform_kwargs = dict((k, autotype(v)) for k, v in args.platform_option)
81 platform = platform_module.Platform(**platform_kwargs)
82 if args.external:
83 platform.soc_ext_path = os.path.abspath(args.external)
84
85 build_name = top_class.__name__.lower() + "-" + platform_name
86 top_kwargs = dict((k, autotype(v)) for k, v in args.target_option)
87 soc = top_class(platform, **top_kwargs)
88 soc.finalize()
89
90 # decode actions
91 action_list = ["clean", "build-bitstream", "build-headers", "build-csr-csv", "build-bios",
92 "load-bitstream", "flash-bitstream", "flash-bios", "all"]
93 actions = {k: False for k in action_list}
94 for action in args.action:
95 if action in actions:
96 actions[action] = True
97 else:
98 print("Unknown action: "+action+". Valid actions are:")
99 for a in action_list:
100 print(" "+a)
101 sys.exit(1)
102
103 print("""\
104 __ ___ _ ____ _____
105 / |/ / (_) / __/__ / ___/
106 / /|_/ / / / _\ \/ _ \/ /__
107 /_/ /_/ /_/ /___/\___/\___/
108
109 a high performance and small footprint SoC based on Migen
110
111 ====== Building for: ======
112 Platform: {}
113 Target: {}
114 Subtarget: {}
115 CPU type: {}
116 ===========================""".format(platform_name, args.target, top_class.__name__, soc.cpu_type))
117
118 # dependencies
119 if actions["all"]:
120 actions["clean"] = True
121 actions["build-bitstream"] = True
122 actions["build-bios"] = True
123 if not actions["load-bitstream"]:
124 actions["flash-bitstream"] = True
125 if not soc.with_rom:
126 actions["flash-bios"] = True
127 if actions["build-bitstream"] and soc.with_rom:
128 actions["build-bios"] = True
129 if actions["build-bios"]:
130 actions["build-headers"] = True
131
132 if actions["clean"]:
133 subprocess.call(["rm", "-rf", "build/*"])
134 subprocess.call(["make", "-C", "software/libcompiler-rt", "clean"])
135 subprocess.call(["make", "-C", "software/libbase", "clean"])
136 subprocess.call(["make", "-C", "software/libnet", "clean"])
137 subprocess.call(["make", "-C", "software/bios", "clean"])
138
139 if actions["build-headers"]:
140 boilerplate = """/*
141 * Platform: {}
142 * Target: {}
143 * Subtarget: {}
144 * CPU type: {}
145 */
146
147 """.format(platform_name, args.target, top_class.__name__, soc.cpu_type)
148 if isinstance(soc.cpu_or_bridge, CPU):
149 cpu_mak = cpuif.get_cpu_mak(soc.cpu_type)
150 write_to_file("software/include/generated/cpu.mak", cpu_mak)
151 linker_output_format = cpuif.get_linker_output_format(soc.cpu_type)
152 write_to_file("software/include/generated/output_format.ld", linker_output_format)
153
154 linker_regions = cpuif.get_linker_regions(soc.memory_regions)
155 write_to_file("software/include/generated/regions.ld", boilerplate + linker_regions)
156
157 for sdram_phy in ["sdrphy", "ddrphy"]:
158 if hasattr(soc, sdram_phy):
159 sdram_phy_header = initsequence.get_sdram_phy_header(getattr(soc, sdram_phy))
160 write_to_file("software/include/generated/sdram_phy.h", boilerplate + sdram_phy_header)
161 mem_header = cpuif.get_mem_header(soc.memory_regions, getattr(soc, "flash_boot_address", None))
162 write_to_file("software/include/generated/mem.h", boilerplate + mem_header)
163 csr_header = cpuif.get_csr_header(soc.csr_regions, soc.interrupt_map)
164 write_to_file("software/include/generated/csr.h", boilerplate + csr_header)
165
166 if actions["build-csr-csv"]:
167 csr_csv = cpuif.get_csr_csv(soc.csr_regions)
168 write_to_file(args.csr_csv, csr_csv)
169
170 if actions["build-bios"]:
171 ret = subprocess.call(["make", "-C", "software/bios"])
172 if ret:
173 raise OSError("BIOS build failed")
174
175 if actions["build-bitstream"]:
176 if soc.with_rom:
177 with open(soc.cpu_boot_file, "rb") as boot_file:
178 boot_data = []
179 while True:
180 w = boot_file.read(4)
181 if not w:
182 break
183 boot_data.append(struct.unpack(">I", w)[0])
184 soc.init_rom(boot_data)
185
186 for decorator in args.decorate:
187 soc = getattr(simplify, decorator)(soc)
188 build_kwargs = dict((k, autotype(v)) for k, v in args.build_option)
189 vns = platform.build(soc, build_name=build_name, **build_kwargs)
190 soc.do_exit(vns)
191
192 if actions["load-bitstream"]:
193 prog = platform.create_programmer()
194 prog.load_bitstream("build/" + build_name + platform.bitstream_ext)
195
196 if actions["flash-bitstream"]:
197 prog = platform.create_programmer()
198 prog.set_flash_proxy_dir(args.flash_proxy_dir)
199 if prog.needs_bitreverse:
200 flashbit = "build/" + build_name + ".fpg"
201 subprocess.call(["tools/byteswap",
202 "build/" + build_name + ".bin",
203 flashbit])
204 else:
205 flashbit = "build/" + build_name + ".bin"
206 prog.flash(0, flashbit)
207
208 if actions["flash-bios"]:
209 prog = platform.create_programmer()
210 prog.set_flash_proxy_dir(args.flash_proxy_dir)
211 prog.flash(soc.cpu_reset_address, soc.cpu_boot_file)