1 from migen
.fhdl
.structure
import *
2 from migen
.fhdl
.tools
import value_bits_sign
5 def __init__(self
, layout
, name
=""):
9 prefix
= self
.name
+ "_"
13 if isinstance(f
, tuple):
14 if isinstance(f
[1], (int, tuple)):
15 setattr(self
, f
[0], Signal(f
[1], prefix
+ f
[0]))
16 elif isinstance(f
[1], Signal
) or isinstance(f
[1], Record
):
17 setattr(self
, f
[0], f
[1])
18 elif isinstance(f
[1], list):
19 setattr(self
, f
[0], Record(f
[1], prefix
+ f
[0]))
23 self
.field_order
.append((f
[0], f
[2]))
25 self
.field_order
.append((f
[0], 1))
27 setattr(self
, f
, Signal(1, prefix
+ f
))
28 self
.field_order
.append((f
, 1))
31 return [getattr(self
, key
).eq(getattr(other
, key
))
32 for key
, a
in self
.field_order
]
36 for key
, alignment
in self
.field_order
:
37 e
= self
.__dict
__[key
]
38 if isinstance(e
, Signal
):
39 l
.append((key
, (e
.nbits
, e
.signed
), alignment
))
40 elif isinstance(e
, Record
):
41 l
.append((key
, e
.layout(), alignment
))
44 def copy(self
, name
=None):
45 return Record(self
.layout(), name
)
47 def get_alignment(self
, name
):
48 return list(filter(lambda x
: x
[0] == name
, self
.field_order
))[0][1]
50 def subrecord(self
, *descr
):
53 path
= item
.split("/")
58 pos_self
= getattr(pos_self
, hop
)
59 lu
= list(filter(lambda x
: x
[0] == hop
, pos_fields
))
64 pos_fields
.append((hop
, n
))
66 if not isinstance(pos_fields
, list):
68 if len(list(filter(lambda x
: x
[0] == last
, pos_fields
))) > 0:
70 pos_fields
.append((last
, getattr(pos_self
, last
), pos_self
.get_alignment(last
)))
71 return Record(fields
, "subrecord")
73 def compatible(self
, other
):
75 tpl2
= other
.flatten()
76 return len(tpl1
) == len(tpl2
)
78 def flatten(self
, align
=False, offset
=0, return_offset
=False):
80 for key
, alignment
in self
.field_order
:
82 pad_size
= alignment
- (offset
% alignment
)
83 if pad_size
< alignment
:
84 l
.append(Replicate(0, pad_size
))
87 e
= self
.__dict
__[key
]
88 if isinstance(e
, Signal
):
90 elif isinstance(e
, Record
):
91 added
= e
.flatten(align
, offset
)
95 offset
+= value_bits_sign(x
)[0]
102 def to_signal(self
, assignment_list
, sig_out
, align
=False):
103 flattened
, length
= self
.flatten(align
, return_offset
=True)
106 assignment_list
.append(raw
.eq(Cat(*flattened
)))
108 assignment_list
.append(Cat(*flattened
).eq(raw
))
112 return "<Record " + repr(self
.layout()) + ">"