Merge 'new' branch
[litex.git] / misoc / cores / dvi_sampler / charsync.py
1 from functools import reduce
2 from operator import or_
3
4 from migen import *
5 from migen.genlib.cdc import MultiReg
6
7 from misoc.interconnect.csr import *
8 from misoc.cores.dvi_sampler.common import control_tokens
9
10
11 class CharSync(Module, AutoCSR):
12 def __init__(self, required_controls=8):
13 self.raw_data = Signal(10)
14 self.synced = Signal()
15 self.data = Signal(10)
16
17 self._char_synced = CSRStatus()
18 self._ctl_pos = CSRStatus(bits_for(9))
19
20 ###
21
22 raw_data1 = Signal(10)
23 self.sync.pix += raw_data1.eq(self.raw_data)
24 raw = Signal(20)
25 self.comb += raw.eq(Cat(raw_data1, self.raw_data))
26
27 found_control = Signal()
28 control_position = Signal(max=10)
29 self.sync.pix += found_control.eq(0)
30 for i in range(10):
31 self.sync.pix += If(reduce(or_, [raw[i:i+10] == t for t in control_tokens]),
32 found_control.eq(1),
33 control_position.eq(i)
34 )
35
36 control_counter = Signal(max=required_controls)
37 previous_control_position = Signal(max=10)
38 word_sel = Signal(max=10)
39 self.sync.pix += [
40 If(found_control & (control_position == previous_control_position),
41 If(control_counter == (required_controls - 1),
42 control_counter.eq(0),
43 self.synced.eq(1),
44 word_sel.eq(control_position)
45 ).Else(
46 control_counter.eq(control_counter + 1)
47 )
48 ).Else(
49 control_counter.eq(0)
50 ),
51 previous_control_position.eq(control_position)
52 ]
53 self.specials += MultiReg(self.synced, self._char_synced.status)
54 self.specials += MultiReg(word_sel, self._ctl_pos.status)
55
56 self.sync.pix += self.data.eq(raw >> word_sel)